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drm/ttm: Rework validation & memory space allocation (V3)
[mv-sheeva.git] / drivers / gpu / drm / radeon / radeon_object.c
1 /*
2  * Copyright 2009 Jerome Glisse.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Jerome Glisse <glisse@freedesktop.org>
29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
30  *    Dave Airlie
31  */
32 #include <linux/list.h>
33 #include <drm/drmP.h>
34 #include "radeon_drm.h"
35 #include "radeon.h"
36
37
38 int radeon_ttm_init(struct radeon_device *rdev);
39 void radeon_ttm_fini(struct radeon_device *rdev);
40 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
41
42 /*
43  * To exclude mutual BO access we rely on bo_reserve exclusion, as all
44  * function are calling it.
45  */
46
47 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
48 {
49         struct radeon_bo *bo;
50
51         bo = container_of(tbo, struct radeon_bo, tbo);
52         mutex_lock(&bo->rdev->gem.mutex);
53         list_del_init(&bo->list);
54         mutex_unlock(&bo->rdev->gem.mutex);
55         radeon_bo_clear_surface_reg(bo);
56         kfree(bo);
57 }
58
59 static inline u32 radeon_ttm_flags_from_domain(u32 domain)
60 {
61         u32 flags = 0;
62
63         if (domain & RADEON_GEM_DOMAIN_VRAM) {
64                 flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
65         }
66         if (domain & RADEON_GEM_DOMAIN_GTT) {
67                 flags |= TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
68         }
69         if (domain & RADEON_GEM_DOMAIN_CPU) {
70                 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
71         }
72         if (!flags) {
73                 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
74         }
75         return flags;
76 }
77
78 int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
79                         unsigned long size, bool kernel, u32 domain,
80                         struct radeon_bo **bo_ptr)
81 {
82         struct radeon_bo *bo;
83         enum ttm_bo_type type;
84         u32 flags;
85         int r;
86
87         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
88                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
89         }
90         if (kernel) {
91                 type = ttm_bo_type_kernel;
92         } else {
93                 type = ttm_bo_type_device;
94         }
95         *bo_ptr = NULL;
96         bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
97         if (bo == NULL)
98                 return -ENOMEM;
99         bo->rdev = rdev;
100         bo->gobj = gobj;
101         bo->surface_reg = -1;
102         INIT_LIST_HEAD(&bo->list);
103
104         flags = radeon_ttm_flags_from_domain(domain);
105 retry:
106         r = ttm_buffer_object_init(&rdev->mman.bdev, &bo->tbo, size, type,
107                                         flags, 0, 0, true, NULL, size,
108                                         &radeon_ttm_bo_destroy);
109         if (unlikely(r != 0)) {
110                 if (r == -ERESTART)
111                         goto retry;
112                 /* ttm call radeon_ttm_object_object_destroy if error happen */
113                 dev_err(rdev->dev, "object_init failed for (%ld, 0x%08X)\n",
114                         size, flags);
115                 return r;
116         }
117         *bo_ptr = bo;
118         if (gobj) {
119                 mutex_lock(&bo->rdev->gem.mutex);
120                 list_add_tail(&bo->list, &rdev->gem.objects);
121                 mutex_unlock(&bo->rdev->gem.mutex);
122         }
123         return 0;
124 }
125
126 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
127 {
128         bool is_iomem;
129         int r;
130
131         if (bo->kptr) {
132                 if (ptr) {
133                         *ptr = bo->kptr;
134                 }
135                 return 0;
136         }
137         r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
138         if (r) {
139                 return r;
140         }
141         bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
142         if (ptr) {
143                 *ptr = bo->kptr;
144         }
145         radeon_bo_check_tiling(bo, 0, 0);
146         return 0;
147 }
148
149 void radeon_bo_kunmap(struct radeon_bo *bo)
150 {
151         if (bo->kptr == NULL)
152                 return;
153         bo->kptr = NULL;
154         radeon_bo_check_tiling(bo, 0, 0);
155         ttm_bo_kunmap(&bo->kmap);
156 }
157
158 void radeon_bo_unref(struct radeon_bo **bo)
159 {
160         struct ttm_buffer_object *tbo;
161
162         if ((*bo) == NULL)
163                 return;
164         tbo = &((*bo)->tbo);
165         ttm_bo_unref(&tbo);
166         if (tbo == NULL)
167                 *bo = NULL;
168 }
169
170 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
171 {
172         u32 flags;
173         u32 tmp;
174         int r;
175
176         flags = radeon_ttm_flags_from_domain(domain);
177         if (bo->pin_count) {
178                 bo->pin_count++;
179                 if (gpu_addr)
180                         *gpu_addr = radeon_bo_gpu_offset(bo);
181                 return 0;
182         }
183         tmp = bo->tbo.mem.placement;
184         ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM);
185         bo->tbo.proposed_placement = tmp | TTM_PL_FLAG_NO_EVICT |
186                                         TTM_PL_MASK_CACHING;
187 retry:
188         r = ttm_buffer_object_validate(&bo->tbo, bo->tbo.proposed_placement,
189                                         true, false);
190         if (likely(r == 0)) {
191                 bo->pin_count = 1;
192                 if (gpu_addr != NULL)
193                         *gpu_addr = radeon_bo_gpu_offset(bo);
194         }
195         if (unlikely(r != 0)) {
196                 if (r == -ERESTART)
197                         goto retry;
198                 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
199         }
200         return r;
201 }
202
203 int radeon_bo_unpin(struct radeon_bo *bo)
204 {
205         int r;
206
207         if (!bo->pin_count) {
208                 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
209                 return 0;
210         }
211         bo->pin_count--;
212         if (bo->pin_count)
213                 return 0;
214         bo->tbo.proposed_placement = bo->tbo.mem.placement &
215                                         ~TTM_PL_FLAG_NO_EVICT;
216 retry:
217         r = ttm_buffer_object_validate(&bo->tbo, bo->tbo.proposed_placement,
218                                         true, false);
219         if (unlikely(r != 0)) {
220                 if (r == -ERESTART)
221                         goto retry;
222                 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
223                 return r;
224         }
225         return 0;
226 }
227
228 int radeon_bo_evict_vram(struct radeon_device *rdev)
229 {
230         if (rdev->flags & RADEON_IS_IGP) {
231                 /* Useless to evict on IGP chips */
232                 return 0;
233         }
234         return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
235 }
236
237 void radeon_bo_force_delete(struct radeon_device *rdev)
238 {
239         struct radeon_bo *bo, *n;
240         struct drm_gem_object *gobj;
241
242         if (list_empty(&rdev->gem.objects)) {
243                 return;
244         }
245         dev_err(rdev->dev, "Userspace still has active objects !\n");
246         list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
247                 mutex_lock(&rdev->ddev->struct_mutex);
248                 gobj = bo->gobj;
249                 dev_err(rdev->dev, "%p %p %lu %lu force free\n",
250                         gobj, bo, (unsigned long)gobj->size,
251                         *((unsigned long *)&gobj->refcount));
252                 mutex_lock(&bo->rdev->gem.mutex);
253                 list_del_init(&bo->list);
254                 mutex_unlock(&bo->rdev->gem.mutex);
255                 radeon_bo_unref(&bo);
256                 gobj->driver_private = NULL;
257                 drm_gem_object_unreference(gobj);
258                 mutex_unlock(&rdev->ddev->struct_mutex);
259         }
260 }
261
262 int radeon_bo_init(struct radeon_device *rdev)
263 {
264         /* Add an MTRR for the VRAM */
265         rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
266                         MTRR_TYPE_WRCOMB, 1);
267         DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
268                 rdev->mc.mc_vram_size >> 20,
269                 (unsigned long long)rdev->mc.aper_size >> 20);
270         DRM_INFO("RAM width %dbits %cDR\n",
271                         rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
272         return radeon_ttm_init(rdev);
273 }
274
275 void radeon_bo_fini(struct radeon_device *rdev)
276 {
277         radeon_ttm_fini(rdev);
278 }
279
280 void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
281                                 struct list_head *head)
282 {
283         if (lobj->wdomain) {
284                 list_add(&lobj->list, head);
285         } else {
286                 list_add_tail(&lobj->list, head);
287         }
288 }
289
290 int radeon_bo_list_reserve(struct list_head *head)
291 {
292         struct radeon_bo_list *lobj;
293         int r;
294
295         list_for_each_entry(lobj, head, list){
296                 r = radeon_bo_reserve(lobj->bo, false);
297                 if (unlikely(r != 0))
298                         return r;
299         }
300         return 0;
301 }
302
303 void radeon_bo_list_unreserve(struct list_head *head)
304 {
305         struct radeon_bo_list *lobj;
306
307         list_for_each_entry(lobj, head, list) {
308                 /* only unreserve object we successfully reserved */
309                 if (radeon_bo_is_reserved(lobj->bo))
310                         radeon_bo_unreserve(lobj->bo);
311         }
312 }
313
314 int radeon_bo_list_validate(struct list_head *head, void *fence)
315 {
316         struct radeon_bo_list *lobj;
317         struct radeon_bo *bo;
318         struct radeon_fence *old_fence = NULL;
319         int r;
320
321         r = radeon_bo_list_reserve(head);
322         if (unlikely(r != 0)) {
323                 return r;
324         }
325         list_for_each_entry(lobj, head, list) {
326                 bo = lobj->bo;
327                 if (!bo->pin_count) {
328                         if (lobj->wdomain) {
329                                 bo->tbo.proposed_placement =
330                                         radeon_ttm_flags_from_domain(lobj->wdomain);
331                         } else {
332                                 bo->tbo.proposed_placement =
333                                         radeon_ttm_flags_from_domain(lobj->rdomain);
334                         }
335 retry:
336                         r = ttm_buffer_object_validate(&bo->tbo,
337                                                 bo->tbo.proposed_placement,
338                                                 true, false);
339                         if (unlikely(r)) {
340                                 if (r == -ERESTART)
341                                         goto retry;
342                                 return r;
343                         }
344                 }
345                 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
346                 lobj->tiling_flags = bo->tiling_flags;
347                 if (fence) {
348                         old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
349                         bo->tbo.sync_obj = radeon_fence_ref(fence);
350                         bo->tbo.sync_obj_arg = NULL;
351                 }
352                 if (old_fence) {
353                         radeon_fence_unref(&old_fence);
354                 }
355         }
356         return 0;
357 }
358
359 void radeon_bo_list_unvalidate(struct list_head *head, void *fence)
360 {
361         struct radeon_bo_list *lobj;
362         struct radeon_fence *old_fence;
363
364         if (fence)
365                 list_for_each_entry(lobj, head, list) {
366                         old_fence = to_radeon_fence(lobj->bo->tbo.sync_obj);
367                         if (old_fence == fence) {
368                                 lobj->bo->tbo.sync_obj = NULL;
369                                 radeon_fence_unref(&old_fence);
370                         }
371                 }
372         radeon_bo_list_unreserve(head);
373 }
374
375 int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
376                              struct vm_area_struct *vma)
377 {
378         return ttm_fbdev_mmap(vma, &bo->tbo);
379 }
380
381 static int radeon_bo_get_surface_reg(struct radeon_bo *bo)
382 {
383         struct radeon_device *rdev = bo->rdev;
384         struct radeon_surface_reg *reg;
385         struct radeon_bo *old_object;
386         int steal;
387         int i;
388
389         BUG_ON(!atomic_read(&bo->tbo.reserved));
390
391         if (!bo->tiling_flags)
392                 return 0;
393
394         if (bo->surface_reg >= 0) {
395                 reg = &rdev->surface_regs[bo->surface_reg];
396                 i = bo->surface_reg;
397                 goto out;
398         }
399
400         steal = -1;
401         for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
402
403                 reg = &rdev->surface_regs[i];
404                 if (!reg->bo)
405                         break;
406
407                 old_object = reg->bo;
408                 if (old_object->pin_count == 0)
409                         steal = i;
410         }
411
412         /* if we are all out */
413         if (i == RADEON_GEM_MAX_SURFACES) {
414                 if (steal == -1)
415                         return -ENOMEM;
416                 /* find someone with a surface reg and nuke their BO */
417                 reg = &rdev->surface_regs[steal];
418                 old_object = reg->bo;
419                 /* blow away the mapping */
420                 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
421                 ttm_bo_unmap_virtual(&old_object->tbo);
422                 old_object->surface_reg = -1;
423                 i = steal;
424         }
425
426         bo->surface_reg = i;
427         reg->bo = bo;
428
429 out:
430         radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
431                                bo->tbo.mem.mm_node->start << PAGE_SHIFT,
432                                bo->tbo.num_pages << PAGE_SHIFT);
433         return 0;
434 }
435
436 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
437 {
438         struct radeon_device *rdev = bo->rdev;
439         struct radeon_surface_reg *reg;
440
441         if (bo->surface_reg == -1)
442                 return;
443
444         reg = &rdev->surface_regs[bo->surface_reg];
445         radeon_clear_surface_reg(rdev, bo->surface_reg);
446
447         reg->bo = NULL;
448         bo->surface_reg = -1;
449 }
450
451 int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
452                                 uint32_t tiling_flags, uint32_t pitch)
453 {
454         int r;
455
456         r = radeon_bo_reserve(bo, false);
457         if (unlikely(r != 0))
458                 return r;
459         bo->tiling_flags = tiling_flags;
460         bo->pitch = pitch;
461         radeon_bo_unreserve(bo);
462         return 0;
463 }
464
465 void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
466                                 uint32_t *tiling_flags,
467                                 uint32_t *pitch)
468 {
469         BUG_ON(!atomic_read(&bo->tbo.reserved));
470         if (tiling_flags)
471                 *tiling_flags = bo->tiling_flags;
472         if (pitch)
473                 *pitch = bo->pitch;
474 }
475
476 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
477                                 bool force_drop)
478 {
479         BUG_ON(!atomic_read(&bo->tbo.reserved));
480
481         if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
482                 return 0;
483
484         if (force_drop) {
485                 radeon_bo_clear_surface_reg(bo);
486                 return 0;
487         }
488
489         if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
490                 if (!has_moved)
491                         return 0;
492
493                 if (bo->surface_reg >= 0)
494                         radeon_bo_clear_surface_reg(bo);
495                 return 0;
496         }
497
498         if ((bo->surface_reg >= 0) && !has_moved)
499                 return 0;
500
501         return radeon_bo_get_surface_reg(bo);
502 }
503
504 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
505                                 struct ttm_mem_reg *mem)
506 {
507         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
508         radeon_bo_check_tiling(rbo, 0, 1);
509 }
510
511 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
512 {
513         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
514         radeon_bo_check_tiling(rbo, 0, 0);
515 }