2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
32 #include <linux/list.h>
34 #include "radeon_drm.h"
38 int radeon_ttm_init(struct radeon_device *rdev);
39 void radeon_ttm_fini(struct radeon_device *rdev);
40 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
43 * To exclude mutual BO access we rely on bo_reserve exclusion, as all
44 * function are calling it.
47 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
51 bo = container_of(tbo, struct radeon_bo, tbo);
52 mutex_lock(&bo->rdev->gem.mutex);
53 list_del_init(&bo->list);
54 mutex_unlock(&bo->rdev->gem.mutex);
55 radeon_bo_clear_surface_reg(bo);
59 static inline u32 radeon_ttm_flags_from_domain(u32 domain)
63 if (domain & RADEON_GEM_DOMAIN_VRAM) {
64 flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
66 if (domain & RADEON_GEM_DOMAIN_GTT) {
67 flags |= TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
69 if (domain & RADEON_GEM_DOMAIN_CPU) {
70 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
73 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
78 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
82 rbo->placement.fpfn = 0;
83 rbo->placement.lpfn = 0;
84 rbo->placement.placement = rbo->placements;
85 rbo->placement.busy_placement = rbo->placements;
86 if (domain & RADEON_GEM_DOMAIN_VRAM)
87 rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
89 if (domain & RADEON_GEM_DOMAIN_GTT)
90 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
91 if (domain & RADEON_GEM_DOMAIN_CPU)
92 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
93 rbo->placement.num_placement = c;
94 rbo->placement.num_busy_placement = c;
97 int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
98 unsigned long size, bool kernel, u32 domain,
99 struct radeon_bo **bo_ptr)
101 struct radeon_bo *bo;
102 enum ttm_bo_type type;
106 if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
107 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
110 type = ttm_bo_type_kernel;
112 type = ttm_bo_type_device;
115 bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
120 bo->surface_reg = -1;
121 INIT_LIST_HEAD(&bo->list);
123 flags = radeon_ttm_flags_from_domain(domain);
125 r = ttm_buffer_object_init(&rdev->mman.bdev, &bo->tbo, size, type,
126 flags, 0, 0, true, NULL, size,
127 &radeon_ttm_bo_destroy);
128 if (unlikely(r != 0)) {
131 /* ttm call radeon_ttm_object_object_destroy if error happen */
132 dev_err(rdev->dev, "object_init failed for (%ld, 0x%08X)\n",
138 mutex_lock(&bo->rdev->gem.mutex);
139 list_add_tail(&bo->list, &rdev->gem.objects);
140 mutex_unlock(&bo->rdev->gem.mutex);
145 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
156 r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
160 bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
164 radeon_bo_check_tiling(bo, 0, 0);
168 void radeon_bo_kunmap(struct radeon_bo *bo)
170 if (bo->kptr == NULL)
173 radeon_bo_check_tiling(bo, 0, 0);
174 ttm_bo_kunmap(&bo->kmap);
177 void radeon_bo_unref(struct radeon_bo **bo)
179 struct ttm_buffer_object *tbo;
189 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
193 radeon_ttm_placement_from_domain(bo, domain);
197 *gpu_addr = radeon_bo_gpu_offset(bo);
200 radeon_ttm_placement_from_domain(bo, domain);
201 for (i = 0; i < bo->placement.num_placement; i++)
202 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
204 r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, true, false);
205 if (likely(r == 0)) {
207 if (gpu_addr != NULL)
208 *gpu_addr = radeon_bo_gpu_offset(bo);
210 if (unlikely(r != 0)) {
213 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
218 int radeon_bo_unpin(struct radeon_bo *bo)
222 if (!bo->pin_count) {
223 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
229 for (i = 0; i < bo->placement.num_placement; i++)
230 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
232 r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, true, false);
233 if (unlikely(r != 0)) {
236 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
242 int radeon_bo_evict_vram(struct radeon_device *rdev)
244 if (rdev->flags & RADEON_IS_IGP) {
245 /* Useless to evict on IGP chips */
248 return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
251 void radeon_bo_force_delete(struct radeon_device *rdev)
253 struct radeon_bo *bo, *n;
254 struct drm_gem_object *gobj;
256 if (list_empty(&rdev->gem.objects)) {
259 dev_err(rdev->dev, "Userspace still has active objects !\n");
260 list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
261 mutex_lock(&rdev->ddev->struct_mutex);
263 dev_err(rdev->dev, "%p %p %lu %lu force free\n",
264 gobj, bo, (unsigned long)gobj->size,
265 *((unsigned long *)&gobj->refcount));
266 mutex_lock(&bo->rdev->gem.mutex);
267 list_del_init(&bo->list);
268 mutex_unlock(&bo->rdev->gem.mutex);
269 radeon_bo_unref(&bo);
270 gobj->driver_private = NULL;
271 drm_gem_object_unreference(gobj);
272 mutex_unlock(&rdev->ddev->struct_mutex);
276 int radeon_bo_init(struct radeon_device *rdev)
278 /* Add an MTRR for the VRAM */
279 rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
280 MTRR_TYPE_WRCOMB, 1);
281 DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
282 rdev->mc.mc_vram_size >> 20,
283 (unsigned long long)rdev->mc.aper_size >> 20);
284 DRM_INFO("RAM width %dbits %cDR\n",
285 rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
286 return radeon_ttm_init(rdev);
289 void radeon_bo_fini(struct radeon_device *rdev)
291 radeon_ttm_fini(rdev);
294 void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
295 struct list_head *head)
298 list_add(&lobj->list, head);
300 list_add_tail(&lobj->list, head);
304 int radeon_bo_list_reserve(struct list_head *head)
306 struct radeon_bo_list *lobj;
309 list_for_each_entry(lobj, head, list){
310 r = radeon_bo_reserve(lobj->bo, false);
311 if (unlikely(r != 0))
317 void radeon_bo_list_unreserve(struct list_head *head)
319 struct radeon_bo_list *lobj;
321 list_for_each_entry(lobj, head, list) {
322 /* only unreserve object we successfully reserved */
323 if (radeon_bo_is_reserved(lobj->bo))
324 radeon_bo_unreserve(lobj->bo);
328 int radeon_bo_list_validate(struct list_head *head, void *fence)
330 struct radeon_bo_list *lobj;
331 struct radeon_bo *bo;
332 struct radeon_fence *old_fence = NULL;
335 r = radeon_bo_list_reserve(head);
336 if (unlikely(r != 0)) {
339 list_for_each_entry(lobj, head, list) {
341 if (!bo->pin_count) {
343 radeon_ttm_placement_from_domain(bo,
346 radeon_ttm_placement_from_domain(bo,
350 r = ttm_buffer_object_validate(&bo->tbo,
359 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
360 lobj->tiling_flags = bo->tiling_flags;
362 old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
363 bo->tbo.sync_obj = radeon_fence_ref(fence);
364 bo->tbo.sync_obj_arg = NULL;
367 radeon_fence_unref(&old_fence);
373 void radeon_bo_list_unvalidate(struct list_head *head, void *fence)
375 struct radeon_bo_list *lobj;
376 struct radeon_fence *old_fence;
379 list_for_each_entry(lobj, head, list) {
380 old_fence = to_radeon_fence(lobj->bo->tbo.sync_obj);
381 if (old_fence == fence) {
382 lobj->bo->tbo.sync_obj = NULL;
383 radeon_fence_unref(&old_fence);
386 radeon_bo_list_unreserve(head);
389 int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
390 struct vm_area_struct *vma)
392 return ttm_fbdev_mmap(vma, &bo->tbo);
395 static int radeon_bo_get_surface_reg(struct radeon_bo *bo)
397 struct radeon_device *rdev = bo->rdev;
398 struct radeon_surface_reg *reg;
399 struct radeon_bo *old_object;
403 BUG_ON(!atomic_read(&bo->tbo.reserved));
405 if (!bo->tiling_flags)
408 if (bo->surface_reg >= 0) {
409 reg = &rdev->surface_regs[bo->surface_reg];
415 for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
417 reg = &rdev->surface_regs[i];
421 old_object = reg->bo;
422 if (old_object->pin_count == 0)
426 /* if we are all out */
427 if (i == RADEON_GEM_MAX_SURFACES) {
430 /* find someone with a surface reg and nuke their BO */
431 reg = &rdev->surface_regs[steal];
432 old_object = reg->bo;
433 /* blow away the mapping */
434 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
435 ttm_bo_unmap_virtual(&old_object->tbo);
436 old_object->surface_reg = -1;
444 radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
445 bo->tbo.mem.mm_node->start << PAGE_SHIFT,
446 bo->tbo.num_pages << PAGE_SHIFT);
450 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
452 struct radeon_device *rdev = bo->rdev;
453 struct radeon_surface_reg *reg;
455 if (bo->surface_reg == -1)
458 reg = &rdev->surface_regs[bo->surface_reg];
459 radeon_clear_surface_reg(rdev, bo->surface_reg);
462 bo->surface_reg = -1;
465 int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
466 uint32_t tiling_flags, uint32_t pitch)
470 r = radeon_bo_reserve(bo, false);
471 if (unlikely(r != 0))
473 bo->tiling_flags = tiling_flags;
475 radeon_bo_unreserve(bo);
479 void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
480 uint32_t *tiling_flags,
483 BUG_ON(!atomic_read(&bo->tbo.reserved));
485 *tiling_flags = bo->tiling_flags;
490 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
493 BUG_ON(!atomic_read(&bo->tbo.reserved));
495 if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
499 radeon_bo_clear_surface_reg(bo);
503 if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
507 if (bo->surface_reg >= 0)
508 radeon_bo_clear_surface_reg(bo);
512 if ((bo->surface_reg >= 0) && !has_moved)
515 return radeon_bo_get_surface_reg(bo);
518 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
519 struct ttm_mem_reg *mem)
521 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
522 radeon_bo_check_tiling(rbo, 0, 1);
525 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
527 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
528 radeon_bo_check_tiling(rbo, 0, 0);