drivers/gpu/drm/radeon/radeon_ring.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  *          Christian König
  28  */
  29 #include <linux/seq_file.h>
  30 #include <linux/slab.h>
  31 #include "drmP.h"
  32 #include "radeon_drm.h"
  33 #include "radeon_reg.h"
  34 #include "radeon.h"
  35 #include "atom.h"
  36
  37 /*
  38  * IB.
  39  */
  40 int radeon_debugfs_sa_init(struct radeon_device *rdev);
  41
  42 u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx)
  43 {
  44         struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
  45         u32 pg_idx, pg_offset;
  46         u32 idx_value = 0;
  47         int new_page;
  48
  49         pg_idx = (idx * 4) / PAGE_SIZE;
  50         pg_offset = (idx * 4) % PAGE_SIZE;
  51
  52         if (ibc->kpage_idx[0] == pg_idx)
  53                 return ibc->kpage[0][pg_offset/4];
  54         if (ibc->kpage_idx[1] == pg_idx)
  55                 return ibc->kpage[1][pg_offset/4];
  56
  57         new_page = radeon_cs_update_pages(p, pg_idx);
  58         if (new_page < 0) {
  59                 p->parser_error = new_page;
  60                 return 0;
  61         }
  62
  63         idx_value = ibc->kpage[new_page][pg_offset/4];
  64         return idx_value;
  65 }
  66
  67 int radeon_ib_get(struct radeon_device *rdev, int ring,
  68                   struct radeon_ib *ib, unsigned size)
  69 {
  70         int r;
  71
  72         r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256, true);
  73         if (r) {
  74                 dev_err(rdev->dev, "failed to get a new IB (%d)\n", r);
  75                 return r;
  76         }
  77         r = radeon_fence_create(rdev, &ib->fence, ring);
  78         if (r) {
  79                 dev_err(rdev->dev, "failed to create fence for new IB (%d)\n", r);
  80                 radeon_sa_bo_free(rdev, &ib->sa_bo, NULL);
  81                 return r;
  82         }
  83
  84         ib->ptr = radeon_sa_bo_cpu_addr(ib->sa_bo);
  85         ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo);
  86         ib->vm_id = 0;
  87         ib->is_const_ib = false;
  88         ib->semaphore = NULL;
  89
  90         return 0;
  91 }
  92
  93 void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib)
  94 {
  95         radeon_semaphore_free(rdev, ib->semaphore, ib->fence);
  96         radeon_sa_bo_free(rdev, &ib->sa_bo, ib->fence);
  97         radeon_fence_unref(&ib->fence);
  98 }
  99
 100 int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
 101 {
 102         struct radeon_ring *ring = &rdev->ring[ib->fence->ring];
 103         int r = 0;
 104
 105         if (!ib->length_dw || !ring->ready) {
 106                 /* TODO: Nothings in the ib we should report. */
 107                 dev_err(rdev->dev, "couldn't schedule ib\n");
 108                 return -EINVAL;
 109         }
 110
 111         /* 64 dwords should be enough for fence too */
 112         r = radeon_ring_lock(rdev, ring, 64);
 113         if (r) {
 114                 dev_err(rdev->dev, "scheduling IB failed (%d).\n", r);
 115                 return r;
 116         }
 117         radeon_ring_ib_execute(rdev, ib->fence->ring, ib);
 118         radeon_fence_emit(rdev, ib->fence);
 119         radeon_ring_unlock_commit(rdev, ring);
 120         return 0;
 121 }
 122
 123 int radeon_ib_pool_init(struct radeon_device *rdev)
 124 {
 125         int r;
 126
 127         if (rdev->ib_pool_ready) {
 128                 return 0;
 129         }
 130         r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
 131                                       RADEON_IB_POOL_SIZE*64*1024,
 132                                       RADEON_GEM_DOMAIN_GTT);
 133         if (r) {
 134                 return r;
 135         }
 136         rdev->ib_pool_ready = true;
 137         if (radeon_debugfs_sa_init(rdev)) {
 138                 dev_err(rdev->dev, "failed to register debugfs file for SA\n");
 139         }
 140         return 0;
 141 }
 142
 143 void radeon_ib_pool_fini(struct radeon_device *rdev)
 144 {
 145         if (rdev->ib_pool_ready) {
 146                 radeon_sa_bo_manager_fini(rdev, &rdev->ring_tmp_bo);
 147                 rdev->ib_pool_ready = false;
 148         }
 149 }
 150
 151 int radeon_ib_pool_start(struct radeon_device *rdev)
 152 {
 153         return radeon_sa_bo_manager_start(rdev, &rdev->ring_tmp_bo);
 154 }
 155
 156 int radeon_ib_pool_suspend(struct radeon_device *rdev)
 157 {
 158         return radeon_sa_bo_manager_suspend(rdev, &rdev->ring_tmp_bo);
 159 }
 160
 161 int radeon_ib_ring_tests(struct radeon_device *rdev)
 162 {
 163         unsigned i;
 164         int r;
 165
 166         for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 167                 struct radeon_ring *ring = &rdev->ring[i];
 168
 169                 if (!ring->ready)
 170                         continue;
 171
 172                 r = radeon_ib_test(rdev, i, ring);
 173                 if (r) {
 174                         ring->ready = false;
 175
 176                         if (i == RADEON_RING_TYPE_GFX_INDEX) {
 177                                 /* oh, oh, that's really bad */
 178                                 DRM_ERROR("radeon: failed testing IB on GFX ring (%d).\n", r);
 179                                 rdev->accel_working = false;
 180                                 return r;
 181
 182                         } else {
 183                                 /* still not good, but we can live with it */
 184                                 DRM_ERROR("radeon: failed testing IB on ring %d (%d).\n", i, r);
 185                         }
 186                 }
 187         }
 188         return 0;
 189 }
 190
 191 /*
 192  * Ring.
 193  */
 194 int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
 195
 196 void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
 197 {
 198 #if DRM_DEBUG_CODE
 199         if (ring->count_dw <= 0) {
 200                 DRM_ERROR("radeon: writting more dword to ring than expected !\n");
 201         }
 202 #endif
 203         ring->ring[ring->wptr++] = v;
 204         ring->wptr &= ring->ptr_mask;
 205         ring->count_dw--;
 206         ring->ring_free_dw--;
 207 }
 208
 209 int radeon_ring_index(struct radeon_device *rdev, struct radeon_ring *ring)
 210 {
 211         /* r1xx-r5xx only has CP ring */
 212         if (rdev->family < CHIP_R600)
 213                 return RADEON_RING_TYPE_GFX_INDEX;
 214
 215         if (rdev->family >= CHIP_CAYMAN) {
 216                 if (ring == &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX])
 217                         return CAYMAN_RING_TYPE_CP1_INDEX;
 218                 else if (ring == &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX])
 219                         return CAYMAN_RING_TYPE_CP2_INDEX;
 220         }
 221         return RADEON_RING_TYPE_GFX_INDEX;
 222 }
 223
 224 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring)
 225 {
 226         u32 rptr;
 227
 228         if (rdev->wb.enabled)
 229                 rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]);
 230         else
 231                 rptr = RREG32(ring->rptr_reg);
 232         ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
 233         /* This works because ring_size is a power of 2 */
 234         ring->ring_free_dw = (ring->rptr + (ring->ring_size / 4));
 235         ring->ring_free_dw -= ring->wptr;
 236         ring->ring_free_dw &= ring->ptr_mask;
 237         if (!ring->ring_free_dw) {
 238                 ring->ring_free_dw = ring->ring_size / 4;
 239         }
 240 }
 241
 242
 243 int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
 244 {
 245         int r;
 246
 247         /* Align requested size with padding so unlock_commit can
 248          * pad safely */
 249         ndw = (ndw + ring->align_mask) & ~ring->align_mask;
 250         while (ndw > (ring->ring_free_dw - 1)) {
 251                 radeon_ring_free_size(rdev, ring);
 252                 if (ndw < ring->ring_free_dw) {
 253                         break;
 254                 }
 255                 r = radeon_fence_wait_next_locked(rdev, radeon_ring_index(rdev, ring));
 256                 if (r)
 257                         return r;
 258         }
 259         ring->count_dw = ndw;
 260         ring->wptr_old = ring->wptr;
 261         return 0;
 262 }
 263
 264 int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
 265 {
 266         int r;
 267
 268         mutex_lock(&rdev->ring_lock);
 269         r = radeon_ring_alloc(rdev, ring, ndw);
 270         if (r) {
 271                 mutex_unlock(&rdev->ring_lock);
 272                 return r;
 273         }
 274         return 0;
 275 }
 276
 277 void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring)
 278 {
 279         unsigned count_dw_pad;
 280         unsigned i;
 281
 282         /* We pad to match fetch size */
 283         count_dw_pad = (ring->align_mask + 1) -
 284                        (ring->wptr & ring->align_mask);
 285         for (i = 0; i < count_dw_pad; i++) {
 286                 radeon_ring_write(ring, ring->nop);
 287         }
 288         DRM_MEMORYBARRIER();
 289         WREG32(ring->wptr_reg, (ring->wptr << ring->ptr_reg_shift) & ring->ptr_reg_mask);
 290         (void)RREG32(ring->wptr_reg);
 291 }
 292
 293 void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring)
 294 {
 295         radeon_ring_commit(rdev, ring);
 296         mutex_unlock(&rdev->ring_lock);
 297 }
 298
 299 void radeon_ring_undo(struct radeon_ring *ring)
 300 {
 301         ring->wptr = ring->wptr_old;
 302 }
 303
 304 void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)
 305 {
 306         radeon_ring_undo(ring);
 307         mutex_unlock(&rdev->ring_lock);
 308 }
 309
 310 void radeon_ring_force_activity(struct radeon_device *rdev, struct radeon_ring *ring)
 311 {
 312         int r;
 313
 314         radeon_ring_free_size(rdev, ring);
 315         if (ring->rptr == ring->wptr) {
 316                 r = radeon_ring_alloc(rdev, ring, 1);
 317                 if (!r) {
 318                         radeon_ring_write(ring, ring->nop);
 319                         radeon_ring_commit(rdev, ring);
 320                 }
 321         }
 322 }
 323
 324 void radeon_ring_lockup_update(struct radeon_ring *ring)
 325 {
 326         ring->last_rptr = ring->rptr;
 327         ring->last_activity = jiffies;
 328 }
 329
 330 /**
 331  * radeon_ring_test_lockup() - check if ring is lockedup by recording information
 332  * @rdev:       radeon device structure
 333  * @ring:       radeon_ring structure holding ring information
 334  *
 335  * We don't need to initialize the lockup tracking information as we will either
 336  * have CP rptr to a different value of jiffies wrap around which will force
 337  * initialization of the lockup tracking informations.
 338  *
 339  * A possible false positivie is if we get call after while and last_cp_rptr ==
 340  * the current CP rptr, even if it's unlikely it might happen. To avoid this
 341  * if the elapsed time since last call is bigger than 2 second than we return
 342  * false and update the tracking information. Due to this the caller must call
 343  * radeon_ring_test_lockup several time in less than 2sec for lockup to be reported
 344  * the fencing code should be cautious about that.
 345  *
 346  * Caller should write to the ring to force CP to do something so we don't get
 347  * false positive when CP is just gived nothing to do.
 348  *
 349  **/
 350 bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
 351 {
 352         unsigned long cjiffies, elapsed;
 353         uint32_t rptr;
 354
 355         cjiffies = jiffies;
 356         if (!time_after(cjiffies, ring->last_activity)) {
 357                 /* likely a wrap around */
 358                 radeon_ring_lockup_update(ring);
 359                 return false;
 360         }
 361         rptr = RREG32(ring->rptr_reg);
 362         ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
 363         if (ring->rptr != ring->last_rptr) {
 364                 /* CP is still working no lockup */
 365                 radeon_ring_lockup_update(ring);
 366                 return false;
 367         }
 368         elapsed = jiffies_to_msecs(cjiffies - ring->last_activity);
 369         if (radeon_lockup_timeout && elapsed >= radeon_lockup_timeout) {
 370                 dev_err(rdev->dev, "GPU lockup CP stall for more than %lumsec\n", elapsed);
 371                 return true;
 372         }
 373         /* give a chance to the GPU ... */
 374         return false;
 375 }
 376
 377 int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
 378                      unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,
 379                      u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop)
 380 {
 381         int r;
 382
 383         ring->ring_size = ring_size;
 384         ring->rptr_offs = rptr_offs;
 385         ring->rptr_reg = rptr_reg;
 386         ring->wptr_reg = wptr_reg;
 387         ring->ptr_reg_shift = ptr_reg_shift;
 388         ring->ptr_reg_mask = ptr_reg_mask;
 389         ring->nop = nop;
 390         /* Allocate ring buffer */
 391         if (ring->ring_obj == NULL) {
 392                 r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
 393                                      RADEON_GEM_DOMAIN_GTT,
 394                                      NULL, &ring->ring_obj);
 395                 if (r) {
 396                         dev_err(rdev->dev, "(%d) ring create failed\n", r);
 397                         return r;
 398                 }
 399                 r = radeon_bo_reserve(ring->ring_obj, false);
 400                 if (unlikely(r != 0))
 401                         return r;
 402                 r = radeon_bo_pin(ring->ring_obj, RADEON_GEM_DOMAIN_GTT,
 403                                         &ring->gpu_addr);
 404                 if (r) {
 405                         radeon_bo_unreserve(ring->ring_obj);
 406                         dev_err(rdev->dev, "(%d) ring pin failed\n", r);
 407                         return r;
 408                 }
 409                 r = radeon_bo_kmap(ring->ring_obj,
 410                                        (void **)&ring->ring);
 411                 radeon_bo_unreserve(ring->ring_obj);
 412                 if (r) {
 413                         dev_err(rdev->dev, "(%d) ring map failed\n", r);
 414                         return r;
 415                 }
 416         }
 417         ring->ptr_mask = (ring->ring_size / 4) - 1;
 418         ring->ring_free_dw = ring->ring_size / 4;
 419         if (radeon_debugfs_ring_init(rdev, ring)) {
 420                 DRM_ERROR("Failed to register debugfs file for rings !\n");
 421         }
 422         return 0;
 423 }
 424
 425 void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring)
 426 {
 427         int r;
 428         struct radeon_bo *ring_obj;
 429
 430         mutex_lock(&rdev->ring_lock);
 431         ring_obj = ring->ring_obj;
 432         ring->ready = false;
 433         ring->ring = NULL;
 434         ring->ring_obj = NULL;
 435         mutex_unlock(&rdev->ring_lock);
 436
 437         if (ring_obj) {
 438                 r = radeon_bo_reserve(ring_obj, false);
 439                 if (likely(r == 0)) {
 440                         radeon_bo_kunmap(ring_obj);
 441                         radeon_bo_unpin(ring_obj);
 442                         radeon_bo_unreserve(ring_obj);
 443                 }
 444                 radeon_bo_unref(&ring_obj);
 445         }
 446 }
 447
 448 /*
 449  * Debugfs info
 450  */
 451 #if defined(CONFIG_DEBUG_FS)
 452
 453 static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
 454 {
 455         struct drm_info_node *node = (struct drm_info_node *) m->private;
 456         struct drm_device *dev = node->minor->dev;
 457         struct radeon_device *rdev = dev->dev_private;
 458         int ridx = *(int*)node->info_ent->data;
 459         struct radeon_ring *ring = &rdev->ring[ridx];
 460         unsigned count, i, j;
 461
 462         radeon_ring_free_size(rdev, ring);
 463         count = (ring->ring_size / 4) - ring->ring_free_dw;
 464         seq_printf(m, "wptr(0x%04x): 0x%08x\n", ring->wptr_reg, RREG32(ring->wptr_reg));
 465         seq_printf(m, "rptr(0x%04x): 0x%08x\n", ring->rptr_reg, RREG32(ring->rptr_reg));
 466         seq_printf(m, "driver's copy of the wptr: 0x%08x\n", ring->wptr);
 467         seq_printf(m, "driver's copy of the rptr: 0x%08x\n", ring->rptr);
 468         seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
 469         seq_printf(m, "%u dwords in ring\n", count);
 470         i = ring->rptr;
 471         for (j = 0; j <= count; j++) {
 472                 seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]);
 473                 i = (i + 1) & ring->ptr_mask;
 474         }
 475         return 0;
 476 }
 477
 478 static int radeon_ring_type_gfx_index = RADEON_RING_TYPE_GFX_INDEX;
 479 static int cayman_ring_type_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
 480 static int cayman_ring_type_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX;
 481
 482 static struct drm_info_list radeon_debugfs_ring_info_list[] = {
 483         {"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_ring_type_gfx_index},
 484         {"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp1_index},
 485         {"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp2_index},
 486 };
 487
 488 static int radeon_debugfs_sa_info(struct seq_file *m, void *data)
 489 {
 490         struct drm_info_node *node = (struct drm_info_node *) m->private;
 491         struct drm_device *dev = node->minor->dev;
 492         struct radeon_device *rdev = dev->dev_private;
 493
 494         radeon_sa_bo_dump_debug_info(&rdev->ring_tmp_bo, m);
 495
 496         return 0;
 497
 498 }
 499
 500 static struct drm_info_list radeon_debugfs_sa_list[] = {
 501         {"radeon_sa_info", &radeon_debugfs_sa_info, 0, NULL},
 502 };
 503
 504 #endif
 505
 506 int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)
 507 {
 508 #if defined(CONFIG_DEBUG_FS)
 509         unsigned i;
 510         for (i = 0; i < ARRAY_SIZE(radeon_debugfs_ring_info_list); ++i) {
 511                 struct drm_info_list *info = &radeon_debugfs_ring_info_list[i];
 512                 int ridx = *(int*)radeon_debugfs_ring_info_list[i].data;
 513                 unsigned r;
 514
 515                 if (&rdev->ring[ridx] != ring)
 516                         continue;
 517
 518                 r = radeon_debugfs_add_files(rdev, info, 1);
 519                 if (r)
 520                         return r;
 521         }
 522 #endif
 523         return 0;
 524 }
 525
 526 int radeon_debugfs_sa_init(struct radeon_device *rdev)
 527 {
 528 #if defined(CONFIG_DEBUG_FS)
 529         return radeon_debugfs_add_files(rdev, radeon_debugfs_sa_list, 1);
 530 #else
 531         return 0;
 532 #endif
 533 }