drivers/gpu/drm/radeon/radeon_ring.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  *          Christian König
  28  */
  29 #include <linux/seq_file.h>
  30 #include <linux/slab.h>
  31 #include "drmP.h"
  32 #include "radeon_drm.h"
  33 #include "radeon_reg.h"
  34 #include "radeon.h"
  35 #include "atom.h"
  36
  37 /*
  38  * IB.
  39  */
  40 int radeon_debugfs_sa_init(struct radeon_device *rdev);
  41
  42 u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx)
  43 {
  44         struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
  45         u32 pg_idx, pg_offset;
  46         u32 idx_value = 0;
  47         int new_page;
  48
  49         pg_idx = (idx * 4) / PAGE_SIZE;
  50         pg_offset = (idx * 4) % PAGE_SIZE;
  51
  52         if (ibc->kpage_idx[0] == pg_idx)
  53                 return ibc->kpage[0][pg_offset/4];
  54         if (ibc->kpage_idx[1] == pg_idx)
  55                 return ibc->kpage[1][pg_offset/4];
  56
  57         new_page = radeon_cs_update_pages(p, pg_idx);
  58         if (new_page < 0) {
  59                 p->parser_error = new_page;
  60                 return 0;
  61         }
  62
  63         idx_value = ibc->kpage[new_page][pg_offset/4];
  64         return idx_value;
  65 }
  66
  67 int radeon_ib_get(struct radeon_device *rdev, int ring,
  68                   struct radeon_ib **ib, unsigned size)
  69 {
  70         int r;
  71
  72         *ib = kmalloc(sizeof(struct radeon_ib), GFP_KERNEL);
  73         if (*ib == NULL) {
  74                 return -ENOMEM;
  75         }
  76         r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &(*ib)->sa_bo, size, 256, true);
  77         if (r) {
  78                 dev_err(rdev->dev, "failed to get a new IB (%d)\n", r);
  79                 kfree(*ib);
  80                 *ib = NULL;
  81                 return r;
  82         }
  83         r = radeon_fence_create(rdev, &(*ib)->fence, ring);
  84         if (r) {
  85                 dev_err(rdev->dev, "failed to create fence for new IB (%d)\n", r);
  86                 radeon_sa_bo_free(rdev, &(*ib)->sa_bo, NULL);
  87                 kfree(*ib);
  88                 *ib = NULL;
  89                 return r;
  90         }
  91
  92         (*ib)->ptr = radeon_sa_bo_cpu_addr((*ib)->sa_bo);
  93         (*ib)->gpu_addr = radeon_sa_bo_gpu_addr((*ib)->sa_bo);
  94         (*ib)->vm_id = 0;
  95         (*ib)->is_const_ib = false;
  96
  97         return 0;
  98 }
  99
 100 void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
 101 {
 102         struct radeon_ib *tmp = *ib;
 103
 104         *ib = NULL;
 105         if (tmp == NULL) {
 106                 return;
 107         }
 108         radeon_sa_bo_free(rdev, &tmp->sa_bo, tmp->fence);
 109         radeon_fence_unref(&tmp->fence);
 110         kfree(tmp);
 111 }
 112
 113 int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
 114 {
 115         struct radeon_ring *ring = &rdev->ring[ib->fence->ring];
 116         int r = 0;
 117
 118         if (!ib->length_dw || !ring->ready) {
 119                 /* TODO: Nothings in the ib we should report. */
 120                 dev_err(rdev->dev, "couldn't schedule ib\n");
 121                 return -EINVAL;
 122         }
 123
 124         /* 64 dwords should be enough for fence too */
 125         r = radeon_ring_lock(rdev, ring, 64);
 126         if (r) {
 127                 dev_err(rdev->dev, "scheduling IB failed (%d).\n", r);
 128                 return r;
 129         }
 130         radeon_ring_ib_execute(rdev, ib->fence->ring, ib);
 131         radeon_fence_emit(rdev, ib->fence);
 132         radeon_ring_unlock_commit(rdev, ring);
 133         return 0;
 134 }
 135
 136 int radeon_ib_pool_init(struct radeon_device *rdev)
 137 {
 138         int r;
 139
 140         if (rdev->ib_pool_ready) {
 141                 return 0;
 142         }
 143         r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
 144                                       RADEON_IB_POOL_SIZE*64*1024,
 145                                       RADEON_GEM_DOMAIN_GTT);
 146         if (r) {
 147                 return r;
 148         }
 149         rdev->ib_pool_ready = true;
 150         if (radeon_debugfs_sa_init(rdev)) {
 151                 dev_err(rdev->dev, "failed to register debugfs file for SA\n");
 152         }
 153         return 0;
 154 }
 155
 156 void radeon_ib_pool_fini(struct radeon_device *rdev)
 157 {
 158         if (rdev->ib_pool_ready) {
 159                 radeon_sa_bo_manager_fini(rdev, &rdev->ring_tmp_bo);
 160                 rdev->ib_pool_ready = false;
 161         }
 162 }
 163
 164 int radeon_ib_pool_start(struct radeon_device *rdev)
 165 {
 166         return radeon_sa_bo_manager_start(rdev, &rdev->ring_tmp_bo);
 167 }
 168
 169 int radeon_ib_pool_suspend(struct radeon_device *rdev)
 170 {
 171         return radeon_sa_bo_manager_suspend(rdev, &rdev->ring_tmp_bo);
 172 }
 173
 174 int radeon_ib_ring_tests(struct radeon_device *rdev)
 175 {
 176         unsigned i;
 177         int r;
 178
 179         for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 180                 struct radeon_ring *ring = &rdev->ring[i];
 181
 182                 if (!ring->ready)
 183                         continue;
 184
 185                 r = radeon_ib_test(rdev, i, ring);
 186                 if (r) {
 187                         ring->ready = false;
 188
 189                         if (i == RADEON_RING_TYPE_GFX_INDEX) {
 190                                 /* oh, oh, that's really bad */
 191                                 DRM_ERROR("radeon: failed testing IB on GFX ring (%d).\n", r);
 192                                 rdev->accel_working = false;
 193                                 return r;
 194
 195                         } else {
 196                                 /* still not good, but we can live with it */
 197                                 DRM_ERROR("radeon: failed testing IB on ring %d (%d).\n", i, r);
 198                         }
 199                 }
 200         }
 201         return 0;
 202 }
 203
 204 /*
 205  * Ring.
 206  */
 207 int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
 208
 209 void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
 210 {
 211 #if DRM_DEBUG_CODE
 212         if (ring->count_dw <= 0) {
 213                 DRM_ERROR("radeon: writting more dword to ring than expected !\n");
 214         }
 215 #endif
 216         ring->ring[ring->wptr++] = v;
 217         ring->wptr &= ring->ptr_mask;
 218         ring->count_dw--;
 219         ring->ring_free_dw--;
 220 }
 221
 222 int radeon_ring_index(struct radeon_device *rdev, struct radeon_ring *ring)
 223 {
 224         /* r1xx-r5xx only has CP ring */
 225         if (rdev->family < CHIP_R600)
 226                 return RADEON_RING_TYPE_GFX_INDEX;
 227
 228         if (rdev->family >= CHIP_CAYMAN) {
 229                 if (ring == &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX])
 230                         return CAYMAN_RING_TYPE_CP1_INDEX;
 231                 else if (ring == &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX])
 232                         return CAYMAN_RING_TYPE_CP2_INDEX;
 233         }
 234         return RADEON_RING_TYPE_GFX_INDEX;
 235 }
 236
 237 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring)
 238 {
 239         u32 rptr;
 240
 241         if (rdev->wb.enabled)
 242                 rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]);
 243         else
 244                 rptr = RREG32(ring->rptr_reg);
 245         ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
 246         /* This works because ring_size is a power of 2 */
 247         ring->ring_free_dw = (ring->rptr + (ring->ring_size / 4));
 248         ring->ring_free_dw -= ring->wptr;
 249         ring->ring_free_dw &= ring->ptr_mask;
 250         if (!ring->ring_free_dw) {
 251                 ring->ring_free_dw = ring->ring_size / 4;
 252         }
 253 }
 254
 255
 256 int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
 257 {
 258         int r;
 259
 260         /* Align requested size with padding so unlock_commit can
 261          * pad safely */
 262         ndw = (ndw + ring->align_mask) & ~ring->align_mask;
 263         while (ndw > (ring->ring_free_dw - 1)) {
 264                 radeon_ring_free_size(rdev, ring);
 265                 if (ndw < ring->ring_free_dw) {
 266                         break;
 267                 }
 268                 r = radeon_fence_wait_next_locked(rdev, radeon_ring_index(rdev, ring));
 269                 if (r)
 270                         return r;
 271         }
 272         ring->count_dw = ndw;
 273         ring->wptr_old = ring->wptr;
 274         return 0;
 275 }
 276
 277 int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
 278 {
 279         int r;
 280
 281         mutex_lock(&rdev->ring_lock);
 282         r = radeon_ring_alloc(rdev, ring, ndw);
 283         if (r) {
 284                 mutex_unlock(&rdev->ring_lock);
 285                 return r;
 286         }
 287         return 0;
 288 }
 289
 290 void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring)
 291 {
 292         unsigned count_dw_pad;
 293         unsigned i;
 294
 295         /* We pad to match fetch size */
 296         count_dw_pad = (ring->align_mask + 1) -
 297                        (ring->wptr & ring->align_mask);
 298         for (i = 0; i < count_dw_pad; i++) {
 299                 radeon_ring_write(ring, ring->nop);
 300         }
 301         DRM_MEMORYBARRIER();
 302         WREG32(ring->wptr_reg, (ring->wptr << ring->ptr_reg_shift) & ring->ptr_reg_mask);
 303         (void)RREG32(ring->wptr_reg);
 304 }
 305
 306 void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring)
 307 {
 308         radeon_ring_commit(rdev, ring);
 309         mutex_unlock(&rdev->ring_lock);
 310 }
 311
 312 void radeon_ring_undo(struct radeon_ring *ring)
 313 {
 314         ring->wptr = ring->wptr_old;
 315 }
 316
 317 void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)
 318 {
 319         radeon_ring_undo(ring);
 320         mutex_unlock(&rdev->ring_lock);
 321 }
 322
 323 void radeon_ring_force_activity(struct radeon_device *rdev, struct radeon_ring *ring)
 324 {
 325         int r;
 326
 327         radeon_ring_free_size(rdev, ring);
 328         if (ring->rptr == ring->wptr) {
 329                 r = radeon_ring_alloc(rdev, ring, 1);
 330                 if (!r) {
 331                         radeon_ring_write(ring, ring->nop);
 332                         radeon_ring_commit(rdev, ring);
 333                 }
 334         }
 335 }
 336
 337 void radeon_ring_lockup_update(struct radeon_ring *ring)
 338 {
 339         ring->last_rptr = ring->rptr;
 340         ring->last_activity = jiffies;
 341 }
 342
 343 /**
 344  * radeon_ring_test_lockup() - check if ring is lockedup by recording information
 345  * @rdev:       radeon device structure
 346  * @ring:       radeon_ring structure holding ring information
 347  *
 348  * We don't need to initialize the lockup tracking information as we will either
 349  * have CP rptr to a different value of jiffies wrap around which will force
 350  * initialization of the lockup tracking informations.
 351  *
 352  * A possible false positivie is if we get call after while and last_cp_rptr ==
 353  * the current CP rptr, even if it's unlikely it might happen. To avoid this
 354  * if the elapsed time since last call is bigger than 2 second than we return
 355  * false and update the tracking information. Due to this the caller must call
 356  * radeon_ring_test_lockup several time in less than 2sec for lockup to be reported
 357  * the fencing code should be cautious about that.
 358  *
 359  * Caller should write to the ring to force CP to do something so we don't get
 360  * false positive when CP is just gived nothing to do.
 361  *
 362  **/
 363 bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
 364 {
 365         unsigned long cjiffies, elapsed;
 366         uint32_t rptr;
 367
 368         cjiffies = jiffies;
 369         if (!time_after(cjiffies, ring->last_activity)) {
 370                 /* likely a wrap around */
 371                 radeon_ring_lockup_update(ring);
 372                 return false;
 373         }
 374         rptr = RREG32(ring->rptr_reg);
 375         ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
 376         if (ring->rptr != ring->last_rptr) {
 377                 /* CP is still working no lockup */
 378                 radeon_ring_lockup_update(ring);
 379                 return false;
 380         }
 381         elapsed = jiffies_to_msecs(cjiffies - ring->last_activity);
 382         if (radeon_lockup_timeout && elapsed >= radeon_lockup_timeout) {
 383                 dev_err(rdev->dev, "GPU lockup CP stall for more than %lumsec\n", elapsed);
 384                 return true;
 385         }
 386         /* give a chance to the GPU ... */
 387         return false;
 388 }
 389
 390 int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
 391                      unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,
 392                      u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop)
 393 {
 394         int r;
 395
 396         ring->ring_size = ring_size;
 397         ring->rptr_offs = rptr_offs;
 398         ring->rptr_reg = rptr_reg;
 399         ring->wptr_reg = wptr_reg;
 400         ring->ptr_reg_shift = ptr_reg_shift;
 401         ring->ptr_reg_mask = ptr_reg_mask;
 402         ring->nop = nop;
 403         /* Allocate ring buffer */
 404         if (ring->ring_obj == NULL) {
 405                 r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
 406                                         RADEON_GEM_DOMAIN_GTT,
 407                                         &ring->ring_obj);
 408                 if (r) {
 409                         dev_err(rdev->dev, "(%d) ring create failed\n", r);
 410                         return r;
 411                 }
 412                 r = radeon_bo_reserve(ring->ring_obj, false);
 413                 if (unlikely(r != 0))
 414                         return r;
 415                 r = radeon_bo_pin(ring->ring_obj, RADEON_GEM_DOMAIN_GTT,
 416                                         &ring->gpu_addr);
 417                 if (r) {
 418                         radeon_bo_unreserve(ring->ring_obj);
 419                         dev_err(rdev->dev, "(%d) ring pin failed\n", r);
 420                         return r;
 421                 }
 422                 r = radeon_bo_kmap(ring->ring_obj,
 423                                        (void **)&ring->ring);
 424                 radeon_bo_unreserve(ring->ring_obj);
 425                 if (r) {
 426                         dev_err(rdev->dev, "(%d) ring map failed\n", r);
 427                         return r;
 428                 }
 429         }
 430         ring->ptr_mask = (ring->ring_size / 4) - 1;
 431         ring->ring_free_dw = ring->ring_size / 4;
 432         if (radeon_debugfs_ring_init(rdev, ring)) {
 433                 DRM_ERROR("Failed to register debugfs file for rings !\n");
 434         }
 435         return 0;
 436 }
 437
 438 void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring)
 439 {
 440         int r;
 441         struct radeon_bo *ring_obj;
 442
 443         mutex_lock(&rdev->ring_lock);
 444         ring_obj = ring->ring_obj;
 445         ring->ready = false;
 446         ring->ring = NULL;
 447         ring->ring_obj = NULL;
 448         mutex_unlock(&rdev->ring_lock);
 449
 450         if (ring_obj) {
 451                 r = radeon_bo_reserve(ring_obj, false);
 452                 if (likely(r == 0)) {
 453                         radeon_bo_kunmap(ring_obj);
 454                         radeon_bo_unpin(ring_obj);
 455                         radeon_bo_unreserve(ring_obj);
 456                 }
 457                 radeon_bo_unref(&ring_obj);
 458         }
 459 }
 460
 461 /*
 462  * Debugfs info
 463  */
 464 #if defined(CONFIG_DEBUG_FS)
 465
 466 static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
 467 {
 468         struct drm_info_node *node = (struct drm_info_node *) m->private;
 469         struct drm_device *dev = node->minor->dev;
 470         struct radeon_device *rdev = dev->dev_private;
 471         int ridx = *(int*)node->info_ent->data;
 472         struct radeon_ring *ring = &rdev->ring[ridx];
 473         unsigned count, i, j;
 474
 475         radeon_ring_free_size(rdev, ring);
 476         count = (ring->ring_size / 4) - ring->ring_free_dw;
 477         seq_printf(m, "wptr(0x%04x): 0x%08x\n", ring->wptr_reg, RREG32(ring->wptr_reg));
 478         seq_printf(m, "rptr(0x%04x): 0x%08x\n", ring->rptr_reg, RREG32(ring->rptr_reg));
 479         seq_printf(m, "driver's copy of the wptr: 0x%08x\n", ring->wptr);
 480         seq_printf(m, "driver's copy of the rptr: 0x%08x\n", ring->rptr);
 481         seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
 482         seq_printf(m, "%u dwords in ring\n", count);
 483         i = ring->rptr;
 484         for (j = 0; j <= count; j++) {
 485                 seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]);
 486                 i = (i + 1) & ring->ptr_mask;
 487         }
 488         return 0;
 489 }
 490
 491 static int radeon_ring_type_gfx_index = RADEON_RING_TYPE_GFX_INDEX;
 492 static int cayman_ring_type_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
 493 static int cayman_ring_type_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX;
 494
 495 static struct drm_info_list radeon_debugfs_ring_info_list[] = {
 496         {"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_ring_type_gfx_index},
 497         {"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp1_index},
 498         {"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp2_index},
 499 };
 500
 501 static int radeon_debugfs_sa_info(struct seq_file *m, void *data)
 502 {
 503         struct drm_info_node *node = (struct drm_info_node *) m->private;
 504         struct drm_device *dev = node->minor->dev;
 505         struct radeon_device *rdev = dev->dev_private;
 506
 507         radeon_sa_bo_dump_debug_info(&rdev->ring_tmp_bo, m);
 508
 509         return 0;
 510
 511 }
 512
 513 static struct drm_info_list radeon_debugfs_sa_list[] = {
 514         {"radeon_sa_info", &radeon_debugfs_sa_info, 0, NULL},
 515 };
 516
 517 #endif
 518
 519 int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)
 520 {
 521 #if defined(CONFIG_DEBUG_FS)
 522         unsigned i;
 523         for (i = 0; i < ARRAY_SIZE(radeon_debugfs_ring_info_list); ++i) {
 524                 struct drm_info_list *info = &radeon_debugfs_ring_info_list[i];
 525                 int ridx = *(int*)radeon_debugfs_ring_info_list[i].data;
 526                 unsigned r;
 527
 528                 if (&rdev->ring[ridx] != ring)
 529                         continue;
 530
 531                 r = radeon_debugfs_add_files(rdev, info, 1);
 532                 if (r)
 533                         return r;
 534         }
 535 #endif
 536         return 0;
 537 }
 538
 539 int radeon_debugfs_sa_init(struct radeon_device *rdev)
 540 {
 541 #if defined(CONFIG_DEBUG_FS)
 542         return radeon_debugfs_add_files(rdev, radeon_debugfs_sa_list, 1);
 543 #else
 544         return 0;
 545 #endif
 546 }