2 * Copyright (C) STMicroelectronics SA 2014
3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
4 * License terms: GNU General Public License (GPL), version 2
8 #include <linux/component.h>
9 #include <linux/hdmi.h>
10 #include <linux/module.h>
11 #include <linux/of_gpio.h>
12 #include <linux/platform_device.h>
13 #include <linux/reset.h>
16 #include <drm/drm_crtc_helper.h>
17 #include <drm/drm_edid.h>
20 #include "sti_hdmi_tx3g4c28phy.h"
21 #include "sti_hdmi_tx3g0c55phy.h"
24 #define HDMI_CFG 0x0000
25 #define HDMI_INT_EN 0x0004
26 #define HDMI_INT_STA 0x0008
27 #define HDMI_INT_CLR 0x000C
28 #define HDMI_STA 0x0010
29 #define HDMI_ACTIVE_VID_XMIN 0x0100
30 #define HDMI_ACTIVE_VID_XMAX 0x0104
31 #define HDMI_ACTIVE_VID_YMIN 0x0108
32 #define HDMI_ACTIVE_VID_YMAX 0x010C
33 #define HDMI_DFLT_CHL0_DAT 0x0110
34 #define HDMI_DFLT_CHL1_DAT 0x0114
35 #define HDMI_DFLT_CHL2_DAT 0x0118
36 #define HDMI_SW_DI_1_HEAD_WORD 0x0210
37 #define HDMI_SW_DI_1_PKT_WORD0 0x0214
38 #define HDMI_SW_DI_1_PKT_WORD1 0x0218
39 #define HDMI_SW_DI_1_PKT_WORD2 0x021C
40 #define HDMI_SW_DI_1_PKT_WORD3 0x0220
41 #define HDMI_SW_DI_1_PKT_WORD4 0x0224
42 #define HDMI_SW_DI_1_PKT_WORD5 0x0228
43 #define HDMI_SW_DI_1_PKT_WORD6 0x022C
44 #define HDMI_SW_DI_CFG 0x0230
46 #define HDMI_IFRAME_SLOT_AVI 1
48 #define XCAT(prefix, x, suffix) prefix ## x ## suffix
49 #define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD)
50 #define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0)
51 #define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1)
52 #define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2)
53 #define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3)
54 #define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4)
55 #define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5)
56 #define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6)
58 #define HDMI_IFRAME_DISABLED 0x0
59 #define HDMI_IFRAME_SINGLE_SHOT 0x1
60 #define HDMI_IFRAME_FIELD 0x2
61 #define HDMI_IFRAME_FRAME 0x3
62 #define HDMI_IFRAME_MASK 0x3
63 #define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */
65 #define HDMI_CFG_DEVICE_EN BIT(0)
66 #define HDMI_CFG_HDMI_NOT_DVI BIT(1)
67 #define HDMI_CFG_HDCP_EN BIT(2)
68 #define HDMI_CFG_ESS_NOT_OESS BIT(3)
69 #define HDMI_CFG_H_SYNC_POL_NEG BIT(4)
70 #define HDMI_CFG_SINK_TERM_DET_EN BIT(5)
71 #define HDMI_CFG_V_SYNC_POL_NEG BIT(6)
72 #define HDMI_CFG_422_EN BIT(8)
73 #define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12)
74 #define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13)
75 #define HDMI_CFG_SW_RST_EN BIT(31)
77 #define HDMI_INT_GLOBAL BIT(0)
78 #define HDMI_INT_SW_RST BIT(1)
79 #define HDMI_INT_PIX_CAP BIT(3)
80 #define HDMI_INT_HOT_PLUG BIT(4)
81 #define HDMI_INT_DLL_LCK BIT(5)
82 #define HDMI_INT_NEW_FRAME BIT(6)
83 #define HDMI_INT_GENCTRL_PKT BIT(7)
84 #define HDMI_INT_SINK_TERM_PRESENT BIT(11)
86 #define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
91 #define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
92 | HDMI_INT_GENCTRL_PKT \
93 | HDMI_INT_NEW_FRAME \
100 #define HDMI_STA_SW_RST BIT(1)
102 struct sti_hdmi_connector {
103 struct drm_connector drm_connector;
104 struct drm_encoder *encoder;
105 struct sti_hdmi *hdmi;
108 #define to_sti_hdmi_connector(x) \
109 container_of(x, struct sti_hdmi_connector, drm_connector)
111 u32 hdmi_read(struct sti_hdmi *hdmi, int offset)
113 return readl(hdmi->regs + offset);
116 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset)
118 writel(val, hdmi->regs + offset);
122 * HDMI interrupt handler threaded
125 * @arg: connector structure
127 static irqreturn_t hdmi_irq_thread(int irq, void *arg)
129 struct sti_hdmi *hdmi = arg;
131 /* Hot plug/unplug IRQ */
132 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) {
133 /* read gpio to get the status */
134 hdmi->hpd = gpio_get_value(hdmi->hpd_gpio);
136 drm_helper_hpd_irq_event(hdmi->drm_dev);
139 /* Sw reset and PLL lock are exclusive so we can use the same
140 * event to signal them
142 if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) {
143 hdmi->event_received = true;
144 wake_up_interruptible(&hdmi->wait_event);
151 * HDMI interrupt handler
154 * @arg: connector structure
156 static irqreturn_t hdmi_irq(int irq, void *arg)
158 struct sti_hdmi *hdmi = arg;
160 /* read interrupt status */
161 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA);
163 /* clear interrupt status */
164 hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
166 /* force sync bus write */
167 hdmi_read(hdmi, HDMI_INT_STA);
169 return IRQ_WAKE_THREAD;
173 * Set hdmi active area depending on the drm display mode selected
175 * @hdmi: pointer on the hdmi internal structure
177 static void hdmi_active_area(struct sti_hdmi *hdmi)
182 xmin = sti_vtg_get_pixel_number(hdmi->mode, 0);
183 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay - 1);
184 ymin = sti_vtg_get_line_number(hdmi->mode, 0);
185 ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1);
187 hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
188 hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
189 hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
190 hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
194 * Overall hdmi configuration
196 * @hdmi: pointer on the hdmi internal structure
198 static void hdmi_config(struct sti_hdmi *hdmi)
202 DRM_DEBUG_DRIVER("\n");
204 /* Clear overrun and underrun fifo */
205 conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR;
207 /* Enable HDMI mode not DVI */
208 conf |= HDMI_CFG_HDMI_NOT_DVI | HDMI_CFG_ESS_NOT_OESS;
210 /* Enable sink term detection */
211 conf |= HDMI_CFG_SINK_TERM_DET_EN;
213 /* Set Hsync polarity */
214 if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) {
215 DRM_DEBUG_DRIVER("H Sync Negative\n");
216 conf |= HDMI_CFG_H_SYNC_POL_NEG;
219 /* Set Vsync polarity */
220 if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) {
221 DRM_DEBUG_DRIVER("V Sync Negative\n");
222 conf |= HDMI_CFG_V_SYNC_POL_NEG;
226 conf |= HDMI_CFG_DEVICE_EN;
228 hdmi_write(hdmi, conf, HDMI_CFG);
232 * Prepare and configure the AVI infoframe
234 * AVI infoframe are transmitted at least once per two video field and
235 * contains information about HDMI transmission mode such as color space,
238 * @hdmi: pointer on the hdmi internal structure
240 * Return negative value if error occurs
242 static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
244 struct drm_display_mode *mode = &hdmi->mode;
245 struct hdmi_avi_infoframe infoframe;
246 u8 buffer[HDMI_INFOFRAME_SIZE(AVI)];
247 u8 *frame = buffer + HDMI_INFOFRAME_HEADER_SIZE;
251 DRM_DEBUG_DRIVER("\n");
253 ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, mode);
255 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret);
259 /* fixed infoframe configuration not linked to the mode */
260 infoframe.colorspace = HDMI_COLORSPACE_RGB;
261 infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
262 infoframe.colorimetry = HDMI_COLORIMETRY_NONE;
264 ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer));
266 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
270 /* Disable transmission slot for AVI infoframe */
271 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
272 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, HDMI_IFRAME_SLOT_AVI);
273 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
275 /* Infoframe header */
277 val |= buffer[0x1] << 8;
278 val |= buffer[0x2] << 16;
279 hdmi_write(hdmi, val, HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI));
281 /* Infoframe packet bytes */
283 val |= frame[0x1] << 8;
284 val |= frame[0x2] << 16;
285 val |= frame[0x3] << 24;
286 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI));
289 val |= frame[0x5] << 8;
290 val |= frame[0x6] << 16;
291 val |= frame[0x7] << 24;
292 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD1(HDMI_IFRAME_SLOT_AVI));
295 val |= frame[0x9] << 8;
296 val |= frame[0xA] << 16;
297 val |= frame[0xB] << 24;
298 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD2(HDMI_IFRAME_SLOT_AVI));
301 val |= frame[0xD] << 8;
302 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD3(HDMI_IFRAME_SLOT_AVI));
304 /* Enable transmission slot for AVI infoframe
305 * According to the hdmi specification, AVI infoframe should be
306 * transmitted at least once per two video fields
308 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
309 val |= HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_FIELD, HDMI_IFRAME_SLOT_AVI);
310 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
316 * Software reset of the hdmi subsystem
318 * @hdmi: pointer on the hdmi internal structure
321 #define HDMI_TIMEOUT_SWRESET 100 /*milliseconds */
322 static void hdmi_swreset(struct sti_hdmi *hdmi)
326 DRM_DEBUG_DRIVER("\n");
328 /* Enable hdmi_audio clock only during hdmi reset */
329 if (clk_prepare_enable(hdmi->clk_audio))
330 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n");
333 hdmi->event_received = false;
335 val = hdmi_read(hdmi, HDMI_CFG);
336 val |= HDMI_CFG_SW_RST_EN;
337 hdmi_write(hdmi, val, HDMI_CFG);
339 /* Wait reset completed */
340 wait_event_interruptible_timeout(hdmi->wait_event,
341 hdmi->event_received == true,
343 (HDMI_TIMEOUT_SWRESET));
346 * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is
347 * set to '1' and clk_audio is running.
349 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0)
350 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n");
352 val = hdmi_read(hdmi, HDMI_CFG);
353 val &= ~HDMI_CFG_SW_RST_EN;
354 hdmi_write(hdmi, val, HDMI_CFG);
356 /* Disable hdmi_audio clock. Not used anymore for drm purpose */
357 clk_disable_unprepare(hdmi->clk_audio);
360 static void sti_hdmi_disable(struct drm_bridge *bridge)
362 struct sti_hdmi *hdmi = bridge->driver_private;
364 u32 val = hdmi_read(hdmi, HDMI_CFG);
369 DRM_DEBUG_DRIVER("\n");
372 val &= ~HDMI_CFG_DEVICE_EN;
373 hdmi_write(hdmi, val, HDMI_CFG);
375 hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
378 hdmi->phy_ops->stop(hdmi);
380 /* Set the default channel data to be a dark red */
381 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
382 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
383 hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
385 /* Disable/unprepare hdmi clock */
386 clk_disable_unprepare(hdmi->clk_phy);
387 clk_disable_unprepare(hdmi->clk_tmds);
388 clk_disable_unprepare(hdmi->clk_pix);
390 hdmi->enabled = false;
393 static void sti_hdmi_pre_enable(struct drm_bridge *bridge)
395 struct sti_hdmi *hdmi = bridge->driver_private;
397 DRM_DEBUG_DRIVER("\n");
402 /* Prepare/enable clocks */
403 if (clk_prepare_enable(hdmi->clk_pix))
404 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n");
405 if (clk_prepare_enable(hdmi->clk_tmds))
406 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n");
407 if (clk_prepare_enable(hdmi->clk_phy))
408 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n");
410 hdmi->enabled = true;
412 /* Program hdmi serializer and start phy */
413 if (!hdmi->phy_ops->start(hdmi)) {
414 DRM_ERROR("Unable to start hdmi phy\n");
418 /* Program hdmi active area */
419 hdmi_active_area(hdmi);
421 /* Enable working interrupts */
422 hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
424 /* Program hdmi config */
427 /* Program AVI infoframe */
428 if (hdmi_avi_infoframe_config(hdmi))
429 DRM_ERROR("Unable to configure AVI infoframe\n");
435 static void sti_hdmi_set_mode(struct drm_bridge *bridge,
436 struct drm_display_mode *mode,
437 struct drm_display_mode *adjusted_mode)
439 struct sti_hdmi *hdmi = bridge->driver_private;
442 DRM_DEBUG_DRIVER("\n");
444 /* Copy the drm display mode in the connector local structure */
445 memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode));
447 /* Update clock framerate according to the selected mode */
448 ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);
450 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n",
454 ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);
456 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n",
462 static void sti_hdmi_bridge_nope(struct drm_bridge *bridge)
467 static void sti_hdmi_brigde_destroy(struct drm_bridge *bridge)
469 drm_bridge_cleanup(bridge);
473 static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = {
474 .pre_enable = sti_hdmi_pre_enable,
475 .enable = sti_hdmi_bridge_nope,
476 .disable = sti_hdmi_disable,
477 .post_disable = sti_hdmi_bridge_nope,
478 .mode_set = sti_hdmi_set_mode,
479 .destroy = sti_hdmi_brigde_destroy,
482 static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
484 struct i2c_adapter *i2c_adap;
488 DRM_DEBUG_DRIVER("\n");
490 i2c_adap = i2c_get_adapter(1);
494 edid = drm_get_edid(connector, i2c_adap);
498 count = drm_add_edid_modes(connector, edid);
499 drm_mode_connector_update_edid_property(connector, edid);
505 DRM_ERROR("Can not read HDMI EDID\n");
509 #define CLK_TOLERANCE_HZ 50
511 static int sti_hdmi_connector_mode_valid(struct drm_connector *connector,
512 struct drm_display_mode *mode)
514 int target = mode->clock * 1000;
515 int target_min = target - CLK_TOLERANCE_HZ;
516 int target_max = target + CLK_TOLERANCE_HZ;
518 struct sti_hdmi_connector *hdmi_connector
519 = to_sti_hdmi_connector(connector);
520 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
523 result = clk_round_rate(hdmi->clk_pix, target);
525 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
528 if ((result < target_min) || (result > target_max)) {
529 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target);
536 struct drm_encoder *sti_hdmi_best_encoder(struct drm_connector *connector)
538 struct sti_hdmi_connector *hdmi_connector
539 = to_sti_hdmi_connector(connector);
541 /* Best encoder is the one associated during connector creation */
542 return hdmi_connector->encoder;
545 static struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = {
546 .get_modes = sti_hdmi_connector_get_modes,
547 .mode_valid = sti_hdmi_connector_mode_valid,
548 .best_encoder = sti_hdmi_best_encoder,
551 /* get detection status of display device */
552 static enum drm_connector_status
553 sti_hdmi_connector_detect(struct drm_connector *connector, bool force)
555 struct sti_hdmi_connector *hdmi_connector
556 = to_sti_hdmi_connector(connector);
557 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
559 DRM_DEBUG_DRIVER("\n");
562 DRM_DEBUG_DRIVER("hdmi cable connected\n");
563 return connector_status_connected;
566 DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
567 return connector_status_disconnected;
570 static void sti_hdmi_connector_destroy(struct drm_connector *connector)
572 struct sti_hdmi_connector *hdmi_connector
573 = to_sti_hdmi_connector(connector);
575 drm_connector_unregister(connector);
576 drm_connector_cleanup(connector);
577 kfree(hdmi_connector);
580 static struct drm_connector_funcs sti_hdmi_connector_funcs = {
581 .dpms = drm_helper_connector_dpms,
582 .fill_modes = drm_helper_probe_single_connector_modes,
583 .detect = sti_hdmi_connector_detect,
584 .destroy = sti_hdmi_connector_destroy,
587 static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev)
589 struct drm_encoder *encoder;
591 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
592 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
599 static int sti_hdmi_bind(struct device *dev, struct device *master, void *data)
601 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
602 struct drm_device *drm_dev = data;
603 struct drm_encoder *encoder;
604 struct sti_hdmi_connector *connector;
605 struct drm_connector *drm_connector;
606 struct drm_bridge *bridge;
607 struct i2c_adapter *i2c_adap;
610 i2c_adap = i2c_get_adapter(1);
612 return -EPROBE_DEFER;
614 /* Set the drm device handle */
615 hdmi->drm_dev = drm_dev;
617 encoder = sti_hdmi_find_encoder(drm_dev);
621 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
625 connector->hdmi = hdmi;
627 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
631 bridge->driver_private = hdmi;
632 drm_bridge_init(drm_dev, bridge, &sti_hdmi_bridge_funcs);
634 encoder->bridge = bridge;
635 connector->encoder = encoder;
637 drm_connector = (struct drm_connector *)connector;
639 drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
641 drm_connector_init(drm_dev, drm_connector,
642 &sti_hdmi_connector_funcs, DRM_MODE_CONNECTOR_HDMIA);
643 drm_connector_helper_add(drm_connector,
644 &sti_hdmi_connector_helper_funcs);
646 err = drm_connector_register(drm_connector);
650 err = drm_mode_connector_attach_encoder(drm_connector, encoder);
652 DRM_ERROR("Failed to attach a connector to a encoder\n");
656 /* Enable default interrupts */
657 hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
662 drm_connector_unregister(drm_connector);
664 drm_bridge_cleanup(bridge);
665 drm_connector_cleanup(drm_connector);
669 static void sti_hdmi_unbind(struct device *dev,
670 struct device *master, void *data)
675 static const struct component_ops sti_hdmi_ops = {
676 .bind = sti_hdmi_bind,
677 .unbind = sti_hdmi_unbind,
680 static struct of_device_id hdmi_of_match[] = {
682 .compatible = "st,stih416-hdmi",
683 .data = &tx3g0c55phy_ops,
685 .compatible = "st,stih407-hdmi",
686 .data = &tx3g4c28phy_ops,
691 MODULE_DEVICE_TABLE(of, hdmi_of_match);
693 static int sti_hdmi_probe(struct platform_device *pdev)
695 struct device *dev = &pdev->dev;
696 struct sti_hdmi *hdmi;
697 struct device_node *np = dev->of_node;
698 struct resource *res;
701 DRM_INFO("%s\n", __func__);
703 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
707 hdmi->dev = pdev->dev;
710 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg");
712 DRM_ERROR("Invalid hdmi resource\n");
715 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
716 if (IS_ERR(hdmi->regs))
717 return PTR_ERR(hdmi->regs);
719 if (of_device_is_compatible(np, "st,stih416-hdmi")) {
720 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
723 DRM_ERROR("Invalid syscfg resource\n");
726 hdmi->syscfg = devm_ioremap_nocache(dev, res->start,
728 if (IS_ERR(hdmi->syscfg))
729 return PTR_ERR(hdmi->syscfg);
733 hdmi->phy_ops = (struct hdmi_phy_ops *)
734 of_match_node(hdmi_of_match, np)->data;
736 /* Get clock resources */
737 hdmi->clk_pix = devm_clk_get(dev, "pix");
738 if (IS_ERR(hdmi->clk_pix)) {
739 DRM_ERROR("Cannot get hdmi_pix clock\n");
740 return PTR_ERR(hdmi->clk_pix);
743 hdmi->clk_tmds = devm_clk_get(dev, "tmds");
744 if (IS_ERR(hdmi->clk_tmds)) {
745 DRM_ERROR("Cannot get hdmi_tmds clock\n");
746 return PTR_ERR(hdmi->clk_tmds);
749 hdmi->clk_phy = devm_clk_get(dev, "phy");
750 if (IS_ERR(hdmi->clk_phy)) {
751 DRM_ERROR("Cannot get hdmi_phy clock\n");
752 return PTR_ERR(hdmi->clk_phy);
755 hdmi->clk_audio = devm_clk_get(dev, "audio");
756 if (IS_ERR(hdmi->clk_audio)) {
757 DRM_ERROR("Cannot get hdmi_audio clock\n");
758 return PTR_ERR(hdmi->clk_audio);
761 hdmi->hpd_gpio = of_get_named_gpio(np, "hdmi,hpd-gpio", 0);
762 if (hdmi->hpd_gpio < 0) {
763 DRM_ERROR("Failed to get hdmi hpd-gpio\n");
767 hdmi->hpd = gpio_get_value(hdmi->hpd_gpio);
769 init_waitqueue_head(&hdmi->wait_event);
771 hdmi->irq = platform_get_irq_byname(pdev, "irq");
773 ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq,
774 hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi);
776 DRM_ERROR("Failed to register HDMI interrupt\n");
780 hdmi->reset = devm_reset_control_get(dev, "hdmi");
781 /* Take hdmi out of reset */
782 if (!IS_ERR(hdmi->reset))
783 reset_control_deassert(hdmi->reset);
785 platform_set_drvdata(pdev, hdmi);
787 return component_add(&pdev->dev, &sti_hdmi_ops);
790 static int sti_hdmi_remove(struct platform_device *pdev)
792 component_del(&pdev->dev, &sti_hdmi_ops);
796 struct platform_driver sti_hdmi_driver = {
799 .owner = THIS_MODULE,
800 .of_match_table = hdmi_of_match,
802 .probe = sti_hdmi_probe,
803 .remove = sti_hdmi_remove,
806 module_platform_driver(sti_hdmi_driver);
808 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
809 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
810 MODULE_LICENSE("GPL");