drivers/gpu/drm/tilcdc/tilcdc_drv.c

   1 /*
   2  * Copyright (C) 2012 Texas Instruments
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 /* LCDC DRM driver, based on da8xx-fb */
  19
  20 #include "tilcdc_drv.h"
  21 #include "tilcdc_regs.h"
  22 #include "tilcdc_tfp410.h"
  23 #include "tilcdc_panel.h"
  24
  25 #include "drm_fb_helper.h"
  26
  27 static LIST_HEAD(module_list);
  28
  29 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  30                 const struct tilcdc_module_ops *funcs)
  31 {
  32         mod->name = name;
  33         mod->funcs = funcs;
  34         INIT_LIST_HEAD(&mod->list);
  35         list_add(&mod->list, &module_list);
  36 }
  37
  38 void tilcdc_module_cleanup(struct tilcdc_module *mod)
  39 {
  40         list_del(&mod->list);
  41 }
  42
  43 static struct of_device_id tilcdc_of_match[];
  44
  45 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
  46                 struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
  47 {
  48         return drm_fb_cma_create(dev, file_priv, mode_cmd);
  49 }
  50
  51 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
  52 {
  53         struct tilcdc_drm_private *priv = dev->dev_private;
  54         drm_fbdev_cma_hotplug_event(priv->fbdev);
  55 }
  56
  57 static const struct drm_mode_config_funcs mode_config_funcs = {
  58         .fb_create = tilcdc_fb_create,
  59         .output_poll_changed = tilcdc_fb_output_poll_changed,
  60 };
  61
  62 static int modeset_init(struct drm_device *dev)
  63 {
  64         struct tilcdc_drm_private *priv = dev->dev_private;
  65         struct tilcdc_module *mod;
  66
  67         drm_mode_config_init(dev);
  68
  69         priv->crtc = tilcdc_crtc_create(dev);
  70
  71         list_for_each_entry(mod, &module_list, list) {
  72                 DBG("loading module: %s", mod->name);
  73                 mod->funcs->modeset_init(mod, dev);
  74         }
  75
  76         if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
  77                 /* oh nos! */
  78                 dev_err(dev->dev, "no encoders/connectors found\n");
  79                 drm_mode_config_cleanup(dev);
  80                 return -ENXIO;
  81         }
  82
  83         dev->mode_config.min_width = 0;
  84         dev->mode_config.min_height = 0;
  85         dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
  86         dev->mode_config.max_height = 2048;
  87         dev->mode_config.funcs = &mode_config_funcs;
  88
  89         return 0;
  90 }
  91
  92 #ifdef CONFIG_CPU_FREQ
  93 static int cpufreq_transition(struct notifier_block *nb,
  94                                      unsigned long val, void *data)
  95 {
  96         struct tilcdc_drm_private *priv = container_of(nb,
  97                         struct tilcdc_drm_private, freq_transition);
  98         if (val == CPUFREQ_POSTCHANGE) {
  99                 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
 100                         priv->lcd_fck_rate = clk_get_rate(priv->clk);
 101                         tilcdc_crtc_update_clk(priv->crtc);
 102                 }
 103         }
 104
 105         return 0;
 106 }
 107 #endif
 108
 109 /*
 110  * DRM operations:
 111  */
 112
 113 static int tilcdc_unload(struct drm_device *dev)
 114 {
 115         struct tilcdc_drm_private *priv = dev->dev_private;
 116
 117         drm_fbdev_cma_fini(priv->fbdev);
 118         drm_kms_helper_poll_fini(dev);
 119         drm_mode_config_cleanup(dev);
 120         drm_vblank_cleanup(dev);
 121
 122         pm_runtime_get_sync(dev->dev);
 123         drm_irq_uninstall(dev);
 124         pm_runtime_put_sync(dev->dev);
 125
 126 #ifdef CONFIG_CPU_FREQ
 127         cpufreq_unregister_notifier(&priv->freq_transition,
 128                         CPUFREQ_TRANSITION_NOTIFIER);
 129 #endif
 130
 131         if (priv->clk)
 132                 clk_put(priv->clk);
 133
 134         if (priv->mmio)
 135                 iounmap(priv->mmio);
 136
 137         flush_workqueue(priv->wq);
 138         destroy_workqueue(priv->wq);
 139
 140         dev->dev_private = NULL;
 141
 142         pm_runtime_disable(dev->dev);
 143
 144         kfree(priv);
 145
 146         return 0;
 147 }
 148
 149 static int tilcdc_load(struct drm_device *dev, unsigned long flags)
 150 {
 151         struct platform_device *pdev = dev->platformdev;
 152         struct device_node *node = pdev->dev.of_node;
 153         struct tilcdc_drm_private *priv;
 154         struct tilcdc_module *mod;
 155         struct resource *res;
 156         u32 bpp = 0;
 157         int ret;
 158
 159         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 160         if (!priv) {
 161                 dev_err(dev->dev, "failed to allocate private data\n");
 162                 return -ENOMEM;
 163         }
 164
 165         dev->dev_private = priv;
 166
 167         priv->wq = alloc_ordered_workqueue("tilcdc", 0);
 168         if (!priv->wq) {
 169                 ret = -ENOMEM;
 170                 goto fail_free_priv;
 171         }
 172
 173         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 174         if (!res) {
 175                 dev_err(dev->dev, "failed to get memory resource\n");
 176                 ret = -EINVAL;
 177                 goto fail_free_wq;
 178         }
 179
 180         priv->mmio = ioremap_nocache(res->start, resource_size(res));
 181         if (!priv->mmio) {
 182                 dev_err(dev->dev, "failed to ioremap\n");
 183                 ret = -ENOMEM;
 184                 goto fail_free_wq;
 185         }
 186
 187         priv->clk = clk_get(dev->dev, "fck");
 188         if (IS_ERR(priv->clk)) {
 189                 dev_err(dev->dev, "failed to get functional clock\n");
 190                 ret = -ENODEV;
 191                 goto fail_iounmap;
 192         }
 193
 194         priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
 195         if (IS_ERR(priv->clk)) {
 196                 dev_err(dev->dev, "failed to get display clock\n");
 197                 ret = -ENODEV;
 198                 goto fail_put_clk;
 199         }
 200
 201 #ifdef CONFIG_CPU_FREQ
 202         priv->lcd_fck_rate = clk_get_rate(priv->clk);
 203         priv->freq_transition.notifier_call = cpufreq_transition;
 204         ret = cpufreq_register_notifier(&priv->freq_transition,
 205                         CPUFREQ_TRANSITION_NOTIFIER);
 206         if (ret) {
 207                 dev_err(dev->dev, "failed to register cpufreq notifier\n");
 208                 goto fail_put_disp_clk;
 209         }
 210 #endif
 211
 212         if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
 213                 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
 214
 215         DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
 216
 217         if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
 218                 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
 219
 220         DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
 221
 222         if (of_property_read_u32(node, "ti,max-pixelclock",
 223                                         &priv->max_pixelclock))
 224                 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
 225
 226         DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
 227
 228         pm_runtime_enable(dev->dev);
 229
 230         /* Determine LCD IP Version */
 231         pm_runtime_get_sync(dev->dev);
 232         switch (tilcdc_read(dev, LCDC_PID_REG)) {
 233         case 0x4c100102:
 234                 priv->rev = 1;
 235                 break;
 236         case 0x4f200800:
 237         case 0x4f201000:
 238                 priv->rev = 2;
 239                 break;
 240         default:
 241                 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
 242                                 "defaulting to LCD revision 1\n",
 243                                 tilcdc_read(dev, LCDC_PID_REG));
 244                 priv->rev = 1;
 245                 break;
 246         }
 247
 248         pm_runtime_put_sync(dev->dev);
 249
 250         ret = modeset_init(dev);
 251         if (ret < 0) {
 252                 dev_err(dev->dev, "failed to initialize mode setting\n");
 253                 goto fail_cpufreq_unregister;
 254         }
 255
 256         ret = drm_vblank_init(dev, 1);
 257         if (ret < 0) {
 258                 dev_err(dev->dev, "failed to initialize vblank\n");
 259                 goto fail_mode_config_cleanup;
 260         }
 261
 262         pm_runtime_get_sync(dev->dev);
 263         ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
 264         pm_runtime_put_sync(dev->dev);
 265         if (ret < 0) {
 266                 dev_err(dev->dev, "failed to install IRQ handler\n");
 267                 goto fail_vblank_cleanup;
 268         }
 269
 270         platform_set_drvdata(pdev, dev);
 271
 272
 273         list_for_each_entry(mod, &module_list, list) {
 274                 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
 275                 bpp = mod->preferred_bpp;
 276                 if (bpp > 0)
 277                         break;
 278         }
 279
 280         priv->fbdev = drm_fbdev_cma_init(dev, bpp,
 281                         dev->mode_config.num_crtc,
 282                         dev->mode_config.num_connector);
 283         if (IS_ERR(priv->fbdev)) {
 284                 ret = PTR_ERR(priv->fbdev);
 285                 goto fail_irq_uninstall;
 286         }
 287
 288         drm_kms_helper_poll_init(dev);
 289
 290         return 0;
 291
 292 fail_irq_uninstall:
 293         pm_runtime_get_sync(dev->dev);
 294         drm_irq_uninstall(dev);
 295         pm_runtime_put_sync(dev->dev);
 296
 297 fail_vblank_cleanup:
 298         drm_vblank_cleanup(dev);
 299
 300 fail_mode_config_cleanup:
 301         drm_mode_config_cleanup(dev);
 302
 303 fail_cpufreq_unregister:
 304         pm_runtime_disable(dev->dev);
 305 #ifdef CONFIG_CPU_FREQ
 306         cpufreq_unregister_notifier(&priv->freq_transition,
 307                         CPUFREQ_TRANSITION_NOTIFIER);
 308 fail_put_disp_clk:
 309         clk_put(priv->disp_clk);
 310 #endif
 311
 312 fail_put_clk:
 313         clk_put(priv->clk);
 314
 315 fail_iounmap:
 316         iounmap(priv->mmio);
 317
 318 fail_free_wq:
 319         flush_workqueue(priv->wq);
 320         destroy_workqueue(priv->wq);
 321
 322 fail_free_priv:
 323         dev->dev_private = NULL;
 324         kfree(priv);
 325         return ret;
 326 }
 327
 328 static void tilcdc_preclose(struct drm_device *dev, struct drm_file *file)
 329 {
 330         struct tilcdc_drm_private *priv = dev->dev_private;
 331
 332         tilcdc_crtc_cancel_page_flip(priv->crtc, file);
 333 }
 334
 335 static void tilcdc_lastclose(struct drm_device *dev)
 336 {
 337         struct tilcdc_drm_private *priv = dev->dev_private;
 338         drm_fbdev_cma_restore_mode(priv->fbdev);
 339 }
 340
 341 static irqreturn_t tilcdc_irq(int irq, void *arg)
 342 {
 343         struct drm_device *dev = arg;
 344         struct tilcdc_drm_private *priv = dev->dev_private;
 345         return tilcdc_crtc_irq(priv->crtc);
 346 }
 347
 348 static void tilcdc_irq_preinstall(struct drm_device *dev)
 349 {
 350         tilcdc_clear_irqstatus(dev, 0xffffffff);
 351 }
 352
 353 static int tilcdc_irq_postinstall(struct drm_device *dev)
 354 {
 355         struct tilcdc_drm_private *priv = dev->dev_private;
 356
 357         /* enable FIFO underflow irq: */
 358         if (priv->rev == 1)
 359                 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
 360         else
 361                 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
 362
 363         return 0;
 364 }
 365
 366 static void tilcdc_irq_uninstall(struct drm_device *dev)
 367 {
 368         struct tilcdc_drm_private *priv = dev->dev_private;
 369
 370         /* disable irqs that we might have enabled: */
 371         if (priv->rev == 1) {
 372                 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
 373                                 LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
 374                 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
 375         } else {
 376                 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
 377                         LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
 378                         LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
 379                         LCDC_FRAME_DONE);
 380         }
 381
 382 }
 383
 384 static void enable_vblank(struct drm_device *dev, bool enable)
 385 {
 386         struct tilcdc_drm_private *priv = dev->dev_private;
 387         u32 reg, mask;
 388
 389         if (priv->rev == 1) {
 390                 reg = LCDC_DMA_CTRL_REG;
 391                 mask = LCDC_V1_END_OF_FRAME_INT_ENA;
 392         } else {
 393                 reg = LCDC_INT_ENABLE_SET_REG;
 394                 mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
 395                         LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
 396         }
 397
 398         if (enable)
 399                 tilcdc_set(dev, reg, mask);
 400         else
 401                 tilcdc_clear(dev, reg, mask);
 402 }
 403
 404 static int tilcdc_enable_vblank(struct drm_device *dev, int crtc)
 405 {
 406         enable_vblank(dev, true);
 407         return 0;
 408 }
 409
 410 static void tilcdc_disable_vblank(struct drm_device *dev, int crtc)
 411 {
 412         enable_vblank(dev, false);
 413 }
 414
 415 #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
 416 static const struct {
 417         const char *name;
 418         uint8_t  rev;
 419         uint8_t  save;
 420         uint32_t reg;
 421 } registers[] =         {
 422 #define REG(rev, save, reg) { #reg, rev, save, reg }
 423                 /* exists in revision 1: */
 424                 REG(1, false, LCDC_PID_REG),
 425                 REG(1, true,  LCDC_CTRL_REG),
 426                 REG(1, false, LCDC_STAT_REG),
 427                 REG(1, true,  LCDC_RASTER_CTRL_REG),
 428                 REG(1, true,  LCDC_RASTER_TIMING_0_REG),
 429                 REG(1, true,  LCDC_RASTER_TIMING_1_REG),
 430                 REG(1, true,  LCDC_RASTER_TIMING_2_REG),
 431                 REG(1, true,  LCDC_DMA_CTRL_REG),
 432                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),
 433                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_0_REG),
 434                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_1_REG),
 435                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_1_REG),
 436                 /* new in revision 2: */
 437                 REG(2, false, LCDC_RAW_STAT_REG),
 438                 REG(2, false, LCDC_MASKED_STAT_REG),
 439                 REG(2, false, LCDC_INT_ENABLE_SET_REG),
 440                 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
 441                 REG(2, false, LCDC_END_OF_INT_IND_REG),
 442                 REG(2, true,  LCDC_CLK_ENABLE_REG),
 443                 REG(2, true,  LCDC_INT_ENABLE_SET_REG),
 444 #undef REG
 445 };
 446 #endif
 447
 448 #ifdef CONFIG_DEBUG_FS
 449 static int tilcdc_regs_show(struct seq_file *m, void *arg)
 450 {
 451         struct drm_info_node *node = (struct drm_info_node *) m->private;
 452         struct drm_device *dev = node->minor->dev;
 453         struct tilcdc_drm_private *priv = dev->dev_private;
 454         unsigned i;
 455
 456         pm_runtime_get_sync(dev->dev);
 457
 458         seq_printf(m, "revision: %d\n", priv->rev);
 459
 460         for (i = 0; i < ARRAY_SIZE(registers); i++)
 461                 if (priv->rev >= registers[i].rev)
 462                         seq_printf(m, "%s:\t %08x\n", registers[i].name,
 463                                         tilcdc_read(dev, registers[i].reg));
 464
 465         pm_runtime_put_sync(dev->dev);
 466
 467         return 0;
 468 }
 469
 470 static int tilcdc_mm_show(struct seq_file *m, void *arg)
 471 {
 472         struct drm_info_node *node = (struct drm_info_node *) m->private;
 473         struct drm_device *dev = node->minor->dev;
 474         return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
 475 }
 476
 477 static struct drm_info_list tilcdc_debugfs_list[] = {
 478                 { "regs", tilcdc_regs_show, 0 },
 479                 { "mm",   tilcdc_mm_show,   0 },
 480                 { "fb",   drm_fb_cma_debugfs_show, 0 },
 481 };
 482
 483 static int tilcdc_debugfs_init(struct drm_minor *minor)
 484 {
 485         struct drm_device *dev = minor->dev;
 486         struct tilcdc_module *mod;
 487         int ret;
 488
 489         ret = drm_debugfs_create_files(tilcdc_debugfs_list,
 490                         ARRAY_SIZE(tilcdc_debugfs_list),
 491                         minor->debugfs_root, minor);
 492
 493         list_for_each_entry(mod, &module_list, list)
 494                 if (mod->funcs->debugfs_init)
 495                         mod->funcs->debugfs_init(mod, minor);
 496
 497         if (ret) {
 498                 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
 499                 return ret;
 500         }
 501
 502         return ret;
 503 }
 504
 505 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
 506 {
 507         struct tilcdc_module *mod;
 508         drm_debugfs_remove_files(tilcdc_debugfs_list,
 509                         ARRAY_SIZE(tilcdc_debugfs_list), minor);
 510
 511         list_for_each_entry(mod, &module_list, list)
 512                 if (mod->funcs->debugfs_cleanup)
 513                         mod->funcs->debugfs_cleanup(mod, minor);
 514 }
 515 #endif
 516
 517 static const struct file_operations fops = {
 518         .owner              = THIS_MODULE,
 519         .open               = drm_open,
 520         .release            = drm_release,
 521         .unlocked_ioctl     = drm_ioctl,
 522 #ifdef CONFIG_COMPAT
 523         .compat_ioctl       = drm_compat_ioctl,
 524 #endif
 525         .poll               = drm_poll,
 526         .read               = drm_read,
 527         .llseek             = no_llseek,
 528         .mmap               = drm_gem_cma_mmap,
 529 };
 530
 531 static struct drm_driver tilcdc_driver = {
 532         .driver_features    = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
 533         .load               = tilcdc_load,
 534         .unload             = tilcdc_unload,
 535         .preclose           = tilcdc_preclose,
 536         .lastclose          = tilcdc_lastclose,
 537         .set_busid          = drm_platform_set_busid,
 538         .irq_handler        = tilcdc_irq,
 539         .irq_preinstall     = tilcdc_irq_preinstall,
 540         .irq_postinstall    = tilcdc_irq_postinstall,
 541         .irq_uninstall      = tilcdc_irq_uninstall,
 542         .get_vblank_counter = drm_vblank_count,
 543         .enable_vblank      = tilcdc_enable_vblank,
 544         .disable_vblank     = tilcdc_disable_vblank,
 545         .gem_free_object    = drm_gem_cma_free_object,
 546         .gem_vm_ops         = &drm_gem_cma_vm_ops,
 547         .dumb_create        = drm_gem_cma_dumb_create,
 548         .dumb_map_offset    = drm_gem_cma_dumb_map_offset,
 549         .dumb_destroy       = drm_gem_dumb_destroy,
 550 #ifdef CONFIG_DEBUG_FS
 551         .debugfs_init       = tilcdc_debugfs_init,
 552         .debugfs_cleanup    = tilcdc_debugfs_cleanup,
 553 #endif
 554         .fops               = &fops,
 555         .name               = "tilcdc",
 556         .desc               = "TI LCD Controller DRM",
 557         .date               = "20121205",
 558         .major              = 1,
 559         .minor              = 0,
 560 };
 561
 562 /*
 563  * Power management:
 564  */
 565
 566 #ifdef CONFIG_PM_SLEEP
 567 static int tilcdc_pm_suspend(struct device *dev)
 568 {
 569         struct drm_device *ddev = dev_get_drvdata(dev);
 570         struct tilcdc_drm_private *priv = ddev->dev_private;
 571         unsigned i, n = 0;
 572
 573         drm_kms_helper_poll_disable(ddev);
 574
 575         /* Save register state: */
 576         for (i = 0; i < ARRAY_SIZE(registers); i++)
 577                 if (registers[i].save && (priv->rev >= registers[i].rev))
 578                         priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
 579
 580         return 0;
 581 }
 582
 583 static int tilcdc_pm_resume(struct device *dev)
 584 {
 585         struct drm_device *ddev = dev_get_drvdata(dev);
 586         struct tilcdc_drm_private *priv = ddev->dev_private;
 587         unsigned i, n = 0;
 588
 589         /* Restore register state: */
 590         for (i = 0; i < ARRAY_SIZE(registers); i++)
 591                 if (registers[i].save && (priv->rev >= registers[i].rev))
 592                         tilcdc_write(ddev, registers[i].reg, priv->saved_register[n++]);
 593
 594         drm_kms_helper_poll_enable(ddev);
 595
 596         return 0;
 597 }
 598 #endif
 599
 600 static const struct dev_pm_ops tilcdc_pm_ops = {
 601         SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
 602 };
 603
 604 /*
 605  * Platform driver:
 606  */
 607
 608 static int tilcdc_pdev_probe(struct platform_device *pdev)
 609 {
 610         /* bail out early if no DT data: */
 611         if (!pdev->dev.of_node) {
 612                 dev_err(&pdev->dev, "device-tree data is missing\n");
 613                 return -ENXIO;
 614         }
 615
 616         return drm_platform_init(&tilcdc_driver, pdev);
 617 }
 618
 619 static int tilcdc_pdev_remove(struct platform_device *pdev)
 620 {
 621         drm_put_dev(platform_get_drvdata(pdev));
 622
 623         return 0;
 624 }
 625
 626 static struct of_device_id tilcdc_of_match[] = {
 627                 { .compatible = "ti,am33xx-tilcdc", },
 628                 { },
 629 };
 630 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
 631
 632 static struct platform_driver tilcdc_platform_driver = {
 633         .probe      = tilcdc_pdev_probe,
 634         .remove     = tilcdc_pdev_remove,
 635         .driver     = {
 636                 .name   = "tilcdc",
 637                 .pm     = &tilcdc_pm_ops,
 638                 .of_match_table = tilcdc_of_match,
 639         },
 640 };
 641
 642 static int __init tilcdc_drm_init(void)
 643 {
 644         DBG("init");
 645         tilcdc_tfp410_init();
 646         tilcdc_panel_init();
 647         return platform_driver_register(&tilcdc_platform_driver);
 648 }
 649
 650 static void __exit tilcdc_drm_fini(void)
 651 {
 652         DBG("fini");
 653         platform_driver_unregister(&tilcdc_platform_driver);
 654         tilcdc_panel_fini();
 655         tilcdc_tfp410_fini();
 656 }
 657
 658 module_init(tilcdc_drm_init);
 659 module_exit(tilcdc_drm_fini);
 660
 661 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 662 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
 663 MODULE_LICENSE("GPL");