2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 /* LCDC DRM driver, based on da8xx-fb */
20 #include "tilcdc_drv.h"
21 #include "tilcdc_regs.h"
22 #include "tilcdc_tfp410.h"
23 #include "tilcdc_panel.h"
25 #include "drm_fb_helper.h"
27 static LIST_HEAD(module_list);
29 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
30 const struct tilcdc_module_ops *funcs)
34 INIT_LIST_HEAD(&mod->list);
35 list_add(&mod->list, &module_list);
38 void tilcdc_module_cleanup(struct tilcdc_module *mod)
43 static struct of_device_id tilcdc_of_match[];
45 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
46 struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
48 return drm_fb_cma_create(dev, file_priv, mode_cmd);
51 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
53 struct tilcdc_drm_private *priv = dev->dev_private;
54 drm_fbdev_cma_hotplug_event(priv->fbdev);
57 static const struct drm_mode_config_funcs mode_config_funcs = {
58 .fb_create = tilcdc_fb_create,
59 .output_poll_changed = tilcdc_fb_output_poll_changed,
62 static int modeset_init(struct drm_device *dev)
64 struct tilcdc_drm_private *priv = dev->dev_private;
65 struct tilcdc_module *mod;
67 drm_mode_config_init(dev);
69 priv->crtc = tilcdc_crtc_create(dev);
71 list_for_each_entry(mod, &module_list, list) {
72 DBG("loading module: %s", mod->name);
73 mod->funcs->modeset_init(mod, dev);
76 if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
78 dev_err(dev->dev, "no encoders/connectors found\n");
79 drm_mode_config_cleanup(dev);
83 dev->mode_config.min_width = 0;
84 dev->mode_config.min_height = 0;
85 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
86 dev->mode_config.max_height = 2048;
87 dev->mode_config.funcs = &mode_config_funcs;
92 #ifdef CONFIG_CPU_FREQ
93 static int cpufreq_transition(struct notifier_block *nb,
94 unsigned long val, void *data)
96 struct tilcdc_drm_private *priv = container_of(nb,
97 struct tilcdc_drm_private, freq_transition);
98 if (val == CPUFREQ_POSTCHANGE) {
99 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
100 priv->lcd_fck_rate = clk_get_rate(priv->clk);
101 tilcdc_crtc_update_clk(priv->crtc);
113 static int tilcdc_unload(struct drm_device *dev)
115 struct tilcdc_drm_private *priv = dev->dev_private;
117 drm_fbdev_cma_fini(priv->fbdev);
118 drm_kms_helper_poll_fini(dev);
119 drm_mode_config_cleanup(dev);
120 drm_vblank_cleanup(dev);
122 pm_runtime_get_sync(dev->dev);
123 drm_irq_uninstall(dev);
124 pm_runtime_put_sync(dev->dev);
126 #ifdef CONFIG_CPU_FREQ
127 cpufreq_unregister_notifier(&priv->freq_transition,
128 CPUFREQ_TRANSITION_NOTIFIER);
137 flush_workqueue(priv->wq);
138 destroy_workqueue(priv->wq);
140 dev->dev_private = NULL;
142 pm_runtime_disable(dev->dev);
149 static int tilcdc_load(struct drm_device *dev, unsigned long flags)
151 struct platform_device *pdev = dev->platformdev;
152 struct device_node *node = pdev->dev.of_node;
153 struct tilcdc_drm_private *priv;
154 struct tilcdc_module *mod;
155 struct resource *res;
159 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
161 dev_err(dev->dev, "failed to allocate private data\n");
165 dev->dev_private = priv;
167 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
173 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
175 dev_err(dev->dev, "failed to get memory resource\n");
180 priv->mmio = ioremap_nocache(res->start, resource_size(res));
182 dev_err(dev->dev, "failed to ioremap\n");
187 priv->clk = clk_get(dev->dev, "fck");
188 if (IS_ERR(priv->clk)) {
189 dev_err(dev->dev, "failed to get functional clock\n");
194 priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
195 if (IS_ERR(priv->clk)) {
196 dev_err(dev->dev, "failed to get display clock\n");
201 #ifdef CONFIG_CPU_FREQ
202 priv->lcd_fck_rate = clk_get_rate(priv->clk);
203 priv->freq_transition.notifier_call = cpufreq_transition;
204 ret = cpufreq_register_notifier(&priv->freq_transition,
205 CPUFREQ_TRANSITION_NOTIFIER);
207 dev_err(dev->dev, "failed to register cpufreq notifier\n");
208 goto fail_put_disp_clk;
212 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
213 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
215 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
217 if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
218 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
220 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
222 if (of_property_read_u32(node, "ti,max-pixelclock",
223 &priv->max_pixelclock))
224 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
226 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
228 pm_runtime_enable(dev->dev);
230 /* Determine LCD IP Version */
231 pm_runtime_get_sync(dev->dev);
232 switch (tilcdc_read(dev, LCDC_PID_REG)) {
241 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
242 "defaulting to LCD revision 1\n",
243 tilcdc_read(dev, LCDC_PID_REG));
248 pm_runtime_put_sync(dev->dev);
250 ret = modeset_init(dev);
252 dev_err(dev->dev, "failed to initialize mode setting\n");
253 goto fail_cpufreq_unregister;
256 ret = drm_vblank_init(dev, 1);
258 dev_err(dev->dev, "failed to initialize vblank\n");
259 goto fail_mode_config_cleanup;
262 pm_runtime_get_sync(dev->dev);
263 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
264 pm_runtime_put_sync(dev->dev);
266 dev_err(dev->dev, "failed to install IRQ handler\n");
267 goto fail_vblank_cleanup;
270 platform_set_drvdata(pdev, dev);
273 list_for_each_entry(mod, &module_list, list) {
274 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
275 bpp = mod->preferred_bpp;
280 priv->fbdev = drm_fbdev_cma_init(dev, bpp,
281 dev->mode_config.num_crtc,
282 dev->mode_config.num_connector);
283 if (IS_ERR(priv->fbdev)) {
284 ret = PTR_ERR(priv->fbdev);
285 goto fail_irq_uninstall;
288 drm_kms_helper_poll_init(dev);
293 pm_runtime_get_sync(dev->dev);
294 drm_irq_uninstall(dev);
295 pm_runtime_put_sync(dev->dev);
298 drm_vblank_cleanup(dev);
300 fail_mode_config_cleanup:
301 drm_mode_config_cleanup(dev);
303 fail_cpufreq_unregister:
304 pm_runtime_disable(dev->dev);
305 #ifdef CONFIG_CPU_FREQ
306 cpufreq_unregister_notifier(&priv->freq_transition,
307 CPUFREQ_TRANSITION_NOTIFIER);
309 clk_put(priv->disp_clk);
319 flush_workqueue(priv->wq);
320 destroy_workqueue(priv->wq);
323 dev->dev_private = NULL;
328 static void tilcdc_preclose(struct drm_device *dev, struct drm_file *file)
330 struct tilcdc_drm_private *priv = dev->dev_private;
332 tilcdc_crtc_cancel_page_flip(priv->crtc, file);
335 static void tilcdc_lastclose(struct drm_device *dev)
337 struct tilcdc_drm_private *priv = dev->dev_private;
338 drm_fbdev_cma_restore_mode(priv->fbdev);
341 static irqreturn_t tilcdc_irq(int irq, void *arg)
343 struct drm_device *dev = arg;
344 struct tilcdc_drm_private *priv = dev->dev_private;
345 return tilcdc_crtc_irq(priv->crtc);
348 static void tilcdc_irq_preinstall(struct drm_device *dev)
350 tilcdc_clear_irqstatus(dev, 0xffffffff);
353 static int tilcdc_irq_postinstall(struct drm_device *dev)
355 struct tilcdc_drm_private *priv = dev->dev_private;
357 /* enable FIFO underflow irq: */
359 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
361 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
366 static void tilcdc_irq_uninstall(struct drm_device *dev)
368 struct tilcdc_drm_private *priv = dev->dev_private;
370 /* disable irqs that we might have enabled: */
371 if (priv->rev == 1) {
372 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
373 LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
374 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
376 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
377 LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
378 LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
384 static void enable_vblank(struct drm_device *dev, bool enable)
386 struct tilcdc_drm_private *priv = dev->dev_private;
389 if (priv->rev == 1) {
390 reg = LCDC_DMA_CTRL_REG;
391 mask = LCDC_V1_END_OF_FRAME_INT_ENA;
393 reg = LCDC_INT_ENABLE_SET_REG;
394 mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
395 LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
399 tilcdc_set(dev, reg, mask);
401 tilcdc_clear(dev, reg, mask);
404 static int tilcdc_enable_vblank(struct drm_device *dev, int crtc)
406 enable_vblank(dev, true);
410 static void tilcdc_disable_vblank(struct drm_device *dev, int crtc)
412 enable_vblank(dev, false);
415 #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
416 static const struct {
422 #define REG(rev, save, reg) { #reg, rev, save, reg }
423 /* exists in revision 1: */
424 REG(1, false, LCDC_PID_REG),
425 REG(1, true, LCDC_CTRL_REG),
426 REG(1, false, LCDC_STAT_REG),
427 REG(1, true, LCDC_RASTER_CTRL_REG),
428 REG(1, true, LCDC_RASTER_TIMING_0_REG),
429 REG(1, true, LCDC_RASTER_TIMING_1_REG),
430 REG(1, true, LCDC_RASTER_TIMING_2_REG),
431 REG(1, true, LCDC_DMA_CTRL_REG),
432 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
433 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
434 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
435 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
436 /* new in revision 2: */
437 REG(2, false, LCDC_RAW_STAT_REG),
438 REG(2, false, LCDC_MASKED_STAT_REG),
439 REG(2, false, LCDC_INT_ENABLE_SET_REG),
440 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
441 REG(2, false, LCDC_END_OF_INT_IND_REG),
442 REG(2, true, LCDC_CLK_ENABLE_REG),
443 REG(2, true, LCDC_INT_ENABLE_SET_REG),
448 #ifdef CONFIG_DEBUG_FS
449 static int tilcdc_regs_show(struct seq_file *m, void *arg)
451 struct drm_info_node *node = (struct drm_info_node *) m->private;
452 struct drm_device *dev = node->minor->dev;
453 struct tilcdc_drm_private *priv = dev->dev_private;
456 pm_runtime_get_sync(dev->dev);
458 seq_printf(m, "revision: %d\n", priv->rev);
460 for (i = 0; i < ARRAY_SIZE(registers); i++)
461 if (priv->rev >= registers[i].rev)
462 seq_printf(m, "%s:\t %08x\n", registers[i].name,
463 tilcdc_read(dev, registers[i].reg));
465 pm_runtime_put_sync(dev->dev);
470 static int tilcdc_mm_show(struct seq_file *m, void *arg)
472 struct drm_info_node *node = (struct drm_info_node *) m->private;
473 struct drm_device *dev = node->minor->dev;
474 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
477 static struct drm_info_list tilcdc_debugfs_list[] = {
478 { "regs", tilcdc_regs_show, 0 },
479 { "mm", tilcdc_mm_show, 0 },
480 { "fb", drm_fb_cma_debugfs_show, 0 },
483 static int tilcdc_debugfs_init(struct drm_minor *minor)
485 struct drm_device *dev = minor->dev;
486 struct tilcdc_module *mod;
489 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
490 ARRAY_SIZE(tilcdc_debugfs_list),
491 minor->debugfs_root, minor);
493 list_for_each_entry(mod, &module_list, list)
494 if (mod->funcs->debugfs_init)
495 mod->funcs->debugfs_init(mod, minor);
498 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
505 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
507 struct tilcdc_module *mod;
508 drm_debugfs_remove_files(tilcdc_debugfs_list,
509 ARRAY_SIZE(tilcdc_debugfs_list), minor);
511 list_for_each_entry(mod, &module_list, list)
512 if (mod->funcs->debugfs_cleanup)
513 mod->funcs->debugfs_cleanup(mod, minor);
517 static const struct file_operations fops = {
518 .owner = THIS_MODULE,
520 .release = drm_release,
521 .unlocked_ioctl = drm_ioctl,
523 .compat_ioctl = drm_compat_ioctl,
528 .mmap = drm_gem_cma_mmap,
531 static struct drm_driver tilcdc_driver = {
532 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
534 .unload = tilcdc_unload,
535 .preclose = tilcdc_preclose,
536 .lastclose = tilcdc_lastclose,
537 .set_busid = drm_platform_set_busid,
538 .irq_handler = tilcdc_irq,
539 .irq_preinstall = tilcdc_irq_preinstall,
540 .irq_postinstall = tilcdc_irq_postinstall,
541 .irq_uninstall = tilcdc_irq_uninstall,
542 .get_vblank_counter = drm_vblank_count,
543 .enable_vblank = tilcdc_enable_vblank,
544 .disable_vblank = tilcdc_disable_vblank,
545 .gem_free_object = drm_gem_cma_free_object,
546 .gem_vm_ops = &drm_gem_cma_vm_ops,
547 .dumb_create = drm_gem_cma_dumb_create,
548 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
549 .dumb_destroy = drm_gem_dumb_destroy,
550 #ifdef CONFIG_DEBUG_FS
551 .debugfs_init = tilcdc_debugfs_init,
552 .debugfs_cleanup = tilcdc_debugfs_cleanup,
556 .desc = "TI LCD Controller DRM",
566 #ifdef CONFIG_PM_SLEEP
567 static int tilcdc_pm_suspend(struct device *dev)
569 struct drm_device *ddev = dev_get_drvdata(dev);
570 struct tilcdc_drm_private *priv = ddev->dev_private;
573 drm_kms_helper_poll_disable(ddev);
575 /* Save register state: */
576 for (i = 0; i < ARRAY_SIZE(registers); i++)
577 if (registers[i].save && (priv->rev >= registers[i].rev))
578 priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
583 static int tilcdc_pm_resume(struct device *dev)
585 struct drm_device *ddev = dev_get_drvdata(dev);
586 struct tilcdc_drm_private *priv = ddev->dev_private;
589 /* Restore register state: */
590 for (i = 0; i < ARRAY_SIZE(registers); i++)
591 if (registers[i].save && (priv->rev >= registers[i].rev))
592 tilcdc_write(ddev, registers[i].reg, priv->saved_register[n++]);
594 drm_kms_helper_poll_enable(ddev);
600 static const struct dev_pm_ops tilcdc_pm_ops = {
601 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
608 static int tilcdc_pdev_probe(struct platform_device *pdev)
610 /* bail out early if no DT data: */
611 if (!pdev->dev.of_node) {
612 dev_err(&pdev->dev, "device-tree data is missing\n");
616 return drm_platform_init(&tilcdc_driver, pdev);
619 static int tilcdc_pdev_remove(struct platform_device *pdev)
621 drm_put_dev(platform_get_drvdata(pdev));
626 static struct of_device_id tilcdc_of_match[] = {
627 { .compatible = "ti,am33xx-tilcdc", },
630 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
632 static struct platform_driver tilcdc_platform_driver = {
633 .probe = tilcdc_pdev_probe,
634 .remove = tilcdc_pdev_remove,
637 .pm = &tilcdc_pm_ops,
638 .of_match_table = tilcdc_of_match,
642 static int __init tilcdc_drm_init(void)
645 tilcdc_tfp410_init();
647 return platform_driver_register(&tilcdc_platform_driver);
650 static void __exit tilcdc_drm_fini(void)
653 platform_driver_unregister(&tilcdc_platform_driver);
655 tilcdc_tfp410_fini();
658 module_init(tilcdc_drm_init);
659 module_exit(tilcdc_drm_fini);
661 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
662 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
663 MODULE_LICENSE("GPL");