2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 /* LCDC DRM driver, based on da8xx-fb */
20 #include <linux/component.h>
22 #include "tilcdc_drv.h"
23 #include "tilcdc_regs.h"
24 #include "tilcdc_tfp410.h"
25 #include "tilcdc_panel.h"
26 #include "tilcdc_external.h"
28 #include "drm_fb_helper.h"
30 static LIST_HEAD(module_list);
32 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
33 const struct tilcdc_module_ops *funcs)
37 INIT_LIST_HEAD(&mod->list);
38 list_add(&mod->list, &module_list);
41 void tilcdc_module_cleanup(struct tilcdc_module *mod)
46 static struct of_device_id tilcdc_of_match[];
48 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
49 struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
51 return drm_fb_cma_create(dev, file_priv, mode_cmd);
54 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
56 struct tilcdc_drm_private *priv = dev->dev_private;
57 drm_fbdev_cma_hotplug_event(priv->fbdev);
60 static const struct drm_mode_config_funcs mode_config_funcs = {
61 .fb_create = tilcdc_fb_create,
62 .output_poll_changed = tilcdc_fb_output_poll_changed,
65 static int modeset_init(struct drm_device *dev)
67 struct tilcdc_drm_private *priv = dev->dev_private;
68 struct tilcdc_module *mod;
70 drm_mode_config_init(dev);
72 priv->crtc = tilcdc_crtc_create(dev);
74 list_for_each_entry(mod, &module_list, list) {
75 DBG("loading module: %s", mod->name);
76 mod->funcs->modeset_init(mod, dev);
79 dev->mode_config.min_width = 0;
80 dev->mode_config.min_height = 0;
81 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
82 dev->mode_config.max_height = 2048;
83 dev->mode_config.funcs = &mode_config_funcs;
88 #ifdef CONFIG_CPU_FREQ
89 static int cpufreq_transition(struct notifier_block *nb,
90 unsigned long val, void *data)
92 struct tilcdc_drm_private *priv = container_of(nb,
93 struct tilcdc_drm_private, freq_transition);
94 if (val == CPUFREQ_POSTCHANGE) {
95 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
96 priv->lcd_fck_rate = clk_get_rate(priv->clk);
97 tilcdc_crtc_update_clk(priv->crtc);
109 static int tilcdc_unload(struct drm_device *dev)
111 struct tilcdc_drm_private *priv = dev->dev_private;
113 tilcdc_remove_external_encoders(dev);
115 drm_fbdev_cma_fini(priv->fbdev);
116 drm_kms_helper_poll_fini(dev);
117 drm_mode_config_cleanup(dev);
118 drm_vblank_cleanup(dev);
120 pm_runtime_get_sync(dev->dev);
121 drm_irq_uninstall(dev);
122 pm_runtime_put_sync(dev->dev);
124 #ifdef CONFIG_CPU_FREQ
125 cpufreq_unregister_notifier(&priv->freq_transition,
126 CPUFREQ_TRANSITION_NOTIFIER);
135 flush_workqueue(priv->wq);
136 destroy_workqueue(priv->wq);
138 dev->dev_private = NULL;
140 pm_runtime_disable(dev->dev);
147 static int tilcdc_load(struct drm_device *dev, unsigned long flags)
149 struct platform_device *pdev = dev->platformdev;
150 struct device_node *node = pdev->dev.of_node;
151 struct tilcdc_drm_private *priv;
152 struct tilcdc_module *mod;
153 struct resource *res;
157 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
159 dev_err(dev->dev, "failed to allocate private data\n");
163 dev->dev_private = priv;
165 priv->is_componentized =
166 tilcdc_get_external_components(dev->dev, NULL) > 0;
168 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
174 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
176 dev_err(dev->dev, "failed to get memory resource\n");
181 priv->mmio = ioremap_nocache(res->start, resource_size(res));
183 dev_err(dev->dev, "failed to ioremap\n");
188 priv->clk = clk_get(dev->dev, "fck");
189 if (IS_ERR(priv->clk)) {
190 dev_err(dev->dev, "failed to get functional clock\n");
195 priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
196 if (IS_ERR(priv->clk)) {
197 dev_err(dev->dev, "failed to get display clock\n");
202 #ifdef CONFIG_CPU_FREQ
203 priv->lcd_fck_rate = clk_get_rate(priv->clk);
204 priv->freq_transition.notifier_call = cpufreq_transition;
205 ret = cpufreq_register_notifier(&priv->freq_transition,
206 CPUFREQ_TRANSITION_NOTIFIER);
208 dev_err(dev->dev, "failed to register cpufreq notifier\n");
209 goto fail_put_disp_clk;
213 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
214 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
216 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
218 if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
219 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
221 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
223 if (of_property_read_u32(node, "ti,max-pixelclock",
224 &priv->max_pixelclock))
225 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
227 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
229 pm_runtime_enable(dev->dev);
231 /* Determine LCD IP Version */
232 pm_runtime_get_sync(dev->dev);
233 switch (tilcdc_read(dev, LCDC_PID_REG)) {
242 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
243 "defaulting to LCD revision 1\n",
244 tilcdc_read(dev, LCDC_PID_REG));
249 pm_runtime_put_sync(dev->dev);
251 ret = modeset_init(dev);
253 dev_err(dev->dev, "failed to initialize mode setting\n");
254 goto fail_cpufreq_unregister;
257 platform_set_drvdata(pdev, dev);
259 if (priv->is_componentized) {
260 ret = component_bind_all(dev->dev, dev);
262 goto fail_mode_config_cleanup;
264 ret = tilcdc_add_external_encoders(dev, &bpp);
266 goto fail_component_cleanup;
269 if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
270 dev_err(dev->dev, "no encoders/connectors found\n");
272 goto fail_external_cleanup;
275 ret = drm_vblank_init(dev, 1);
277 dev_err(dev->dev, "failed to initialize vblank\n");
278 goto fail_external_cleanup;
281 pm_runtime_get_sync(dev->dev);
282 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
283 pm_runtime_put_sync(dev->dev);
285 dev_err(dev->dev, "failed to install IRQ handler\n");
286 goto fail_vblank_cleanup;
289 list_for_each_entry(mod, &module_list, list) {
290 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
291 bpp = mod->preferred_bpp;
296 priv->fbdev = drm_fbdev_cma_init(dev, bpp,
297 dev->mode_config.num_crtc,
298 dev->mode_config.num_connector);
299 if (IS_ERR(priv->fbdev)) {
300 ret = PTR_ERR(priv->fbdev);
301 goto fail_irq_uninstall;
304 drm_kms_helper_poll_init(dev);
309 pm_runtime_get_sync(dev->dev);
310 drm_irq_uninstall(dev);
311 pm_runtime_put_sync(dev->dev);
314 drm_vblank_cleanup(dev);
316 fail_mode_config_cleanup:
317 drm_mode_config_cleanup(dev);
319 fail_component_cleanup:
320 if (priv->is_componentized)
321 component_unbind_all(dev->dev, dev);
323 fail_external_cleanup:
324 tilcdc_remove_external_encoders(dev);
326 fail_cpufreq_unregister:
327 pm_runtime_disable(dev->dev);
328 #ifdef CONFIG_CPU_FREQ
329 cpufreq_unregister_notifier(&priv->freq_transition,
330 CPUFREQ_TRANSITION_NOTIFIER);
332 clk_put(priv->disp_clk);
342 flush_workqueue(priv->wq);
343 destroy_workqueue(priv->wq);
346 dev->dev_private = NULL;
351 static void tilcdc_preclose(struct drm_device *dev, struct drm_file *file)
353 struct tilcdc_drm_private *priv = dev->dev_private;
355 tilcdc_crtc_cancel_page_flip(priv->crtc, file);
358 static void tilcdc_lastclose(struct drm_device *dev)
360 struct tilcdc_drm_private *priv = dev->dev_private;
361 drm_fbdev_cma_restore_mode(priv->fbdev);
364 static irqreturn_t tilcdc_irq(int irq, void *arg)
366 struct drm_device *dev = arg;
367 struct tilcdc_drm_private *priv = dev->dev_private;
368 return tilcdc_crtc_irq(priv->crtc);
371 static void tilcdc_irq_preinstall(struct drm_device *dev)
373 tilcdc_clear_irqstatus(dev, 0xffffffff);
376 static int tilcdc_irq_postinstall(struct drm_device *dev)
378 struct tilcdc_drm_private *priv = dev->dev_private;
380 /* enable FIFO underflow irq: */
382 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
384 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
389 static void tilcdc_irq_uninstall(struct drm_device *dev)
391 struct tilcdc_drm_private *priv = dev->dev_private;
393 /* disable irqs that we might have enabled: */
394 if (priv->rev == 1) {
395 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
396 LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
397 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
399 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
400 LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
401 LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
407 static void enable_vblank(struct drm_device *dev, bool enable)
409 struct tilcdc_drm_private *priv = dev->dev_private;
412 if (priv->rev == 1) {
413 reg = LCDC_DMA_CTRL_REG;
414 mask = LCDC_V1_END_OF_FRAME_INT_ENA;
416 reg = LCDC_INT_ENABLE_SET_REG;
417 mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
418 LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
422 tilcdc_set(dev, reg, mask);
424 tilcdc_clear(dev, reg, mask);
427 static int tilcdc_enable_vblank(struct drm_device *dev, int crtc)
429 enable_vblank(dev, true);
433 static void tilcdc_disable_vblank(struct drm_device *dev, int crtc)
435 enable_vblank(dev, false);
438 #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
439 static const struct {
445 #define REG(rev, save, reg) { #reg, rev, save, reg }
446 /* exists in revision 1: */
447 REG(1, false, LCDC_PID_REG),
448 REG(1, true, LCDC_CTRL_REG),
449 REG(1, false, LCDC_STAT_REG),
450 REG(1, true, LCDC_RASTER_CTRL_REG),
451 REG(1, true, LCDC_RASTER_TIMING_0_REG),
452 REG(1, true, LCDC_RASTER_TIMING_1_REG),
453 REG(1, true, LCDC_RASTER_TIMING_2_REG),
454 REG(1, true, LCDC_DMA_CTRL_REG),
455 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
456 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
457 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
458 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
459 /* new in revision 2: */
460 REG(2, false, LCDC_RAW_STAT_REG),
461 REG(2, false, LCDC_MASKED_STAT_REG),
462 REG(2, false, LCDC_INT_ENABLE_SET_REG),
463 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
464 REG(2, false, LCDC_END_OF_INT_IND_REG),
465 REG(2, true, LCDC_CLK_ENABLE_REG),
466 REG(2, true, LCDC_INT_ENABLE_SET_REG),
471 #ifdef CONFIG_DEBUG_FS
472 static int tilcdc_regs_show(struct seq_file *m, void *arg)
474 struct drm_info_node *node = (struct drm_info_node *) m->private;
475 struct drm_device *dev = node->minor->dev;
476 struct tilcdc_drm_private *priv = dev->dev_private;
479 pm_runtime_get_sync(dev->dev);
481 seq_printf(m, "revision: %d\n", priv->rev);
483 for (i = 0; i < ARRAY_SIZE(registers); i++)
484 if (priv->rev >= registers[i].rev)
485 seq_printf(m, "%s:\t %08x\n", registers[i].name,
486 tilcdc_read(dev, registers[i].reg));
488 pm_runtime_put_sync(dev->dev);
493 static int tilcdc_mm_show(struct seq_file *m, void *arg)
495 struct drm_info_node *node = (struct drm_info_node *) m->private;
496 struct drm_device *dev = node->minor->dev;
497 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
500 static struct drm_info_list tilcdc_debugfs_list[] = {
501 { "regs", tilcdc_regs_show, 0 },
502 { "mm", tilcdc_mm_show, 0 },
503 { "fb", drm_fb_cma_debugfs_show, 0 },
506 static int tilcdc_debugfs_init(struct drm_minor *minor)
508 struct drm_device *dev = minor->dev;
509 struct tilcdc_module *mod;
512 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
513 ARRAY_SIZE(tilcdc_debugfs_list),
514 minor->debugfs_root, minor);
516 list_for_each_entry(mod, &module_list, list)
517 if (mod->funcs->debugfs_init)
518 mod->funcs->debugfs_init(mod, minor);
521 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
528 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
530 struct tilcdc_module *mod;
531 drm_debugfs_remove_files(tilcdc_debugfs_list,
532 ARRAY_SIZE(tilcdc_debugfs_list), minor);
534 list_for_each_entry(mod, &module_list, list)
535 if (mod->funcs->debugfs_cleanup)
536 mod->funcs->debugfs_cleanup(mod, minor);
540 static const struct file_operations fops = {
541 .owner = THIS_MODULE,
543 .release = drm_release,
544 .unlocked_ioctl = drm_ioctl,
546 .compat_ioctl = drm_compat_ioctl,
551 .mmap = drm_gem_cma_mmap,
554 static struct drm_driver tilcdc_driver = {
555 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
557 .unload = tilcdc_unload,
558 .preclose = tilcdc_preclose,
559 .lastclose = tilcdc_lastclose,
560 .set_busid = drm_platform_set_busid,
561 .irq_handler = tilcdc_irq,
562 .irq_preinstall = tilcdc_irq_preinstall,
563 .irq_postinstall = tilcdc_irq_postinstall,
564 .irq_uninstall = tilcdc_irq_uninstall,
565 .get_vblank_counter = drm_vblank_count,
566 .enable_vblank = tilcdc_enable_vblank,
567 .disable_vblank = tilcdc_disable_vblank,
568 .gem_free_object = drm_gem_cma_free_object,
569 .gem_vm_ops = &drm_gem_cma_vm_ops,
570 .dumb_create = drm_gem_cma_dumb_create,
571 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
572 .dumb_destroy = drm_gem_dumb_destroy,
573 #ifdef CONFIG_DEBUG_FS
574 .debugfs_init = tilcdc_debugfs_init,
575 .debugfs_cleanup = tilcdc_debugfs_cleanup,
579 .desc = "TI LCD Controller DRM",
589 #ifdef CONFIG_PM_SLEEP
590 static int tilcdc_pm_suspend(struct device *dev)
592 struct drm_device *ddev = dev_get_drvdata(dev);
593 struct tilcdc_drm_private *priv = ddev->dev_private;
596 drm_kms_helper_poll_disable(ddev);
598 /* Save register state: */
599 for (i = 0; i < ARRAY_SIZE(registers); i++)
600 if (registers[i].save && (priv->rev >= registers[i].rev))
601 priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
606 static int tilcdc_pm_resume(struct device *dev)
608 struct drm_device *ddev = dev_get_drvdata(dev);
609 struct tilcdc_drm_private *priv = ddev->dev_private;
612 /* Restore register state: */
613 for (i = 0; i < ARRAY_SIZE(registers); i++)
614 if (registers[i].save && (priv->rev >= registers[i].rev))
615 tilcdc_write(ddev, registers[i].reg, priv->saved_register[n++]);
617 drm_kms_helper_poll_enable(ddev);
623 static const struct dev_pm_ops tilcdc_pm_ops = {
624 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
631 static int tilcdc_bind(struct device *dev)
633 return drm_platform_init(&tilcdc_driver, to_platform_device(dev));
636 static void tilcdc_unbind(struct device *dev)
638 drm_put_dev(dev_get_drvdata(dev));
641 static const struct component_master_ops tilcdc_comp_ops = {
643 .unbind = tilcdc_unbind,
646 static int tilcdc_pdev_probe(struct platform_device *pdev)
648 struct component_match *match = NULL;
651 /* bail out early if no DT data: */
652 if (!pdev->dev.of_node) {
653 dev_err(&pdev->dev, "device-tree data is missing\n");
657 ret = tilcdc_get_external_components(&pdev->dev, &match);
661 return drm_platform_init(&tilcdc_driver, pdev);
663 return component_master_add_with_match(&pdev->dev,
668 static int tilcdc_pdev_remove(struct platform_device *pdev)
670 struct drm_device *ddev = dev_get_drvdata(&pdev->dev);
671 struct tilcdc_drm_private *priv = ddev->dev_private;
673 /* Check if a subcomponent has already triggered the unloading. */
677 if (priv->is_componentized)
678 component_master_del(&pdev->dev, &tilcdc_comp_ops);
680 drm_put_dev(platform_get_drvdata(pdev));
685 static struct of_device_id tilcdc_of_match[] = {
686 { .compatible = "ti,am33xx-tilcdc", },
689 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
691 static struct platform_driver tilcdc_platform_driver = {
692 .probe = tilcdc_pdev_probe,
693 .remove = tilcdc_pdev_remove,
696 .pm = &tilcdc_pm_ops,
697 .of_match_table = tilcdc_of_match,
701 static int __init tilcdc_drm_init(void)
704 tilcdc_tfp410_init();
706 return platform_driver_register(&tilcdc_platform_driver);
709 static void __exit tilcdc_drm_fini(void)
712 platform_driver_unregister(&tilcdc_platform_driver);
714 tilcdc_tfp410_fini();
717 module_init(tilcdc_drm_init);
718 module_exit(tilcdc_drm_fini);
720 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
721 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
722 MODULE_LICENSE("GPL");