2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
38 #include <linux/smp.h>
39 #include <linux/moduleparam.h>
41 #include <asm/processor.h>
43 #define DRVNAME "coretemp"
46 * force_tjmax only matters when TjMax can't be read from the CPU itself.
47 * When set, it replaces the driver's suboptimal heuristic.
49 static int force_tjmax;
50 module_param_named(tjmax, force_tjmax, int, 0444);
51 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
53 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
54 #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */
55 #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
56 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
57 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
58 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
61 #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id
62 #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id
63 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
64 #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
66 #define TO_PHYS_ID(cpu) (cpu)
67 #define TO_CORE_ID(cpu) (cpu)
68 #define TO_ATTR_NO(cpu) (cpu)
69 #define for_each_sibling(i, cpu) for (i = 0; false; )
73 * Per-Core Temperature Data
74 * @last_updated: The time when the current temperature value was updated
75 * earlier (in jiffies).
76 * @cpu_core_id: The CPU Core from which temperature values should be read
77 * This value is passed as "id" field to rdmsr/wrmsr functions.
78 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
79 * from where the temperature values should be read.
80 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
81 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
82 * Otherwise, temp_data holds coretemp data.
83 * @valid: If this is 1, the current temperature is valid.
89 unsigned long last_updated;
96 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
97 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
98 struct mutex update_lock;
101 /* Platform Data per Physical CPU */
102 struct platform_data {
103 struct device *hwmon_dev;
105 struct temp_data *core_data[MAX_CORE_DATA];
106 struct device_attribute name_attr;
110 struct list_head list;
111 struct platform_device *pdev;
115 static LIST_HEAD(pdev_list);
116 static DEFINE_MUTEX(pdev_list_mutex);
118 static ssize_t show_name(struct device *dev,
119 struct device_attribute *devattr, char *buf)
121 return sprintf(buf, "%s\n", DRVNAME);
124 static ssize_t show_label(struct device *dev,
125 struct device_attribute *devattr, char *buf)
127 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
128 struct platform_data *pdata = dev_get_drvdata(dev);
129 struct temp_data *tdata = pdata->core_data[attr->index];
131 if (tdata->is_pkg_data)
132 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
134 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
137 static ssize_t show_crit_alarm(struct device *dev,
138 struct device_attribute *devattr, char *buf)
141 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
142 struct platform_data *pdata = dev_get_drvdata(dev);
143 struct temp_data *tdata = pdata->core_data[attr->index];
145 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
147 return sprintf(buf, "%d\n", (eax >> 5) & 1);
150 static ssize_t show_tjmax(struct device *dev,
151 struct device_attribute *devattr, char *buf)
153 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
154 struct platform_data *pdata = dev_get_drvdata(dev);
156 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
159 static ssize_t show_ttarget(struct device *dev,
160 struct device_attribute *devattr, char *buf)
162 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
163 struct platform_data *pdata = dev_get_drvdata(dev);
165 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
168 static ssize_t show_temp(struct device *dev,
169 struct device_attribute *devattr, char *buf)
172 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
173 struct platform_data *pdata = dev_get_drvdata(dev);
174 struct temp_data *tdata = pdata->core_data[attr->index];
176 mutex_lock(&tdata->update_lock);
178 /* Check whether the time interval has elapsed */
179 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
180 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
182 /* Check whether the data is valid */
183 if (eax & 0x80000000) {
184 tdata->temp = tdata->tjmax -
185 ((eax >> 16) & 0x7f) * 1000;
188 tdata->last_updated = jiffies;
191 mutex_unlock(&tdata->update_lock);
192 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
195 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
197 /* The 100C is default for both mobile and non mobile CPUs */
200 int tjmax_ee = 85000;
204 struct pci_dev *host_bridge;
206 /* Early chips have no MSR for TjMax */
208 if (c->x86_model == 0xf && c->x86_mask < 4)
213 if (c->x86_model == 0x1c) {
216 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
218 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
219 && (host_bridge->device == 0xa000 /* NM10 based nettop */
220 || host_bridge->device == 0xa010)) /* NM10 based netbook */
225 pci_dev_put(host_bridge);
228 if (c->x86_model > 0xe && usemsr_ee) {
232 * Now we can detect the mobile CPU using Intel provided table
233 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
234 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
236 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
239 "Unable to access MSR 0x17, assuming desktop"
242 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
244 * Trust bit 28 up to Penryn, I could not find any
245 * documentation on that; if you happen to know
246 * someone at Intel please ask
250 /* Platform ID bits 52:50 (EDX starts at bit 32) */
251 platform_id = (edx >> 18) & 0x7;
254 * Mobile Penryn CPU seems to be platform ID 7 or 5
257 if (c->x86_model == 0x17 &&
258 (platform_id == 5 || platform_id == 7)) {
260 * If MSR EE bit is set, set it to 90 degrees C,
261 * otherwise 105 degrees C
270 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
273 "Unable to access MSR 0xEE, for Tjmax, left"
275 } else if (eax & 0x40000000) {
278 } else if (tjmax == 100000) {
280 * If we don't use msr EE it means we are desktop CPU
281 * (with exeception of Atom)
283 dev_warn(dev, "Using relative temperature scale!\n");
289 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
296 * A new feature of current Intel(R) processors, the
297 * IA32_TEMPERATURE_TARGET contains the TjMax value
299 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
301 if (c->x86_model > 0xe && c->x86_model != 0x1c)
302 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
304 val = (eax >> 16) & 0xff;
306 * If the TjMax is not plausible, an assumption
310 dev_dbg(dev, "TjMax is %d degrees C\n", val);
316 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
318 return force_tjmax * 1000;
322 * An assumption is made for early CPUs and unreadable MSR.
323 * NOTE: the calculated value may not be correct.
325 return adjust_tjmax(c, id, dev);
328 static void __devinit get_ucode_rev_on_cpu(void *edx)
332 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
334 rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx);
337 static int create_name_attr(struct platform_data *pdata, struct device *dev)
339 sysfs_attr_init(&pdata->name_attr.attr);
340 pdata->name_attr.attr.name = "name";
341 pdata->name_attr.attr.mode = S_IRUGO;
342 pdata->name_attr.show = show_name;
343 return device_create_file(dev, &pdata->name_attr);
346 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
350 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
351 struct device_attribute *devattr, char *buf) = {
352 show_label, show_crit_alarm, show_temp, show_tjmax,
354 static const char *const names[TOTAL_ATTRS] = {
355 "temp%d_label", "temp%d_crit_alarm",
356 "temp%d_input", "temp%d_crit",
359 for (i = 0; i < tdata->attr_size; i++) {
360 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
362 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
363 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
364 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
365 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
366 tdata->sd_attrs[i].index = attr_no;
367 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
375 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
380 static int __cpuinit chk_ucode_version(unsigned int cpu)
382 struct cpuinfo_x86 *c = &cpu_data(cpu);
387 * Check if we have problem with errata AE18 of Core processors:
388 * Readings might stop update when processor visited too deep sleep,
389 * fixed for stepping D0 (6EC).
391 if (c->x86_model == 0xe && c->x86_mask < 0xc) {
392 /* check for microcode update */
393 err = smp_call_function_single(cpu, get_ucode_rev_on_cpu,
396 pr_err("Cannot determine microcode revision of "
397 "CPU#%u (%d)!\n", cpu, err);
399 } else if (edx < 0x39) {
400 pr_err("Errata AE18 not fixed, update BIOS or "
401 "microcode of the CPU!\n");
408 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
410 u16 phys_proc_id = TO_PHYS_ID(cpu);
411 struct pdev_entry *p;
413 mutex_lock(&pdev_list_mutex);
415 list_for_each_entry(p, &pdev_list, list)
416 if (p->phys_proc_id == phys_proc_id) {
417 mutex_unlock(&pdev_list_mutex);
421 mutex_unlock(&pdev_list_mutex);
425 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
427 struct temp_data *tdata;
429 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
433 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
434 MSR_IA32_THERM_STATUS;
435 tdata->is_pkg_data = pkg_flag;
437 tdata->cpu_core_id = TO_CORE_ID(cpu);
438 tdata->attr_size = MAX_CORE_ATTRS;
439 mutex_init(&tdata->update_lock);
443 static int create_core_data(struct platform_device *pdev,
444 unsigned int cpu, int pkg_flag)
446 struct temp_data *tdata;
447 struct platform_data *pdata = platform_get_drvdata(pdev);
448 struct cpuinfo_x86 *c = &cpu_data(cpu);
453 * Find attr number for sysfs:
454 * We map the attr number to core id of the CPU
455 * The attr number is always core id + 2
456 * The Pkgtemp will always show up as temp1_*, if available
458 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
460 if (attr_no > MAX_CORE_DATA - 1)
464 * Provide a single set of attributes for all HT siblings of a core
465 * to avoid duplicate sensors (the processor ID and core ID of all
466 * HT siblings of a core are the same).
467 * Skip if a HT sibling of this core is already registered.
468 * This is not an error.
470 if (pdata->core_data[attr_no] != NULL)
473 tdata = init_temp_data(cpu, pkg_flag);
477 /* Test if we can access the status register */
478 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
482 /* We can access status register. Get Critical Temperature */
483 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
486 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
487 * The target temperature is available on older CPUs but not in this
488 * register. Atoms don't have the register at all.
490 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
491 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
495 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
500 pdata->core_data[attr_no] = tdata;
502 /* Create sysfs interfaces */
503 err = create_core_attrs(tdata, &pdev->dev, attr_no);
513 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
515 struct platform_device *pdev = coretemp_get_pdev(cpu);
521 err = create_core_data(pdev, cpu, pkg_flag);
523 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
526 static void coretemp_remove_core(struct platform_data *pdata,
527 struct device *dev, int indx)
530 struct temp_data *tdata = pdata->core_data[indx];
532 /* Remove the sysfs attributes */
533 for (i = 0; i < tdata->attr_size; i++)
534 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
536 kfree(pdata->core_data[indx]);
537 pdata->core_data[indx] = NULL;
540 static int __devinit coretemp_probe(struct platform_device *pdev)
542 struct platform_data *pdata;
545 /* Initialize the per-package data structures */
546 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
550 err = create_name_attr(pdata, &pdev->dev);
554 pdata->phys_proc_id = pdev->id;
555 platform_set_drvdata(pdev, pdata);
557 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
558 if (IS_ERR(pdata->hwmon_dev)) {
559 err = PTR_ERR(pdata->hwmon_dev);
560 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
566 device_remove_file(&pdev->dev, &pdata->name_attr);
567 platform_set_drvdata(pdev, NULL);
573 static int __devexit coretemp_remove(struct platform_device *pdev)
575 struct platform_data *pdata = platform_get_drvdata(pdev);
578 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
579 if (pdata->core_data[i])
580 coretemp_remove_core(pdata, &pdev->dev, i);
582 device_remove_file(&pdev->dev, &pdata->name_attr);
583 hwmon_device_unregister(pdata->hwmon_dev);
584 platform_set_drvdata(pdev, NULL);
589 static struct platform_driver coretemp_driver = {
591 .owner = THIS_MODULE,
594 .probe = coretemp_probe,
595 .remove = __devexit_p(coretemp_remove),
598 static int __cpuinit coretemp_device_add(unsigned int cpu)
601 struct platform_device *pdev;
602 struct pdev_entry *pdev_entry;
604 mutex_lock(&pdev_list_mutex);
606 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
609 pr_err("Device allocation failed\n");
613 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
616 goto exit_device_put;
619 err = platform_device_add(pdev);
621 pr_err("Device addition failed (%d)\n", err);
622 goto exit_device_free;
625 pdev_entry->pdev = pdev;
626 pdev_entry->phys_proc_id = pdev->id;
628 list_add_tail(&pdev_entry->list, &pdev_list);
629 mutex_unlock(&pdev_list_mutex);
636 platform_device_put(pdev);
638 mutex_unlock(&pdev_list_mutex);
642 static void coretemp_device_remove(unsigned int cpu)
644 struct pdev_entry *p, *n;
645 u16 phys_proc_id = TO_PHYS_ID(cpu);
647 mutex_lock(&pdev_list_mutex);
648 list_for_each_entry_safe(p, n, &pdev_list, list) {
649 if (p->phys_proc_id != phys_proc_id)
651 platform_device_unregister(p->pdev);
655 mutex_unlock(&pdev_list_mutex);
658 static bool is_any_core_online(struct platform_data *pdata)
662 /* Find online cores, except pkgtemp data */
663 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
664 if (pdata->core_data[i] &&
665 !pdata->core_data[i]->is_pkg_data) {
672 static void __cpuinit get_core_online(unsigned int cpu)
674 struct cpuinfo_x86 *c = &cpu_data(cpu);
675 struct platform_device *pdev = coretemp_get_pdev(cpu);
679 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
680 * sensors. We check this bit only, all the early CPUs
681 * without thermal sensors will be filtered out.
683 if (!cpu_has(c, X86_FEATURE_DTS))
687 /* Check the microcode version of the CPU */
688 if (chk_ucode_version(cpu))
692 * Alright, we have DTS support.
693 * We are bringing the _first_ core in this pkg
694 * online. So, initialize per-pkg data structures and
695 * then bring this core online.
697 err = coretemp_device_add(cpu);
701 * Check whether pkgtemp support is available.
702 * If so, add interfaces for pkgtemp.
704 if (cpu_has(c, X86_FEATURE_PTS))
705 coretemp_add_core(cpu, 1);
708 * Physical CPU device already exists.
709 * So, just add interfaces for this core.
711 coretemp_add_core(cpu, 0);
714 static void __cpuinit put_core_offline(unsigned int cpu)
717 struct platform_data *pdata;
718 struct platform_device *pdev = coretemp_get_pdev(cpu);
720 /* If the physical CPU device does not exist, just return */
724 pdata = platform_get_drvdata(pdev);
726 indx = TO_ATTR_NO(cpu);
728 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
729 coretemp_remove_core(pdata, &pdev->dev, indx);
732 * If a HT sibling of a core is taken offline, but another HT sibling
733 * of the same core is still online, register the alternate sibling.
734 * This ensures that exactly one set of attributes is provided as long
735 * as at least one HT sibling of a core is online.
737 for_each_sibling(i, cpu) {
741 * Display temperature sensor data for one HT sibling
742 * per core only, so abort the loop after one such
743 * sibling has been found.
749 * If all cores in this pkg are offline, remove the device.
750 * coretemp_device_remove calls unregister_platform_device,
751 * which in turn calls coretemp_remove. This removes the
752 * pkgtemp entry and does other clean ups.
754 if (!is_any_core_online(pdata))
755 coretemp_device_remove(cpu);
758 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
759 unsigned long action, void *hcpu)
761 unsigned int cpu = (unsigned long) hcpu;
765 case CPU_DOWN_FAILED:
766 get_core_online(cpu);
768 case CPU_DOWN_PREPARE:
769 put_core_offline(cpu);
775 static struct notifier_block coretemp_cpu_notifier __refdata = {
776 .notifier_call = coretemp_cpu_callback,
779 static int __init coretemp_init(void)
781 int i, err = -ENODEV;
783 /* quick check if we run Intel */
784 if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
787 err = platform_driver_register(&coretemp_driver);
791 for_each_online_cpu(i)
794 #ifndef CONFIG_HOTPLUG_CPU
795 if (list_empty(&pdev_list)) {
797 goto exit_driver_unreg;
801 register_hotcpu_notifier(&coretemp_cpu_notifier);
804 #ifndef CONFIG_HOTPLUG_CPU
806 platform_driver_unregister(&coretemp_driver);
812 static void __exit coretemp_exit(void)
814 struct pdev_entry *p, *n;
816 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
817 mutex_lock(&pdev_list_mutex);
818 list_for_each_entry_safe(p, n, &pdev_list, list) {
819 platform_device_unregister(p->pdev);
823 mutex_unlock(&pdev_list_mutex);
824 platform_driver_unregister(&coretemp_driver);
827 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
828 MODULE_DESCRIPTION("Intel Core temperature monitor");
829 MODULE_LICENSE("GPL");
831 module_init(coretemp_init)
832 module_exit(coretemp_exit)