2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
42 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
44 * #temp lists the number of monitored temperature sources (first value) plus
45 * the number of directly connectable temperature sensors (second value).
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
50 #include <linux/module.h>
51 #include <linux/init.h>
52 #include <linux/slab.h>
53 #include <linux/jiffies.h>
54 #include <linux/platform_device.h>
55 #include <linux/hwmon.h>
56 #include <linux/hwmon-sysfs.h>
57 #include <linux/hwmon-vid.h>
58 #include <linux/err.h>
59 #include <linux/mutex.h>
60 #include <linux/acpi.h>
61 #include <linux/dmi.h>
67 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
69 /* used to set data->name = nct6775_device_names[data->sio_kind] */
70 static const char * const nct6775_device_names[] = {
80 static const char * const nct6775_sio_names[] __initconst = {
90 static unsigned short force_id;
91 module_param(force_id, ushort, 0);
92 MODULE_PARM_DESC(force_id, "Override the detected device ID");
94 static unsigned short fan_debounce;
95 module_param(fan_debounce, ushort, 0);
96 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
98 #define DRVNAME "nct6775"
101 * Super-I/O constants and functions
104 #define NCT6775_LD_ACPI 0x0a
105 #define NCT6775_LD_HWM 0x0b
106 #define NCT6775_LD_VID 0x0d
108 #define SIO_REG_LDSEL 0x07 /* Logical device select */
109 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
110 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
111 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
113 #define SIO_NCT6106_ID 0xc450
114 #define SIO_NCT6775_ID 0xb470
115 #define SIO_NCT6776_ID 0xc330
116 #define SIO_NCT6779_ID 0xc560
117 #define SIO_NCT6791_ID 0xc800
118 #define SIO_NCT6792_ID 0xc910
119 #define SIO_NCT6793_ID 0xd120
120 #define SIO_ID_MASK 0xFFF0
122 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
125 superio_outb(int ioreg, int reg, int val)
128 outb(val, ioreg + 1);
132 superio_inb(int ioreg, int reg)
135 return inb(ioreg + 1);
139 superio_select(int ioreg, int ld)
141 outb(SIO_REG_LDSEL, ioreg);
146 superio_enter(int ioreg)
149 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
151 if (!request_muxed_region(ioreg, 2, DRVNAME))
161 superio_exit(int ioreg)
165 outb(0x02, ioreg + 1);
166 release_region(ioreg, 2);
173 #define IOREGION_ALIGNMENT (~7)
174 #define IOREGION_OFFSET 5
175 #define IOREGION_LENGTH 2
176 #define ADDR_REG_OFFSET 0
177 #define DATA_REG_OFFSET 1
179 #define NCT6775_REG_BANK 0x4E
180 #define NCT6775_REG_CONFIG 0x40
183 * Not currently used:
184 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
185 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
186 * REG_MAN_ID is at port 0x4f
187 * REG_CHIP_ID is at port 0x58
190 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
191 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
193 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
194 #define NUM_REG_BEEP 5 /* Max number of beep registers */
198 /* Common and NCT6775 specific data */
200 /* Voltage min/max registers for nr=7..14 are in bank 5 */
202 static const u16 NCT6775_REG_IN_MAX[] = {
203 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
204 0x55c, 0x55e, 0x560, 0x562 };
205 static const u16 NCT6775_REG_IN_MIN[] = {
206 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
207 0x55d, 0x55f, 0x561, 0x563 };
208 static const u16 NCT6775_REG_IN[] = {
209 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
212 #define NCT6775_REG_VBAT 0x5D
213 #define NCT6775_REG_DIODE 0x5E
214 #define NCT6775_DIODE_MASK 0x02
216 #define NCT6775_REG_FANDIV1 0x506
217 #define NCT6775_REG_FANDIV2 0x507
219 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
221 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
223 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
225 static const s8 NCT6775_ALARM_BITS[] = {
226 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
227 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
229 6, 7, 11, -1, -1, /* fan1..fan5 */
230 -1, -1, -1, /* unused */
231 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
232 12, -1 }; /* intrusion0, intrusion1 */
234 #define FAN_ALARM_BASE 16
235 #define TEMP_ALARM_BASE 24
236 #define INTRUSION_ALARM_BASE 30
238 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
241 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
244 static const s8 NCT6775_BEEP_BITS[] = {
245 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
246 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
247 21, /* global beep enable */
248 6, 7, 11, 28, -1, /* fan1..fan5 */
249 -1, -1, -1, /* unused */
250 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
251 12, -1 }; /* intrusion0, intrusion1 */
253 #define BEEP_ENABLE_BASE 15
255 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
256 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
258 /* DC or PWM output fan configuration */
259 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
260 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
262 /* Advanced Fan control, some values are common for all fans */
264 static const u16 NCT6775_REG_TARGET[] = {
265 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
266 static const u16 NCT6775_REG_FAN_MODE[] = {
267 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
268 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
269 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
270 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
271 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
272 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
273 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
274 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
275 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
276 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
277 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
279 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
280 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
281 static const u16 NCT6775_REG_PWM[] = {
282 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
283 static const u16 NCT6775_REG_PWM_READ[] = {
284 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
286 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
287 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
288 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
289 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
291 static const u16 NCT6775_REG_TEMP[] = {
292 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
294 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
296 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
297 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
298 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
299 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
300 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
301 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
303 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
304 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
306 static const u16 NCT6775_REG_TEMP_SEL[] = {
307 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
309 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
310 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
311 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
312 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
313 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
314 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
315 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
316 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
317 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
318 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
320 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
322 static const u16 NCT6775_REG_AUTO_TEMP[] = {
323 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
324 static const u16 NCT6775_REG_AUTO_PWM[] = {
325 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
327 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
328 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
330 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
332 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
333 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
334 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
335 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
337 static const char *const nct6775_temp_label[] = {
351 "PCH_CHIP_CPU_MAX_TEMP",
361 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
362 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
364 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
365 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
368 /* NCT6776 specific data */
370 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
371 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
372 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
374 static const s8 NCT6776_ALARM_BITS[] = {
375 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
376 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
378 6, 7, 11, 10, 23, /* fan1..fan5 */
379 -1, -1, -1, /* unused */
380 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
381 12, 9 }; /* intrusion0, intrusion1 */
383 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
385 static const s8 NCT6776_BEEP_BITS[] = {
386 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
387 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
388 24, /* global beep enable */
389 25, 26, 27, 28, 29, /* fan1..fan5 */
390 -1, -1, -1, /* unused */
391 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
392 30, 31 }; /* intrusion0, intrusion1 */
394 static const u16 NCT6776_REG_TOLERANCE_H[] = {
395 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
397 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
398 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
400 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
401 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
403 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
404 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
406 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
407 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
409 static const char *const nct6776_temp_label[] = {
424 "PCH_CHIP_CPU_MAX_TEMP",
435 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
436 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
438 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
439 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
441 /* NCT6779 specific data */
443 static const u16 NCT6779_REG_IN[] = {
444 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
445 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
447 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
448 0x459, 0x45A, 0x45B, 0x568 };
450 static const s8 NCT6779_ALARM_BITS[] = {
451 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
452 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
454 6, 7, 11, 10, 23, /* fan1..fan5 */
455 -1, -1, -1, /* unused */
456 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
457 12, 9 }; /* intrusion0, intrusion1 */
459 static const s8 NCT6779_BEEP_BITS[] = {
460 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
461 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
462 24, /* global beep enable */
463 25, 26, 27, 28, 29, /* fan1..fan5 */
464 -1, -1, -1, /* unused */
465 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
466 30, 31 }; /* intrusion0, intrusion1 */
468 static const u16 NCT6779_REG_FAN[] = {
469 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
470 static const u16 NCT6779_REG_FAN_PULSES[] = {
471 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
473 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
474 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
475 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
476 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
477 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
479 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
480 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
481 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
483 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
485 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
488 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
489 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
491 static const char *const nct6779_temp_label[] = {
510 "PCH_CHIP_CPU_MAX_TEMP",
521 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
522 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
523 0, 0, 0, 0, 0, 0, 0, 0,
524 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
527 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
528 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
530 /* NCT6791 specific data */
532 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
534 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
535 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
536 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
537 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
538 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
539 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
541 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
542 0x459, 0x45A, 0x45B, 0x568, 0x45D };
544 static const s8 NCT6791_ALARM_BITS[] = {
545 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
546 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
548 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
550 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
551 12, 9 }; /* intrusion0, intrusion1 */
553 /* NCT6792/NCT6793 specific data */
555 static const u16 NCT6792_REG_TEMP_MON[] = {
556 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
557 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
558 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
560 /* NCT6102D/NCT6106D specific data */
562 #define NCT6106_REG_VBAT 0x318
563 #define NCT6106_REG_DIODE 0x319
564 #define NCT6106_DIODE_MASK 0x01
566 static const u16 NCT6106_REG_IN_MAX[] = {
567 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
568 static const u16 NCT6106_REG_IN_MIN[] = {
569 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
570 static const u16 NCT6106_REG_IN[] = {
571 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
573 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
574 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
575 static const u16 NCT6106_REG_TEMP_HYST[] = {
576 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
577 static const u16 NCT6106_REG_TEMP_OVER[] = {
578 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
579 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
580 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
581 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
582 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
583 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
584 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
585 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
587 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
588 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
589 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
590 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
592 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
593 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
594 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
595 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
596 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
597 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
598 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
599 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
601 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
602 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
603 0x11b, 0x12b, 0x13b };
605 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
606 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
607 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
609 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
610 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
611 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
612 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
613 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
614 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
616 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
618 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
619 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
620 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
621 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
622 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
623 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
625 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
626 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
628 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
629 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
631 static const s8 NCT6106_ALARM_BITS[] = {
632 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
633 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
635 32, 33, 34, -1, -1, /* fan1..fan5 */
636 -1, -1, -1, /* unused */
637 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
638 48, -1 /* intrusion0, intrusion1 */
641 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
642 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
644 static const s8 NCT6106_BEEP_BITS[] = {
645 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
646 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
647 32, /* global beep enable */
648 24, 25, 26, 27, 28, /* fan1..fan5 */
649 -1, -1, -1, /* unused */
650 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
651 34, -1 /* intrusion0, intrusion1 */
654 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
655 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
657 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
658 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
660 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
662 if (mode == 0 && pwm == 255)
667 static int pwm_enable_to_reg(enum pwm_enable mode)
678 /* 1 is DC mode, output in ms */
679 static unsigned int step_time_from_reg(u8 reg, u8 mode)
681 return mode ? 400 * reg : 100 * reg;
684 static u8 step_time_to_reg(unsigned int msec, u8 mode)
686 return clamp_val((mode ? (msec + 200) / 400 :
687 (msec + 50) / 100), 1, 255);
690 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
692 if (reg == 0 || reg == 255)
694 return 1350000U / (reg << divreg);
697 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
699 if ((reg & 0xff1f) == 0xff1f)
702 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
707 return 1350000U / reg;
710 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
712 if (reg == 0 || reg == 0xffff)
716 * Even though the registers are 16 bit wide, the fan divisor
719 return 1350000U / (reg << divreg);
722 static u16 fan_to_reg(u32 fan, unsigned int divreg)
727 return (1350000U / fan) >> divreg;
730 static inline unsigned int
737 * Some of the voltage inputs have internal scaling, the tables below
738 * contain 8 (the ADC LSB in mV) * scaling factor * 100
740 static const u16 scale_in[15] = {
741 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
745 static inline long in_from_reg(u8 reg, u8 nr)
747 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
750 static inline u8 in_to_reg(u32 val, u8 nr)
752 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
756 * Data structures and manipulation thereof
759 struct nct6775_data {
760 int addr; /* IO base of hw monitor block */
761 int sioreg; /* SIO register address */
765 const struct attribute_group *groups[6];
767 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
768 * 3=temp_crit, 4=temp_lcrit
770 u8 temp_src[NUM_TEMP];
771 u16 reg_temp_config[NUM_TEMP];
772 const char * const *temp_label;
780 const s8 *ALARM_BITS;
784 const u16 *REG_IN_MINMAX[2];
786 const u16 *REG_TARGET;
788 const u16 *REG_FAN_MODE;
789 const u16 *REG_FAN_MIN;
790 const u16 *REG_FAN_PULSES;
791 const u16 *FAN_PULSE_SHIFT;
792 const u16 *REG_FAN_TIME[3];
794 const u16 *REG_TOLERANCE_H;
796 const u8 *REG_PWM_MODE;
797 const u8 *PWM_MODE_MASK;
799 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
800 * [3]=pwm_max, [4]=pwm_step,
801 * [5]=weight_duty_step, [6]=weight_duty_base
803 const u16 *REG_PWM_READ;
805 const u16 *REG_CRITICAL_PWM_ENABLE;
806 u8 CRITICAL_PWM_ENABLE_MASK;
807 const u16 *REG_CRITICAL_PWM;
809 const u16 *REG_AUTO_TEMP;
810 const u16 *REG_AUTO_PWM;
812 const u16 *REG_CRITICAL_TEMP;
813 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
815 const u16 *REG_TEMP_SOURCE; /* temp register sources */
816 const u16 *REG_TEMP_SEL;
817 const u16 *REG_WEIGHT_TEMP_SEL;
818 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
820 const u16 *REG_TEMP_OFFSET;
822 const u16 *REG_ALARM;
825 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
826 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
828 struct mutex update_lock;
829 bool valid; /* true if following fields are valid */
830 unsigned long last_updated; /* In jiffies */
832 /* Register values */
833 u8 bank; /* current register bank */
834 u8 in_num; /* number of in inputs we have */
835 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
836 unsigned int rpm[NUM_FAN];
837 u16 fan_min[NUM_FAN];
838 u8 fan_pulses[NUM_FAN];
841 u8 has_fan; /* some fan inputs can be disabled */
842 u8 has_fan_min; /* some fans don't have min register */
845 u8 num_temp_alarms; /* 2, 3, or 6 */
846 u8 num_temp_beeps; /* 2, 3, or 6 */
847 u8 temp_fixed_num; /* 3 or 6 */
848 u8 temp_type[NUM_TEMP_FIXED];
849 s8 temp_offset[NUM_TEMP_FIXED];
850 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
851 * 3=temp_crit, 4=temp_lcrit */
855 u8 pwm_num; /* number of pwm */
856 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
857 * 0->PWM variable duty cycle
859 enum pwm_enable pwm_enable[NUM_FAN];
862 * 2->thermal cruise mode (also called SmartFan I)
863 * 3->fan speed cruise mode
865 * 5->enhanced variable thermal cruise (SmartFan IV)
867 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
868 * [3]=pwm_max, [4]=pwm_step,
869 * [5]=weight_duty_step, [6]=weight_duty_base
872 u8 target_temp[NUM_FAN];
874 u32 target_speed[NUM_FAN];
875 u32 target_speed_tolerance[NUM_FAN];
876 u8 speed_tolerance_limit;
878 u8 temp_tolerance[2][NUM_FAN];
881 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
883 /* Automatic fan speed control registers */
885 u8 auto_pwm[NUM_FAN][7];
886 u8 auto_temp[NUM_FAN][7];
887 u8 pwm_temp_sel[NUM_FAN];
888 u8 pwm_weight_temp_sel[NUM_FAN];
889 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
902 /* Remember extra register values over suspend/resume */
909 struct nct6775_sio_data {
914 struct sensor_device_template {
915 struct device_attribute dev_attr;
923 bool s2; /* true if both index and nr are used */
926 struct sensor_device_attr_u {
928 struct sensor_device_attribute a1;
929 struct sensor_device_attribute_2 a2;
934 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
935 .attr = {.name = _template, .mode = _mode }, \
940 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
941 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
945 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
947 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
948 .u.s.index = _index, \
952 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
953 static struct sensor_device_template sensor_dev_template_##_name \
954 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
957 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
959 static struct sensor_device_template sensor_dev_template_##_name \
960 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
963 struct sensor_template_group {
964 struct sensor_device_template **templates;
965 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
969 static struct attribute_group *
970 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
973 struct attribute_group *group;
974 struct sensor_device_attr_u *su;
975 struct sensor_device_attribute *a;
976 struct sensor_device_attribute_2 *a2;
977 struct attribute **attrs;
978 struct sensor_device_template **t;
982 return ERR_PTR(-EINVAL);
985 for (count = 0; *t; t++, count++)
989 return ERR_PTR(-EINVAL);
991 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
993 return ERR_PTR(-ENOMEM);
995 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
998 return ERR_PTR(-ENOMEM);
1000 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1003 return ERR_PTR(-ENOMEM);
1005 group->attrs = attrs;
1006 group->is_visible = tg->is_visible;
1008 for (i = 0; i < repeat; i++) {
1010 while (*t != NULL) {
1011 snprintf(su->name, sizeof(su->name),
1012 (*t)->dev_attr.attr.name, tg->base + i);
1015 sysfs_attr_init(&a2->dev_attr.attr);
1016 a2->dev_attr.attr.name = su->name;
1017 a2->nr = (*t)->u.s.nr + i;
1018 a2->index = (*t)->u.s.index;
1019 a2->dev_attr.attr.mode =
1020 (*t)->dev_attr.attr.mode;
1021 a2->dev_attr.show = (*t)->dev_attr.show;
1022 a2->dev_attr.store = (*t)->dev_attr.store;
1023 *attrs = &a2->dev_attr.attr;
1026 sysfs_attr_init(&a->dev_attr.attr);
1027 a->dev_attr.attr.name = su->name;
1028 a->index = (*t)->u.index + i;
1029 a->dev_attr.attr.mode =
1030 (*t)->dev_attr.attr.mode;
1031 a->dev_attr.show = (*t)->dev_attr.show;
1032 a->dev_attr.store = (*t)->dev_attr.store;
1033 *attrs = &a->dev_attr.attr;
1044 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1046 switch (data->kind) {
1048 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1049 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1050 reg == 0x111 || reg == 0x121 || reg == 0x131;
1052 return (((reg & 0xff00) == 0x100 ||
1053 (reg & 0xff00) == 0x200) &&
1054 ((reg & 0x00ff) == 0x50 ||
1055 (reg & 0x00ff) == 0x53 ||
1056 (reg & 0x00ff) == 0x55)) ||
1057 (reg & 0xfff0) == 0x630 ||
1058 reg == 0x640 || reg == 0x642 ||
1060 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1061 reg == 0x73 || reg == 0x75 || reg == 0x77;
1063 return (((reg & 0xff00) == 0x100 ||
1064 (reg & 0xff00) == 0x200) &&
1065 ((reg & 0x00ff) == 0x50 ||
1066 (reg & 0x00ff) == 0x53 ||
1067 (reg & 0x00ff) == 0x55)) ||
1068 (reg & 0xfff0) == 0x630 ||
1070 reg == 0x640 || reg == 0x642 ||
1071 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1072 reg == 0x73 || reg == 0x75 || reg == 0x77;
1077 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1078 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1080 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1081 reg == 0x640 || reg == 0x642 ||
1082 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1083 reg == 0x7b || reg == 0x7d;
1089 * On older chips, only registers 0x50-0x5f are banked.
1090 * On more recent chips, all registers are banked.
1091 * Assume that is the case and set the bank number for each access.
1092 * Cache the bank number so it only needs to be set if it changes.
1094 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1098 if (data->bank != bank) {
1099 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1100 outb_p(bank, data->addr + DATA_REG_OFFSET);
1105 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1107 int res, word_sized = is_word_sized(data, reg);
1109 nct6775_set_bank(data, reg);
1110 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1111 res = inb_p(data->addr + DATA_REG_OFFSET);
1113 outb_p((reg & 0xff) + 1,
1114 data->addr + ADDR_REG_OFFSET);
1115 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1120 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1122 int word_sized = is_word_sized(data, reg);
1124 nct6775_set_bank(data, reg);
1125 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1127 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1128 outb_p((reg & 0xff) + 1,
1129 data->addr + ADDR_REG_OFFSET);
1131 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1135 /* We left-align 8-bit temperature values to make the code simpler */
1136 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1140 res = nct6775_read_value(data, reg);
1141 if (!is_word_sized(data, reg))
1147 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1149 if (!is_word_sized(data, reg))
1151 return nct6775_write_value(data, reg, value);
1154 /* This function assumes that the caller holds data->update_lock */
1155 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1161 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1162 | (data->fan_div[0] & 0x7);
1163 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1166 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1167 | ((data->fan_div[1] << 4) & 0x70);
1168 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1171 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1172 | (data->fan_div[2] & 0x7);
1173 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1176 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1177 | ((data->fan_div[3] << 4) & 0x70);
1178 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1183 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1185 if (data->kind == nct6775)
1186 nct6775_write_fan_div(data, nr);
1189 static void nct6775_update_fan_div(struct nct6775_data *data)
1193 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1194 data->fan_div[0] = i & 0x7;
1195 data->fan_div[1] = (i & 0x70) >> 4;
1196 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1197 data->fan_div[2] = i & 0x7;
1198 if (data->has_fan & (1 << 3))
1199 data->fan_div[3] = (i & 0x70) >> 4;
1202 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1204 if (data->kind == nct6775)
1205 nct6775_update_fan_div(data);
1208 static void nct6775_init_fan_div(struct nct6775_data *data)
1212 nct6775_update_fan_div_common(data);
1214 * For all fans, start with highest divider value if the divider
1215 * register is not initialized. This ensures that we get a
1216 * reading from the fan count register, even if it is not optimal.
1217 * We'll compute a better divider later on.
1219 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1220 if (!(data->has_fan & (1 << i)))
1222 if (data->fan_div[i] == 0) {
1223 data->fan_div[i] = 7;
1224 nct6775_write_fan_div_common(data, i);
1229 static void nct6775_init_fan_common(struct device *dev,
1230 struct nct6775_data *data)
1235 if (data->has_fan_div)
1236 nct6775_init_fan_div(data);
1239 * If fan_min is not set (0), set it to 0xff to disable it. This
1240 * prevents the unnecessary warning when fanX_min is reported as 0.
1242 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1243 if (data->has_fan_min & (1 << i)) {
1244 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1246 nct6775_write_value(data, data->REG_FAN_MIN[i],
1247 data->has_fan_div ? 0xff
1253 static void nct6775_select_fan_div(struct device *dev,
1254 struct nct6775_data *data, int nr, u16 reg)
1256 u8 fan_div = data->fan_div[nr];
1259 if (!data->has_fan_div)
1263 * If we failed to measure the fan speed, or the reported value is not
1264 * in the optimal range, and the clock divider can be modified,
1265 * let's try that for next time.
1267 if (reg == 0x00 && fan_div < 0x07)
1269 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1272 if (fan_div != data->fan_div[nr]) {
1273 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1274 nr + 1, div_from_reg(data->fan_div[nr]),
1275 div_from_reg(fan_div));
1277 /* Preserve min limit if possible */
1278 if (data->has_fan_min & (1 << nr)) {
1279 fan_min = data->fan_min[nr];
1280 if (fan_div > data->fan_div[nr]) {
1281 if (fan_min != 255 && fan_min > 1)
1284 if (fan_min != 255) {
1290 if (fan_min != data->fan_min[nr]) {
1291 data->fan_min[nr] = fan_min;
1292 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1296 data->fan_div[nr] = fan_div;
1297 nct6775_write_fan_div_common(data, nr);
1301 static void nct6775_update_pwm(struct device *dev)
1303 struct nct6775_data *data = dev_get_drvdata(dev);
1305 int fanmodecfg, reg;
1308 for (i = 0; i < data->pwm_num; i++) {
1309 if (!(data->has_pwm & (1 << i)))
1312 duty_is_dc = data->REG_PWM_MODE[i] &&
1313 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1314 & data->PWM_MODE_MASK[i]);
1315 data->pwm_mode[i] = duty_is_dc;
1317 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1318 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1319 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1321 = nct6775_read_value(data,
1322 data->REG_PWM[j][i]);
1326 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1327 (fanmodecfg >> 4) & 7);
1329 if (!data->temp_tolerance[0][i] ||
1330 data->pwm_enable[i] != speed_cruise)
1331 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1332 if (!data->target_speed_tolerance[i] ||
1333 data->pwm_enable[i] == speed_cruise) {
1334 u8 t = fanmodecfg & 0x0f;
1336 if (data->REG_TOLERANCE_H) {
1337 t |= (nct6775_read_value(data,
1338 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1340 data->target_speed_tolerance[i] = t;
1343 data->temp_tolerance[1][i] =
1344 nct6775_read_value(data,
1345 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1347 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1348 data->pwm_temp_sel[i] = reg & 0x1f;
1349 /* If fan can stop, report floor as 0 */
1351 data->pwm[2][i] = 0;
1353 if (!data->REG_WEIGHT_TEMP_SEL[i])
1356 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1357 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1358 /* If weight is disabled, report weight source as 0 */
1359 if (j == 1 && !(reg & 0x80))
1360 data->pwm_weight_temp_sel[i] = 0;
1362 /* Weight temp data */
1363 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1364 data->weight_temp[j][i]
1365 = nct6775_read_value(data,
1366 data->REG_WEIGHT_TEMP[j][i]);
1371 static void nct6775_update_pwm_limits(struct device *dev)
1373 struct nct6775_data *data = dev_get_drvdata(dev);
1378 for (i = 0; i < data->pwm_num; i++) {
1379 if (!(data->has_pwm & (1 << i)))
1382 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1383 data->fan_time[j][i] =
1384 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1387 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1388 /* Update only in matching mode or if never updated */
1389 if (!data->target_temp[i] ||
1390 data->pwm_enable[i] == thermal_cruise)
1391 data->target_temp[i] = reg_t & data->target_temp_mask;
1392 if (!data->target_speed[i] ||
1393 data->pwm_enable[i] == speed_cruise) {
1394 if (data->REG_TOLERANCE_H) {
1395 reg_t |= (nct6775_read_value(data,
1396 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1398 data->target_speed[i] = reg_t;
1401 for (j = 0; j < data->auto_pwm_num; j++) {
1402 data->auto_pwm[i][j] =
1403 nct6775_read_value(data,
1404 NCT6775_AUTO_PWM(data, i, j));
1405 data->auto_temp[i][j] =
1406 nct6775_read_value(data,
1407 NCT6775_AUTO_TEMP(data, i, j));
1410 /* critical auto_pwm temperature data */
1411 data->auto_temp[i][data->auto_pwm_num] =
1412 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1414 switch (data->kind) {
1416 reg = nct6775_read_value(data,
1417 NCT6775_REG_CRITICAL_ENAB[i]);
1418 data->auto_pwm[i][data->auto_pwm_num] =
1419 (reg & 0x02) ? 0xff : 0x00;
1422 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1429 reg = nct6775_read_value(data,
1430 data->REG_CRITICAL_PWM_ENABLE[i]);
1431 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1432 reg = nct6775_read_value(data,
1433 data->REG_CRITICAL_PWM[i]);
1436 data->auto_pwm[i][data->auto_pwm_num] = reg;
1442 static struct nct6775_data *nct6775_update_device(struct device *dev)
1444 struct nct6775_data *data = dev_get_drvdata(dev);
1447 mutex_lock(&data->update_lock);
1449 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1451 /* Fan clock dividers */
1452 nct6775_update_fan_div_common(data);
1454 /* Measured voltages and limits */
1455 for (i = 0; i < data->in_num; i++) {
1456 if (!(data->have_in & (1 << i)))
1459 data->in[i][0] = nct6775_read_value(data,
1461 data->in[i][1] = nct6775_read_value(data,
1462 data->REG_IN_MINMAX[0][i]);
1463 data->in[i][2] = nct6775_read_value(data,
1464 data->REG_IN_MINMAX[1][i]);
1467 /* Measured fan speeds and limits */
1468 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1471 if (!(data->has_fan & (1 << i)))
1474 reg = nct6775_read_value(data, data->REG_FAN[i]);
1475 data->rpm[i] = data->fan_from_reg(reg,
1478 if (data->has_fan_min & (1 << i))
1479 data->fan_min[i] = nct6775_read_value(data,
1480 data->REG_FAN_MIN[i]);
1481 data->fan_pulses[i] =
1482 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1483 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1485 nct6775_select_fan_div(dev, data, i, reg);
1488 nct6775_update_pwm(dev);
1489 nct6775_update_pwm_limits(dev);
1491 /* Measured temperatures and limits */
1492 for (i = 0; i < NUM_TEMP; i++) {
1493 if (!(data->have_temp & (1 << i)))
1495 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1496 if (data->reg_temp[j][i])
1498 = nct6775_read_temp(data,
1499 data->reg_temp[j][i]);
1501 if (i >= NUM_TEMP_FIXED ||
1502 !(data->have_temp_fixed & (1 << i)))
1504 data->temp_offset[i]
1505 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1509 for (i = 0; i < NUM_REG_ALARM; i++) {
1512 if (!data->REG_ALARM[i])
1514 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1515 data->alarms |= ((u64)alarm) << (i << 3);
1519 for (i = 0; i < NUM_REG_BEEP; i++) {
1522 if (!data->REG_BEEP[i])
1524 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1525 data->beeps |= ((u64)beep) << (i << 3);
1528 data->last_updated = jiffies;
1532 mutex_unlock(&data->update_lock);
1537 * Sysfs callback functions
1540 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1542 struct nct6775_data *data = nct6775_update_device(dev);
1543 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1544 int index = sattr->index;
1547 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1551 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1554 struct nct6775_data *data = dev_get_drvdata(dev);
1555 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1556 int index = sattr->index;
1561 err = kstrtoul(buf, 10, &val);
1564 mutex_lock(&data->update_lock);
1565 data->in[nr][index] = in_to_reg(val, nr);
1566 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1567 data->in[nr][index]);
1568 mutex_unlock(&data->update_lock);
1573 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1575 struct nct6775_data *data = nct6775_update_device(dev);
1576 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1577 int nr = data->ALARM_BITS[sattr->index];
1579 return sprintf(buf, "%u\n",
1580 (unsigned int)((data->alarms >> nr) & 0x01));
1583 static int find_temp_source(struct nct6775_data *data, int index, int count)
1585 int source = data->temp_src[index];
1588 for (nr = 0; nr < count; nr++) {
1591 src = nct6775_read_value(data,
1592 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1600 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1602 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1603 struct nct6775_data *data = nct6775_update_device(dev);
1604 unsigned int alarm = 0;
1608 * For temperatures, there is no fixed mapping from registers to alarm
1609 * bits. Alarm bits are determined by the temperature source mapping.
1611 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1613 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1615 alarm = (data->alarms >> bit) & 0x01;
1617 return sprintf(buf, "%u\n", alarm);
1621 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1623 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1624 struct nct6775_data *data = nct6775_update_device(dev);
1625 int nr = data->BEEP_BITS[sattr->index];
1627 return sprintf(buf, "%u\n",
1628 (unsigned int)((data->beeps >> nr) & 0x01));
1632 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1635 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1636 struct nct6775_data *data = dev_get_drvdata(dev);
1637 int nr = data->BEEP_BITS[sattr->index];
1638 int regindex = nr >> 3;
1642 err = kstrtoul(buf, 10, &val);
1648 mutex_lock(&data->update_lock);
1650 data->beeps |= (1ULL << nr);
1652 data->beeps &= ~(1ULL << nr);
1653 nct6775_write_value(data, data->REG_BEEP[regindex],
1654 (data->beeps >> (regindex << 3)) & 0xff);
1655 mutex_unlock(&data->update_lock);
1660 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1662 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1663 struct nct6775_data *data = nct6775_update_device(dev);
1664 unsigned int beep = 0;
1668 * For temperatures, there is no fixed mapping from registers to beep
1669 * enable bits. Beep enable bits are determined by the temperature
1672 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1674 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1676 beep = (data->beeps >> bit) & 0x01;
1678 return sprintf(buf, "%u\n", beep);
1682 store_temp_beep(struct device *dev, struct device_attribute *attr,
1683 const char *buf, size_t count)
1685 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1686 struct nct6775_data *data = dev_get_drvdata(dev);
1687 int nr, bit, regindex;
1691 err = kstrtoul(buf, 10, &val);
1697 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1701 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1702 regindex = bit >> 3;
1704 mutex_lock(&data->update_lock);
1706 data->beeps |= (1ULL << bit);
1708 data->beeps &= ~(1ULL << bit);
1709 nct6775_write_value(data, data->REG_BEEP[regindex],
1710 (data->beeps >> (regindex << 3)) & 0xff);
1711 mutex_unlock(&data->update_lock);
1716 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1717 struct attribute *attr, int index)
1719 struct device *dev = container_of(kobj, struct device, kobj);
1720 struct nct6775_data *data = dev_get_drvdata(dev);
1721 int in = index / 5; /* voltage index */
1723 if (!(data->have_in & (1 << in)))
1729 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1730 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1731 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1733 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1734 store_in_reg, 0, 1);
1735 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1736 store_in_reg, 0, 2);
1739 * nct6775_in_is_visible uses the index into the following array
1740 * to determine if attributes should be created or not.
1741 * Any change in order or content must be matched.
1743 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1744 &sensor_dev_template_in_input,
1745 &sensor_dev_template_in_alarm,
1746 &sensor_dev_template_in_beep,
1747 &sensor_dev_template_in_min,
1748 &sensor_dev_template_in_max,
1752 static struct sensor_template_group nct6775_in_template_group = {
1753 .templates = nct6775_attributes_in_template,
1754 .is_visible = nct6775_in_is_visible,
1758 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1760 struct nct6775_data *data = nct6775_update_device(dev);
1761 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1762 int nr = sattr->index;
1764 return sprintf(buf, "%d\n", data->rpm[nr]);
1768 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1770 struct nct6775_data *data = nct6775_update_device(dev);
1771 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1772 int nr = sattr->index;
1774 return sprintf(buf, "%d\n",
1775 data->fan_from_reg_min(data->fan_min[nr],
1776 data->fan_div[nr]));
1780 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1782 struct nct6775_data *data = nct6775_update_device(dev);
1783 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1784 int nr = sattr->index;
1786 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1790 store_fan_min(struct device *dev, struct device_attribute *attr,
1791 const char *buf, size_t count)
1793 struct nct6775_data *data = dev_get_drvdata(dev);
1794 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1795 int nr = sattr->index;
1801 err = kstrtoul(buf, 10, &val);
1805 mutex_lock(&data->update_lock);
1806 if (!data->has_fan_div) {
1807 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1813 val = 1350000U / val;
1814 val = (val & 0x1f) | ((val << 3) & 0xff00);
1816 data->fan_min[nr] = val;
1817 goto write_min; /* Leave fan divider alone */
1820 /* No min limit, alarm disabled */
1821 data->fan_min[nr] = 255;
1822 new_div = data->fan_div[nr]; /* No change */
1823 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1826 reg = 1350000U / val;
1827 if (reg >= 128 * 255) {
1829 * Speed below this value cannot possibly be represented,
1830 * even with the highest divider (128)
1832 data->fan_min[nr] = 254;
1833 new_div = 7; /* 128 == (1 << 7) */
1835 "fan%u low limit %lu below minimum %u, set to minimum\n",
1836 nr + 1, val, data->fan_from_reg_min(254, 7));
1839 * Speed above this value cannot possibly be represented,
1840 * even with the lowest divider (1)
1842 data->fan_min[nr] = 1;
1843 new_div = 0; /* 1 == (1 << 0) */
1845 "fan%u low limit %lu above maximum %u, set to maximum\n",
1846 nr + 1, val, data->fan_from_reg_min(1, 0));
1849 * Automatically pick the best divider, i.e. the one such
1850 * that the min limit will correspond to a register value
1851 * in the 96..192 range
1854 while (reg > 192 && new_div < 7) {
1858 data->fan_min[nr] = reg;
1863 * Write both the fan clock divider (if it changed) and the new
1864 * fan min (unconditionally)
1866 if (new_div != data->fan_div[nr]) {
1867 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1868 nr + 1, div_from_reg(data->fan_div[nr]),
1869 div_from_reg(new_div));
1870 data->fan_div[nr] = new_div;
1871 nct6775_write_fan_div_common(data, nr);
1872 /* Give the chip time to sample a new speed value */
1873 data->last_updated = jiffies;
1877 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1878 mutex_unlock(&data->update_lock);
1884 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1886 struct nct6775_data *data = nct6775_update_device(dev);
1887 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1888 int p = data->fan_pulses[sattr->index];
1890 return sprintf(buf, "%d\n", p ? : 4);
1894 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1895 const char *buf, size_t count)
1897 struct nct6775_data *data = dev_get_drvdata(dev);
1898 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1899 int nr = sattr->index;
1904 err = kstrtoul(buf, 10, &val);
1911 mutex_lock(&data->update_lock);
1912 data->fan_pulses[nr] = val & 3;
1913 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1914 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1915 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1916 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1917 mutex_unlock(&data->update_lock);
1922 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1923 struct attribute *attr, int index)
1925 struct device *dev = container_of(kobj, struct device, kobj);
1926 struct nct6775_data *data = dev_get_drvdata(dev);
1927 int fan = index / 6; /* fan index */
1928 int nr = index % 6; /* attribute index */
1930 if (!(data->has_fan & (1 << fan)))
1933 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1935 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1937 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1939 if (nr == 5 && data->kind != nct6775)
1945 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1946 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1948 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1949 store_beep, FAN_ALARM_BASE);
1950 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1951 store_fan_pulses, 0);
1952 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1954 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1957 * nct6775_fan_is_visible uses the index into the following array
1958 * to determine if attributes should be created or not.
1959 * Any change in order or content must be matched.
1961 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1962 &sensor_dev_template_fan_input,
1963 &sensor_dev_template_fan_alarm, /* 1 */
1964 &sensor_dev_template_fan_beep, /* 2 */
1965 &sensor_dev_template_fan_pulses,
1966 &sensor_dev_template_fan_min, /* 4 */
1967 &sensor_dev_template_fan_div, /* 5 */
1971 static struct sensor_template_group nct6775_fan_template_group = {
1972 .templates = nct6775_attributes_fan_template,
1973 .is_visible = nct6775_fan_is_visible,
1978 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1980 struct nct6775_data *data = nct6775_update_device(dev);
1981 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1982 int nr = sattr->index;
1984 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1988 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1990 struct nct6775_data *data = nct6775_update_device(dev);
1991 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1993 int index = sattr->index;
1995 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1999 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2002 struct nct6775_data *data = dev_get_drvdata(dev);
2003 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2005 int index = sattr->index;
2009 err = kstrtol(buf, 10, &val);
2013 mutex_lock(&data->update_lock);
2014 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2015 nct6775_write_temp(data, data->reg_temp[index][nr],
2016 data->temp[index][nr]);
2017 mutex_unlock(&data->update_lock);
2022 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2024 struct nct6775_data *data = nct6775_update_device(dev);
2025 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2027 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2031 store_temp_offset(struct device *dev, struct device_attribute *attr,
2032 const char *buf, size_t count)
2034 struct nct6775_data *data = dev_get_drvdata(dev);
2035 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2036 int nr = sattr->index;
2040 err = kstrtol(buf, 10, &val);
2044 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2046 mutex_lock(&data->update_lock);
2047 data->temp_offset[nr] = val;
2048 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2049 mutex_unlock(&data->update_lock);
2055 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2057 struct nct6775_data *data = nct6775_update_device(dev);
2058 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2059 int nr = sattr->index;
2061 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2065 store_temp_type(struct device *dev, struct device_attribute *attr,
2066 const char *buf, size_t count)
2068 struct nct6775_data *data = nct6775_update_device(dev);
2069 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2070 int nr = sattr->index;
2073 u8 vbat, diode, vbit, dbit;
2075 err = kstrtoul(buf, 10, &val);
2079 if (val != 1 && val != 3 && val != 4)
2082 mutex_lock(&data->update_lock);
2084 data->temp_type[nr] = val;
2086 dbit = data->DIODE_MASK << nr;
2087 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2088 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2090 case 1: /* CPU diode (diode, current mode) */
2094 case 3: /* diode, voltage mode */
2097 case 4: /* thermistor */
2100 nct6775_write_value(data, data->REG_VBAT, vbat);
2101 nct6775_write_value(data, data->REG_DIODE, diode);
2103 mutex_unlock(&data->update_lock);
2107 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2108 struct attribute *attr, int index)
2110 struct device *dev = container_of(kobj, struct device, kobj);
2111 struct nct6775_data *data = dev_get_drvdata(dev);
2112 int temp = index / 10; /* temp index */
2113 int nr = index % 10; /* attribute index */
2115 if (!(data->have_temp & (1 << temp)))
2118 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2119 return 0; /* alarm */
2121 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2122 return 0; /* beep */
2124 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2127 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2130 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2133 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2136 /* offset and type only apply to fixed sensors */
2137 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2143 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2144 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2145 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2147 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2148 show_temp, store_temp, 0, 2);
2149 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2151 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2153 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2154 show_temp_offset, store_temp_offset, 0);
2155 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2156 store_temp_type, 0);
2157 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2158 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2159 store_temp_beep, 0);
2162 * nct6775_temp_is_visible uses the index into the following array
2163 * to determine if attributes should be created or not.
2164 * Any change in order or content must be matched.
2166 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2167 &sensor_dev_template_temp_input,
2168 &sensor_dev_template_temp_label,
2169 &sensor_dev_template_temp_alarm, /* 2 */
2170 &sensor_dev_template_temp_beep, /* 3 */
2171 &sensor_dev_template_temp_max, /* 4 */
2172 &sensor_dev_template_temp_max_hyst, /* 5 */
2173 &sensor_dev_template_temp_crit, /* 6 */
2174 &sensor_dev_template_temp_lcrit, /* 7 */
2175 &sensor_dev_template_temp_offset, /* 8 */
2176 &sensor_dev_template_temp_type, /* 9 */
2180 static struct sensor_template_group nct6775_temp_template_group = {
2181 .templates = nct6775_attributes_temp_template,
2182 .is_visible = nct6775_temp_is_visible,
2187 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2189 struct nct6775_data *data = nct6775_update_device(dev);
2190 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2192 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2196 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2197 const char *buf, size_t count)
2199 struct nct6775_data *data = dev_get_drvdata(dev);
2200 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2201 int nr = sattr->index;
2206 err = kstrtoul(buf, 10, &val);
2213 /* Setting DC mode is not supported for all chips/channels */
2214 if (data->REG_PWM_MODE[nr] == 0) {
2220 mutex_lock(&data->update_lock);
2221 data->pwm_mode[nr] = val;
2222 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2223 reg &= ~data->PWM_MODE_MASK[nr];
2225 reg |= data->PWM_MODE_MASK[nr];
2226 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2227 mutex_unlock(&data->update_lock);
2232 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2234 struct nct6775_data *data = nct6775_update_device(dev);
2235 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2237 int index = sattr->index;
2241 * For automatic fan control modes, show current pwm readings.
2242 * Otherwise, show the configured value.
2244 if (index == 0 && data->pwm_enable[nr] > manual)
2245 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2247 pwm = data->pwm[index][nr];
2249 return sprintf(buf, "%d\n", pwm);
2253 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2256 struct nct6775_data *data = dev_get_drvdata(dev);
2257 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2259 int index = sattr->index;
2261 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2263 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2267 err = kstrtoul(buf, 10, &val);
2270 val = clamp_val(val, minval[index], maxval[index]);
2272 mutex_lock(&data->update_lock);
2273 data->pwm[index][nr] = val;
2274 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2275 if (index == 2) { /* floor: disable if val == 0 */
2276 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2280 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2282 mutex_unlock(&data->update_lock);
2286 /* Returns 0 if OK, -EINVAL otherwise */
2287 static int check_trip_points(struct nct6775_data *data, int nr)
2291 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2292 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2295 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2296 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2299 /* validate critical temperature and pwm if enabled (pwm > 0) */
2300 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2301 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2302 data->auto_temp[nr][data->auto_pwm_num] ||
2303 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2304 data->auto_pwm[nr][data->auto_pwm_num])
2310 static void pwm_update_registers(struct nct6775_data *data, int nr)
2314 switch (data->pwm_enable[nr]) {
2319 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2320 reg = (reg & ~data->tolerance_mask) |
2321 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2322 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2323 nct6775_write_value(data, data->REG_TARGET[nr],
2324 data->target_speed[nr] & 0xff);
2325 if (data->REG_TOLERANCE_H) {
2326 reg = (data->target_speed[nr] >> 8) & 0x0f;
2327 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2328 nct6775_write_value(data,
2329 data->REG_TOLERANCE_H[nr],
2333 case thermal_cruise:
2334 nct6775_write_value(data, data->REG_TARGET[nr],
2335 data->target_temp[nr]);
2338 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2339 reg = (reg & ~data->tolerance_mask) |
2340 data->temp_tolerance[0][nr];
2341 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2347 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2349 struct nct6775_data *data = nct6775_update_device(dev);
2350 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2352 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2356 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2357 const char *buf, size_t count)
2359 struct nct6775_data *data = dev_get_drvdata(dev);
2360 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2361 int nr = sattr->index;
2366 err = kstrtoul(buf, 10, &val);
2373 if (val == sf3 && data->kind != nct6775)
2376 if (val == sf4 && check_trip_points(data, nr)) {
2377 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2378 dev_err(dev, "Adjust trip points and try again\n");
2382 mutex_lock(&data->update_lock);
2383 data->pwm_enable[nr] = val;
2386 * turn off pwm control: select manual mode, set pwm to maximum
2388 data->pwm[0][nr] = 255;
2389 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2391 pwm_update_registers(data, nr);
2392 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2394 reg |= pwm_enable_to_reg(val) << 4;
2395 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2396 mutex_unlock(&data->update_lock);
2401 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2405 for (i = 0; i < NUM_TEMP; i++) {
2406 if (!(data->have_temp & (1 << i)))
2408 if (src == data->temp_src[i]) {
2414 return sprintf(buf, "%d\n", sel);
2418 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2420 struct nct6775_data *data = nct6775_update_device(dev);
2421 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2422 int index = sattr->index;
2424 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2428 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2429 const char *buf, size_t count)
2431 struct nct6775_data *data = nct6775_update_device(dev);
2432 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2433 int nr = sattr->index;
2437 err = kstrtoul(buf, 10, &val);
2440 if (val == 0 || val > NUM_TEMP)
2442 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2445 mutex_lock(&data->update_lock);
2446 src = data->temp_src[val - 1];
2447 data->pwm_temp_sel[nr] = src;
2448 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2451 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2452 mutex_unlock(&data->update_lock);
2458 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2461 struct nct6775_data *data = nct6775_update_device(dev);
2462 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2463 int index = sattr->index;
2465 return show_pwm_temp_sel_common(data, buf,
2466 data->pwm_weight_temp_sel[index]);
2470 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2471 const char *buf, size_t count)
2473 struct nct6775_data *data = nct6775_update_device(dev);
2474 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2475 int nr = sattr->index;
2479 err = kstrtoul(buf, 10, &val);
2484 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2485 !data->temp_src[val - 1]))
2488 mutex_lock(&data->update_lock);
2490 src = data->temp_src[val - 1];
2491 data->pwm_weight_temp_sel[nr] = src;
2492 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2494 reg |= (src | 0x80);
2495 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2497 data->pwm_weight_temp_sel[nr] = 0;
2498 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2500 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2502 mutex_unlock(&data->update_lock);
2508 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2510 struct nct6775_data *data = nct6775_update_device(dev);
2511 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2513 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2517 store_target_temp(struct device *dev, struct device_attribute *attr,
2518 const char *buf, size_t count)
2520 struct nct6775_data *data = dev_get_drvdata(dev);
2521 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2522 int nr = sattr->index;
2526 err = kstrtoul(buf, 10, &val);
2530 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2531 data->target_temp_mask);
2533 mutex_lock(&data->update_lock);
2534 data->target_temp[nr] = val;
2535 pwm_update_registers(data, nr);
2536 mutex_unlock(&data->update_lock);
2541 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2543 struct nct6775_data *data = nct6775_update_device(dev);
2544 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2545 int nr = sattr->index;
2547 return sprintf(buf, "%d\n",
2548 fan_from_reg16(data->target_speed[nr],
2549 data->fan_div[nr]));
2553 store_target_speed(struct device *dev, struct device_attribute *attr,
2554 const char *buf, size_t count)
2556 struct nct6775_data *data = dev_get_drvdata(dev);
2557 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2558 int nr = sattr->index;
2563 err = kstrtoul(buf, 10, &val);
2567 val = clamp_val(val, 0, 1350000U);
2568 speed = fan_to_reg(val, data->fan_div[nr]);
2570 mutex_lock(&data->update_lock);
2571 data->target_speed[nr] = speed;
2572 pwm_update_registers(data, nr);
2573 mutex_unlock(&data->update_lock);
2578 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2581 struct nct6775_data *data = nct6775_update_device(dev);
2582 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2584 int index = sattr->index;
2586 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2590 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2591 const char *buf, size_t count)
2593 struct nct6775_data *data = dev_get_drvdata(dev);
2594 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2596 int index = sattr->index;
2600 err = kstrtoul(buf, 10, &val);
2604 /* Limit tolerance as needed */
2605 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2607 mutex_lock(&data->update_lock);
2608 data->temp_tolerance[index][nr] = val;
2610 pwm_update_registers(data, nr);
2612 nct6775_write_value(data,
2613 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2615 mutex_unlock(&data->update_lock);
2620 * Fan speed tolerance is a tricky beast, since the associated register is
2621 * a tick counter, but the value is reported and configured as rpm.
2622 * Compute resulting low and high rpm values and report the difference.
2625 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2628 struct nct6775_data *data = nct6775_update_device(dev);
2629 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2630 int nr = sattr->index;
2631 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2632 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2642 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2643 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2645 return sprintf(buf, "%d\n", tolerance);
2649 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2650 const char *buf, size_t count)
2652 struct nct6775_data *data = dev_get_drvdata(dev);
2653 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2654 int nr = sattr->index;
2659 err = kstrtoul(buf, 10, &val);
2663 high = fan_from_reg16(data->target_speed[nr],
2664 data->fan_div[nr]) + val;
2665 low = fan_from_reg16(data->target_speed[nr],
2666 data->fan_div[nr]) - val;
2672 val = (fan_to_reg(low, data->fan_div[nr]) -
2673 fan_to_reg(high, data->fan_div[nr])) / 2;
2675 /* Limit tolerance as needed */
2676 val = clamp_val(val, 0, data->speed_tolerance_limit);
2678 mutex_lock(&data->update_lock);
2679 data->target_speed_tolerance[nr] = val;
2680 pwm_update_registers(data, nr);
2681 mutex_unlock(&data->update_lock);
2685 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2686 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2688 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2689 store_pwm_enable, 0);
2690 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2691 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2692 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2693 show_target_temp, store_target_temp, 0);
2694 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2695 show_target_speed, store_target_speed, 0);
2696 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2697 show_speed_tolerance, store_speed_tolerance, 0);
2699 /* Smart Fan registers */
2702 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2704 struct nct6775_data *data = nct6775_update_device(dev);
2705 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2707 int index = sattr->index;
2709 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2713 store_weight_temp(struct device *dev, struct device_attribute *attr,
2714 const char *buf, size_t count)
2716 struct nct6775_data *data = dev_get_drvdata(dev);
2717 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2719 int index = sattr->index;
2723 err = kstrtoul(buf, 10, &val);
2727 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2729 mutex_lock(&data->update_lock);
2730 data->weight_temp[index][nr] = val;
2731 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2732 mutex_unlock(&data->update_lock);
2736 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2737 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2738 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2739 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2740 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2741 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2742 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2743 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2744 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2745 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2746 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2747 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2750 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2752 struct nct6775_data *data = nct6775_update_device(dev);
2753 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2755 int index = sattr->index;
2757 return sprintf(buf, "%d\n",
2758 step_time_from_reg(data->fan_time[index][nr],
2759 data->pwm_mode[nr]));
2763 store_fan_time(struct device *dev, struct device_attribute *attr,
2764 const char *buf, size_t count)
2766 struct nct6775_data *data = dev_get_drvdata(dev);
2767 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2769 int index = sattr->index;
2773 err = kstrtoul(buf, 10, &val);
2777 val = step_time_to_reg(val, data->pwm_mode[nr]);
2778 mutex_lock(&data->update_lock);
2779 data->fan_time[index][nr] = val;
2780 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2781 mutex_unlock(&data->update_lock);
2786 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2788 struct nct6775_data *data = nct6775_update_device(dev);
2789 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2791 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2795 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2796 const char *buf, size_t count)
2798 struct nct6775_data *data = dev_get_drvdata(dev);
2799 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2801 int point = sattr->index;
2806 err = kstrtoul(buf, 10, &val);
2812 if (point == data->auto_pwm_num) {
2813 if (data->kind != nct6775 && !val)
2815 if (data->kind != nct6779 && val)
2819 mutex_lock(&data->update_lock);
2820 data->auto_pwm[nr][point] = val;
2821 if (point < data->auto_pwm_num) {
2822 nct6775_write_value(data,
2823 NCT6775_AUTO_PWM(data, nr, point),
2824 data->auto_pwm[nr][point]);
2826 switch (data->kind) {
2828 /* disable if needed (pwm == 0) */
2829 reg = nct6775_read_value(data,
2830 NCT6775_REG_CRITICAL_ENAB[nr]);
2835 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2839 break; /* always enabled, nothing to do */
2845 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2847 reg = nct6775_read_value(data,
2848 data->REG_CRITICAL_PWM_ENABLE[nr]);
2850 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2852 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2853 nct6775_write_value(data,
2854 data->REG_CRITICAL_PWM_ENABLE[nr],
2859 mutex_unlock(&data->update_lock);
2864 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2866 struct nct6775_data *data = nct6775_update_device(dev);
2867 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2869 int point = sattr->index;
2872 * We don't know for sure if the temperature is signed or unsigned.
2873 * Assume it is unsigned.
2875 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2879 store_auto_temp(struct device *dev, struct device_attribute *attr,
2880 const char *buf, size_t count)
2882 struct nct6775_data *data = dev_get_drvdata(dev);
2883 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2885 int point = sattr->index;
2889 err = kstrtoul(buf, 10, &val);
2895 mutex_lock(&data->update_lock);
2896 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2897 if (point < data->auto_pwm_num) {
2898 nct6775_write_value(data,
2899 NCT6775_AUTO_TEMP(data, nr, point),
2900 data->auto_temp[nr][point]);
2902 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2903 data->auto_temp[nr][point]);
2905 mutex_unlock(&data->update_lock);
2909 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2910 struct attribute *attr, int index)
2912 struct device *dev = container_of(kobj, struct device, kobj);
2913 struct nct6775_data *data = dev_get_drvdata(dev);
2914 int pwm = index / 36; /* pwm index */
2915 int nr = index % 36; /* attribute index */
2917 if (!(data->has_pwm & (1 << pwm)))
2920 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
2921 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2923 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2925 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2927 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2930 if (nr >= 22 && nr <= 35) { /* auto point */
2931 int api = (nr - 22) / 2; /* auto point index */
2933 if (api > data->auto_pwm_num)
2939 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2940 show_fan_time, store_fan_time, 0, 0);
2941 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2942 show_fan_time, store_fan_time, 0, 1);
2943 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2944 show_fan_time, store_fan_time, 0, 2);
2945 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2947 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2949 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2950 show_temp_tolerance, store_temp_tolerance, 0, 0);
2951 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2952 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2955 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2958 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2961 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2962 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2963 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2964 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2966 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2967 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2968 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2969 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2971 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2972 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2973 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2974 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2976 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2977 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2978 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2979 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2981 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2982 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2983 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2984 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2986 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2987 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2988 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2989 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2991 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2992 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2993 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2994 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2997 * nct6775_pwm_is_visible uses the index into the following array
2998 * to determine if attributes should be created or not.
2999 * Any change in order or content must be matched.
3001 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3002 &sensor_dev_template_pwm,
3003 &sensor_dev_template_pwm_mode,
3004 &sensor_dev_template_pwm_enable,
3005 &sensor_dev_template_pwm_temp_sel,
3006 &sensor_dev_template_pwm_temp_tolerance,
3007 &sensor_dev_template_pwm_crit_temp_tolerance,
3008 &sensor_dev_template_pwm_target_temp,
3009 &sensor_dev_template_fan_target,
3010 &sensor_dev_template_fan_tolerance,
3011 &sensor_dev_template_pwm_stop_time,
3012 &sensor_dev_template_pwm_step_up_time,
3013 &sensor_dev_template_pwm_step_down_time,
3014 &sensor_dev_template_pwm_start,
3015 &sensor_dev_template_pwm_floor,
3016 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3017 &sensor_dev_template_pwm_weight_temp_step,
3018 &sensor_dev_template_pwm_weight_temp_step_tol,
3019 &sensor_dev_template_pwm_weight_temp_step_base,
3020 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3021 &sensor_dev_template_pwm_max, /* 19 */
3022 &sensor_dev_template_pwm_step, /* 20 */
3023 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3024 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3025 &sensor_dev_template_pwm_auto_point1_temp,
3026 &sensor_dev_template_pwm_auto_point2_pwm,
3027 &sensor_dev_template_pwm_auto_point2_temp,
3028 &sensor_dev_template_pwm_auto_point3_pwm,
3029 &sensor_dev_template_pwm_auto_point3_temp,
3030 &sensor_dev_template_pwm_auto_point4_pwm,
3031 &sensor_dev_template_pwm_auto_point4_temp,
3032 &sensor_dev_template_pwm_auto_point5_pwm,
3033 &sensor_dev_template_pwm_auto_point5_temp,
3034 &sensor_dev_template_pwm_auto_point6_pwm,
3035 &sensor_dev_template_pwm_auto_point6_temp,
3036 &sensor_dev_template_pwm_auto_point7_pwm,
3037 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3042 static struct sensor_template_group nct6775_pwm_template_group = {
3043 .templates = nct6775_attributes_pwm_template,
3044 .is_visible = nct6775_pwm_is_visible,
3049 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3051 struct nct6775_data *data = dev_get_drvdata(dev);
3053 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3056 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3058 /* Case open detection */
3061 clear_caseopen(struct device *dev, struct device_attribute *attr,
3062 const char *buf, size_t count)
3064 struct nct6775_data *data = dev_get_drvdata(dev);
3065 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3070 if (kstrtoul(buf, 10, &val) || val != 0)
3073 mutex_lock(&data->update_lock);
3076 * Use CR registers to clear caseopen status.
3077 * The CR registers are the same for all chips, and not all chips
3078 * support clearing the caseopen status through "regular" registers.
3080 ret = superio_enter(data->sioreg);
3086 superio_select(data->sioreg, NCT6775_LD_ACPI);
3087 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3088 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3089 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3090 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3091 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3092 superio_exit(data->sioreg);
3094 data->valid = false; /* Force cache refresh */
3096 mutex_unlock(&data->update_lock);
3100 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3101 clear_caseopen, INTRUSION_ALARM_BASE);
3102 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3103 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3104 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3105 store_beep, INTRUSION_ALARM_BASE);
3106 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3107 store_beep, INTRUSION_ALARM_BASE + 1);
3108 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3109 store_beep, BEEP_ENABLE_BASE);
3111 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3112 struct attribute *attr, int index)
3114 struct device *dev = container_of(kobj, struct device, kobj);
3115 struct nct6775_data *data = dev_get_drvdata(dev);
3117 if (index == 0 && !data->have_vid)
3120 if (index == 1 || index == 2) {
3121 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3125 if (index == 3 || index == 4) {
3126 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3134 * nct6775_other_is_visible uses the index into the following array
3135 * to determine if attributes should be created or not.
3136 * Any change in order or content must be matched.
3138 static struct attribute *nct6775_attributes_other[] = {
3139 &dev_attr_cpu0_vid.attr, /* 0 */
3140 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3141 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3142 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3143 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3144 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3149 static const struct attribute_group nct6775_group_other = {
3150 .attrs = nct6775_attributes_other,
3151 .is_visible = nct6775_other_is_visible,
3154 static inline void nct6775_init_device(struct nct6775_data *data)
3159 /* Start monitoring if needed */
3160 if (data->REG_CONFIG) {
3161 tmp = nct6775_read_value(data, data->REG_CONFIG);
3163 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3166 /* Enable temperature sensors if needed */
3167 for (i = 0; i < NUM_TEMP; i++) {
3168 if (!(data->have_temp & (1 << i)))
3170 if (!data->reg_temp_config[i])
3172 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3174 nct6775_write_value(data, data->reg_temp_config[i],
3178 /* Enable VBAT monitoring if needed */
3179 tmp = nct6775_read_value(data, data->REG_VBAT);
3181 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3183 diode = nct6775_read_value(data, data->REG_DIODE);
3185 for (i = 0; i < data->temp_fixed_num; i++) {
3186 if (!(data->have_temp_fixed & (1 << i)))
3188 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3190 = 3 - ((diode >> i) & data->DIODE_MASK);
3191 else /* thermistor */
3192 data->temp_type[i] = 4;
3197 nct6775_check_fan_inputs(struct nct6775_data *data)
3199 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3200 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3201 int sioreg = data->sioreg;
3204 /* Store SIO_REG_ENABLE for use during resume */
3205 superio_select(sioreg, NCT6775_LD_HWM);
3206 data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3208 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3209 if (data->kind == nct6775) {
3210 regval = superio_inb(sioreg, 0x2c);
3212 fan3pin = regval & (1 << 6);
3213 pwm3pin = regval & (1 << 7);
3215 /* On NCT6775, fan4 shares pins with the fdc interface */
3216 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3223 } else if (data->kind == nct6776) {
3224 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3225 const char *board_vendor, *board_name;
3227 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3228 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3230 if (board_name && board_vendor &&
3231 !strcmp(board_vendor, "ASRock")) {
3233 * Auxiliary fan monitoring is not enabled on ASRock
3234 * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3235 * Observed with BIOS version 2.00.
3237 if (!strcmp(board_name, "Z77 Pro4-M")) {
3238 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3239 data->sio_reg_enable |= 0xe0;
3240 superio_outb(sioreg, SIO_REG_ENABLE,
3241 data->sio_reg_enable);
3246 if (data->sio_reg_enable & 0x80)
3249 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3251 if (data->sio_reg_enable & 0x40)
3254 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3256 if (data->sio_reg_enable & 0x20)
3259 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3267 } else if (data->kind == nct6106) {
3268 regval = superio_inb(sioreg, 0x24);
3269 fan3pin = !(regval & 0x80);
3270 pwm3pin = regval & 0x08;
3279 } else { /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3280 regval = superio_inb(sioreg, 0x1c);
3282 fan3pin = !(regval & (1 << 5));
3283 fan4pin = !(regval & (1 << 6));
3284 fan5pin = !(regval & (1 << 7));
3286 pwm3pin = !(regval & (1 << 0));
3287 pwm4pin = !(regval & (1 << 1));
3288 pwm5pin = !(regval & (1 << 2));
3292 if (data->kind == nct6791 || data->kind == nct6792 ||
3293 data->kind == nct6793) {
3294 regval = superio_inb(sioreg, 0x2d);
3295 fan6pin = (regval & (1 << 1));
3296 pwm6pin = (regval & (1 << 0));
3297 } else { /* NCT6779D */
3303 /* fan 1 and 2 (0x03) are always present */
3304 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3305 (fan5pin << 4) | (fan6pin << 5);
3306 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3308 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3309 (pwm5pin << 4) | (pwm6pin << 5);
3312 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3313 int *available, int *mask)
3318 for (i = 0; i < data->pwm_num && *available; i++) {
3323 src = nct6775_read_value(data, regp[i]);
3325 if (!src || (*mask & (1 << src)))
3327 if (src >= data->temp_label_num ||
3328 !strlen(data->temp_label[src]))
3331 index = __ffs(*available);
3332 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3333 *available &= ~(1 << index);
3338 static int nct6775_probe(struct platform_device *pdev)
3340 struct device *dev = &pdev->dev;
3341 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3342 struct nct6775_data *data;
3343 struct resource *res;
3345 int src, mask, available;
3346 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3347 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3348 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3349 int num_reg_temp, num_reg_temp_mon;
3351 struct attribute_group *group;
3352 struct device *hwmon_dev;
3353 int num_attr_groups = 0;
3355 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3356 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3360 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3365 data->kind = sio_data->kind;
3366 data->sioreg = sio_data->sioreg;
3367 data->addr = res->start;
3368 mutex_init(&data->update_lock);
3369 data->name = nct6775_device_names[data->kind];
3370 data->bank = 0xff; /* Force initial bank selection */
3371 platform_set_drvdata(pdev, data);
3373 switch (data->kind) {
3377 data->auto_pwm_num = 4;
3378 data->temp_fixed_num = 3;
3379 data->num_temp_alarms = 6;
3380 data->num_temp_beeps = 6;
3382 data->fan_from_reg = fan_from_reg13;
3383 data->fan_from_reg_min = fan_from_reg13;
3385 data->temp_label = nct6776_temp_label;
3386 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3388 data->REG_VBAT = NCT6106_REG_VBAT;
3389 data->REG_DIODE = NCT6106_REG_DIODE;
3390 data->DIODE_MASK = NCT6106_DIODE_MASK;
3391 data->REG_VIN = NCT6106_REG_IN;
3392 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3393 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3394 data->REG_TARGET = NCT6106_REG_TARGET;
3395 data->REG_FAN = NCT6106_REG_FAN;
3396 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3397 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3398 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3399 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3400 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3401 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3402 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3403 data->REG_PWM[0] = NCT6106_REG_PWM;
3404 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3405 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3406 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3407 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3408 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3409 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3410 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3411 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3412 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3413 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3414 data->REG_CRITICAL_TEMP_TOLERANCE
3415 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3416 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3417 data->CRITICAL_PWM_ENABLE_MASK
3418 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3419 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3420 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3421 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3422 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3423 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3424 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3425 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3426 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3427 data->REG_ALARM = NCT6106_REG_ALARM;
3428 data->ALARM_BITS = NCT6106_ALARM_BITS;
3429 data->REG_BEEP = NCT6106_REG_BEEP;
3430 data->BEEP_BITS = NCT6106_BEEP_BITS;
3432 reg_temp = NCT6106_REG_TEMP;
3433 reg_temp_mon = NCT6106_REG_TEMP_MON;
3434 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3435 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3436 reg_temp_over = NCT6106_REG_TEMP_OVER;
3437 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3438 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3439 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3440 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3441 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3442 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3448 data->auto_pwm_num = 6;
3449 data->has_fan_div = true;
3450 data->temp_fixed_num = 3;
3451 data->num_temp_alarms = 3;
3452 data->num_temp_beeps = 3;
3454 data->ALARM_BITS = NCT6775_ALARM_BITS;
3455 data->BEEP_BITS = NCT6775_BEEP_BITS;
3457 data->fan_from_reg = fan_from_reg16;
3458 data->fan_from_reg_min = fan_from_reg8;
3459 data->target_temp_mask = 0x7f;
3460 data->tolerance_mask = 0x0f;
3461 data->speed_tolerance_limit = 15;
3463 data->temp_label = nct6775_temp_label;
3464 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3466 data->REG_CONFIG = NCT6775_REG_CONFIG;
3467 data->REG_VBAT = NCT6775_REG_VBAT;
3468 data->REG_DIODE = NCT6775_REG_DIODE;
3469 data->DIODE_MASK = NCT6775_DIODE_MASK;
3470 data->REG_VIN = NCT6775_REG_IN;
3471 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3472 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3473 data->REG_TARGET = NCT6775_REG_TARGET;
3474 data->REG_FAN = NCT6775_REG_FAN;
3475 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3476 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3477 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3478 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3479 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3480 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3481 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3482 data->REG_PWM[0] = NCT6775_REG_PWM;
3483 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3484 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3485 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3486 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3487 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3488 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3489 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3490 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3491 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3492 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3493 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3494 data->REG_CRITICAL_TEMP_TOLERANCE
3495 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3496 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3497 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3498 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3499 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3500 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3501 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3502 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3503 data->REG_ALARM = NCT6775_REG_ALARM;
3504 data->REG_BEEP = NCT6775_REG_BEEP;
3506 reg_temp = NCT6775_REG_TEMP;
3507 reg_temp_mon = NCT6775_REG_TEMP_MON;
3508 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3509 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3510 reg_temp_over = NCT6775_REG_TEMP_OVER;
3511 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3512 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3513 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3514 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3520 data->auto_pwm_num = 4;
3521 data->has_fan_div = false;
3522 data->temp_fixed_num = 3;
3523 data->num_temp_alarms = 3;
3524 data->num_temp_beeps = 6;
3526 data->ALARM_BITS = NCT6776_ALARM_BITS;
3527 data->BEEP_BITS = NCT6776_BEEP_BITS;
3529 data->fan_from_reg = fan_from_reg13;
3530 data->fan_from_reg_min = fan_from_reg13;
3531 data->target_temp_mask = 0xff;
3532 data->tolerance_mask = 0x07;
3533 data->speed_tolerance_limit = 63;
3535 data->temp_label = nct6776_temp_label;
3536 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3538 data->REG_CONFIG = NCT6775_REG_CONFIG;
3539 data->REG_VBAT = NCT6775_REG_VBAT;
3540 data->REG_DIODE = NCT6775_REG_DIODE;
3541 data->DIODE_MASK = NCT6775_DIODE_MASK;
3542 data->REG_VIN = NCT6775_REG_IN;
3543 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3544 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3545 data->REG_TARGET = NCT6775_REG_TARGET;
3546 data->REG_FAN = NCT6775_REG_FAN;
3547 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3548 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3549 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3550 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3551 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3552 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3553 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3554 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3555 data->REG_PWM[0] = NCT6775_REG_PWM;
3556 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3557 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3558 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3559 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3560 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3561 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3562 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3563 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3564 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3565 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3566 data->REG_CRITICAL_TEMP_TOLERANCE
3567 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3568 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3569 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3570 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3571 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3572 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3573 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3574 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3575 data->REG_ALARM = NCT6775_REG_ALARM;
3576 data->REG_BEEP = NCT6776_REG_BEEP;
3578 reg_temp = NCT6775_REG_TEMP;
3579 reg_temp_mon = NCT6775_REG_TEMP_MON;
3580 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3581 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3582 reg_temp_over = NCT6775_REG_TEMP_OVER;
3583 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3584 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3585 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3586 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3592 data->auto_pwm_num = 4;
3593 data->has_fan_div = false;
3594 data->temp_fixed_num = 6;
3595 data->num_temp_alarms = 2;
3596 data->num_temp_beeps = 2;
3598 data->ALARM_BITS = NCT6779_ALARM_BITS;
3599 data->BEEP_BITS = NCT6779_BEEP_BITS;
3601 data->fan_from_reg = fan_from_reg13;
3602 data->fan_from_reg_min = fan_from_reg13;
3603 data->target_temp_mask = 0xff;
3604 data->tolerance_mask = 0x07;
3605 data->speed_tolerance_limit = 63;
3607 data->temp_label = nct6779_temp_label;
3608 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3610 data->REG_CONFIG = NCT6775_REG_CONFIG;
3611 data->REG_VBAT = NCT6775_REG_VBAT;
3612 data->REG_DIODE = NCT6775_REG_DIODE;
3613 data->DIODE_MASK = NCT6775_DIODE_MASK;
3614 data->REG_VIN = NCT6779_REG_IN;
3615 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3616 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3617 data->REG_TARGET = NCT6775_REG_TARGET;
3618 data->REG_FAN = NCT6779_REG_FAN;
3619 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3620 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3621 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3622 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3623 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3624 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3625 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3626 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3627 data->REG_PWM[0] = NCT6775_REG_PWM;
3628 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3629 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3630 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3631 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3632 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3633 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3634 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3635 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3636 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3637 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3638 data->REG_CRITICAL_TEMP_TOLERANCE
3639 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3640 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3641 data->CRITICAL_PWM_ENABLE_MASK
3642 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3643 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3644 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3645 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3646 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3647 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3648 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3649 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3650 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3651 data->REG_ALARM = NCT6779_REG_ALARM;
3652 data->REG_BEEP = NCT6776_REG_BEEP;
3654 reg_temp = NCT6779_REG_TEMP;
3655 reg_temp_mon = NCT6779_REG_TEMP_MON;
3656 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3657 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3658 reg_temp_over = NCT6779_REG_TEMP_OVER;
3659 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3660 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3661 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3662 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3670 data->auto_pwm_num = 4;
3671 data->has_fan_div = false;
3672 data->temp_fixed_num = 6;
3673 data->num_temp_alarms = 2;
3674 data->num_temp_beeps = 2;
3676 data->ALARM_BITS = NCT6791_ALARM_BITS;
3677 data->BEEP_BITS = NCT6779_BEEP_BITS;
3679 data->fan_from_reg = fan_from_reg13;
3680 data->fan_from_reg_min = fan_from_reg13;
3681 data->target_temp_mask = 0xff;
3682 data->tolerance_mask = 0x07;
3683 data->speed_tolerance_limit = 63;
3685 data->temp_label = nct6779_temp_label;
3686 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3688 data->REG_CONFIG = NCT6775_REG_CONFIG;
3689 data->REG_VBAT = NCT6775_REG_VBAT;
3690 data->REG_DIODE = NCT6775_REG_DIODE;
3691 data->DIODE_MASK = NCT6775_DIODE_MASK;
3692 data->REG_VIN = NCT6779_REG_IN;
3693 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3694 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3695 data->REG_TARGET = NCT6775_REG_TARGET;
3696 data->REG_FAN = NCT6779_REG_FAN;
3697 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3698 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3699 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3700 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3701 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3702 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3703 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3704 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3705 data->REG_PWM[0] = NCT6775_REG_PWM;
3706 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3707 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3708 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3709 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3710 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3711 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3712 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3713 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3714 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3715 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3716 data->REG_CRITICAL_TEMP_TOLERANCE
3717 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3718 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3719 data->CRITICAL_PWM_ENABLE_MASK
3720 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3721 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3722 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3723 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3724 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3725 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3726 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3727 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3728 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3729 data->REG_ALARM = NCT6791_REG_ALARM;
3730 if (data->kind == nct6791)
3731 data->REG_BEEP = NCT6776_REG_BEEP;
3733 data->REG_BEEP = NCT6792_REG_BEEP;
3735 reg_temp = NCT6779_REG_TEMP;
3736 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3737 if (data->kind == nct6791) {
3738 reg_temp_mon = NCT6779_REG_TEMP_MON;
3739 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3741 reg_temp_mon = NCT6792_REG_TEMP_MON;
3742 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3744 reg_temp_over = NCT6779_REG_TEMP_OVER;
3745 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3746 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3747 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3748 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3754 data->have_in = (1 << data->in_num) - 1;
3755 data->have_temp = 0;
3758 * On some boards, not all available temperature sources are monitored,
3759 * even though some of the monitoring registers are unused.
3760 * Get list of unused monitoring registers, then detect if any fan
3761 * controls are configured to use unmonitored temperature sources.
3762 * If so, assign the unmonitored temperature sources to available
3763 * monitoring registers.
3767 for (i = 0; i < num_reg_temp; i++) {
3768 if (reg_temp[i] == 0)
3771 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3772 if (!src || (mask & (1 << src)))
3773 available |= 1 << i;
3779 * Now find unmonitored temperature registers and enable monitoring
3780 * if additional monitoring registers are available.
3782 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3783 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3786 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3787 for (i = 0; i < num_reg_temp; i++) {
3788 if (reg_temp[i] == 0)
3791 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3792 if (!src || (mask & (1 << src)))
3795 if (src >= data->temp_label_num ||
3796 !strlen(data->temp_label[src])) {
3798 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3799 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3805 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3806 if (src <= data->temp_fixed_num) {
3807 data->have_temp |= 1 << (src - 1);
3808 data->have_temp_fixed |= 1 << (src - 1);
3809 data->reg_temp[0][src - 1] = reg_temp[i];
3810 data->reg_temp[1][src - 1] = reg_temp_over[i];
3811 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3812 if (reg_temp_crit_h && reg_temp_crit_h[i])
3813 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3814 else if (reg_temp_crit[src - 1])
3815 data->reg_temp[3][src - 1]
3816 = reg_temp_crit[src - 1];
3817 if (reg_temp_crit_l && reg_temp_crit_l[i])
3818 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3819 data->reg_temp_config[src - 1] = reg_temp_config[i];
3820 data->temp_src[src - 1] = src;
3827 /* Use dynamic index for other sources */
3828 data->have_temp |= 1 << s;
3829 data->reg_temp[0][s] = reg_temp[i];
3830 data->reg_temp[1][s] = reg_temp_over[i];
3831 data->reg_temp[2][s] = reg_temp_hyst[i];
3832 data->reg_temp_config[s] = reg_temp_config[i];
3833 if (reg_temp_crit_h && reg_temp_crit_h[i])
3834 data->reg_temp[3][s] = reg_temp_crit_h[i];
3835 else if (reg_temp_crit[src - 1])
3836 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3837 if (reg_temp_crit_l && reg_temp_crit_l[i])
3838 data->reg_temp[4][s] = reg_temp_crit_l[i];
3840 data->temp_src[s] = src;
3845 * Repeat with temperatures used for fan control.
3846 * This set of registers does not support limits.
3848 for (i = 0; i < num_reg_temp_mon; i++) {
3849 if (reg_temp_mon[i] == 0)
3852 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3853 if (!src || (mask & (1 << src)))
3856 if (src >= data->temp_label_num ||
3857 !strlen(data->temp_label[src])) {
3859 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3860 src, i, data->REG_TEMP_SEL[i],
3867 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3868 if (src <= data->temp_fixed_num) {
3869 if (data->have_temp & (1 << (src - 1)))
3871 data->have_temp |= 1 << (src - 1);
3872 data->have_temp_fixed |= 1 << (src - 1);
3873 data->reg_temp[0][src - 1] = reg_temp_mon[i];
3874 data->temp_src[src - 1] = src;
3881 /* Use dynamic index for other sources */
3882 data->have_temp |= 1 << s;
3883 data->reg_temp[0][s] = reg_temp_mon[i];
3884 data->temp_src[s] = src;
3888 #ifdef USE_ALTERNATE
3890 * Go through the list of alternate temp registers and enable
3892 * The temperature is already monitored if the respective bit in <mask>
3895 for (i = 0; i < data->temp_label_num - 1; i++) {
3896 if (!reg_temp_alternate[i])
3898 if (mask & (1 << (i + 1)))
3900 if (i < data->temp_fixed_num) {
3901 if (data->have_temp & (1 << i))
3903 data->have_temp |= 1 << i;
3904 data->have_temp_fixed |= 1 << i;
3905 data->reg_temp[0][i] = reg_temp_alternate[i];
3906 if (i < num_reg_temp) {
3907 data->reg_temp[1][i] = reg_temp_over[i];
3908 data->reg_temp[2][i] = reg_temp_hyst[i];
3910 data->temp_src[i] = i + 1;
3914 if (s >= NUM_TEMP) /* Abort if no more space */
3917 data->have_temp |= 1 << s;
3918 data->reg_temp[0][s] = reg_temp_alternate[i];
3919 data->temp_src[s] = i + 1;
3922 #endif /* USE_ALTERNATE */
3924 /* Initialize the chip */
3925 nct6775_init_device(data);
3927 err = superio_enter(sio_data->sioreg);
3931 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3932 switch (data->kind) {
3934 data->have_vid = (cr2a & 0x40);
3937 data->have_vid = (cr2a & 0x60) == 0x40;
3949 * We can get the VID input values directly at logical device D 0xe3.
3951 if (data->have_vid) {
3952 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3953 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3954 data->vrm = vid_which_vrm();
3960 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3961 tmp = superio_inb(sio_data->sioreg,
3962 NCT6775_REG_CR_FAN_DEBOUNCE);
3963 switch (data->kind) {
3980 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3982 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3986 nct6775_check_fan_inputs(data);
3988 superio_exit(sio_data->sioreg);
3990 /* Read fan clock dividers immediately */
3991 nct6775_init_fan_common(dev, data);
3993 /* Register sysfs hooks */
3994 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3997 return PTR_ERR(group);
3999 data->groups[num_attr_groups++] = group;
4001 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4002 fls(data->have_in));
4004 return PTR_ERR(group);
4006 data->groups[num_attr_groups++] = group;
4008 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4009 fls(data->has_fan));
4011 return PTR_ERR(group);
4013 data->groups[num_attr_groups++] = group;
4015 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4016 fls(data->have_temp));
4018 return PTR_ERR(group);
4020 data->groups[num_attr_groups++] = group;
4021 data->groups[num_attr_groups++] = &nct6775_group_other;
4023 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4024 data, data->groups);
4025 return PTR_ERR_OR_ZERO(hwmon_dev);
4028 static void nct6791_enable_io_mapping(int sioaddr)
4032 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4034 pr_info("Enabling hardware monitor logical device mappings.\n");
4035 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4040 static int __maybe_unused nct6775_suspend(struct device *dev)
4042 struct nct6775_data *data = nct6775_update_device(dev);
4044 mutex_lock(&data->update_lock);
4045 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4046 if (data->kind == nct6775) {
4047 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4048 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4050 mutex_unlock(&data->update_lock);
4055 static int __maybe_unused nct6775_resume(struct device *dev)
4057 struct nct6775_data *data = dev_get_drvdata(dev);
4058 int sioreg = data->sioreg;
4062 mutex_lock(&data->update_lock);
4063 data->bank = 0xff; /* Force initial bank selection */
4065 err = superio_enter(sioreg);
4069 superio_select(sioreg, NCT6775_LD_HWM);
4070 reg = superio_inb(sioreg, SIO_REG_ENABLE);
4071 if (reg != data->sio_reg_enable)
4072 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4074 if (data->kind == nct6791 || data->kind == nct6792 ||
4075 data->kind == nct6793)
4076 nct6791_enable_io_mapping(sioreg);
4078 superio_exit(sioreg);
4080 /* Restore limits */
4081 for (i = 0; i < data->in_num; i++) {
4082 if (!(data->have_in & (1 << i)))
4085 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4087 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4091 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4092 if (!(data->has_fan_min & (1 << i)))
4095 nct6775_write_value(data, data->REG_FAN_MIN[i],
4099 for (i = 0; i < NUM_TEMP; i++) {
4100 if (!(data->have_temp & (1 << i)))
4103 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4104 if (data->reg_temp[j][i])
4105 nct6775_write_temp(data, data->reg_temp[j][i],
4109 /* Restore other settings */
4110 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4111 if (data->kind == nct6775) {
4112 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4113 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4117 /* Force re-reading all values */
4118 data->valid = false;
4119 mutex_unlock(&data->update_lock);
4124 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4126 static struct platform_driver nct6775_driver = {
4129 .pm = &nct6775_dev_pm_ops,
4131 .probe = nct6775_probe,
4134 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4135 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4141 err = superio_enter(sioaddr);
4148 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4149 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4150 switch (val & SIO_ID_MASK) {
4151 case SIO_NCT6106_ID:
4152 sio_data->kind = nct6106;
4154 case SIO_NCT6775_ID:
4155 sio_data->kind = nct6775;
4157 case SIO_NCT6776_ID:
4158 sio_data->kind = nct6776;
4160 case SIO_NCT6779_ID:
4161 sio_data->kind = nct6779;
4163 case SIO_NCT6791_ID:
4164 sio_data->kind = nct6791;
4166 case SIO_NCT6792_ID:
4167 sio_data->kind = nct6792;
4169 case SIO_NCT6793_ID:
4170 sio_data->kind = nct6793;
4174 pr_debug("unsupported chip ID: 0x%04x\n", val);
4175 superio_exit(sioaddr);
4179 /* We have a known chip, find the HWM I/O address */
4180 superio_select(sioaddr, NCT6775_LD_HWM);
4181 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4182 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4183 addr = val & IOREGION_ALIGNMENT;
4185 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4186 superio_exit(sioaddr);
4190 /* Activate logical device if needed */
4191 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4192 if (!(val & 0x01)) {
4193 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4194 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4197 if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4198 sio_data->kind == nct6793)
4199 nct6791_enable_io_mapping(sioaddr);
4201 superio_exit(sioaddr);
4202 pr_info("Found %s or compatible chip at %#x:%#x\n",
4203 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4204 sio_data->sioreg = sioaddr;
4210 * when Super-I/O functions move to a separate file, the Super-I/O
4211 * bus will manage the lifetime of the device and this module will only keep
4212 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4213 * must keep track of the device
4215 static struct platform_device *pdev[2];
4217 static int __init sensors_nct6775_init(void)
4222 struct resource res;
4223 struct nct6775_sio_data sio_data;
4224 int sioaddr[2] = { 0x2e, 0x4e };
4226 err = platform_driver_register(&nct6775_driver);
4231 * initialize sio_data->kind and sio_data->sioreg.
4233 * when Super-I/O functions move to a separate file, the Super-I/O
4234 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4235 * nct6775 hardware monitor, and call probe()
4237 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4238 address = nct6775_find(sioaddr[i], &sio_data);
4244 pdev[i] = platform_device_alloc(DRVNAME, address);
4247 goto exit_device_unregister;
4250 err = platform_device_add_data(pdev[i], &sio_data,
4251 sizeof(struct nct6775_sio_data));
4253 goto exit_device_put;
4255 memset(&res, 0, sizeof(res));
4257 res.start = address + IOREGION_OFFSET;
4258 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4259 res.flags = IORESOURCE_IO;
4261 err = acpi_check_resource_conflict(&res);
4263 platform_device_put(pdev[i]);
4268 err = platform_device_add_resources(pdev[i], &res, 1);
4270 goto exit_device_put;
4272 /* platform_device_add calls probe() */
4273 err = platform_device_add(pdev[i]);
4275 goto exit_device_put;
4279 goto exit_unregister;
4285 platform_device_put(pdev[i]);
4286 exit_device_unregister:
4289 platform_device_unregister(pdev[i]);
4292 platform_driver_unregister(&nct6775_driver);
4296 static void __exit sensors_nct6775_exit(void)
4300 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4302 platform_device_unregister(pdev[i]);
4304 platform_driver_unregister(&nct6775_driver);
4307 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4308 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4309 MODULE_LICENSE("GPL");
4311 module_init(sensors_nct6775_init);
4312 module_exit(sensors_nct6775_exit);