drivers/hwmon/w83627ehf.c

   1 /*
   2     w83627ehf - Driver for the hardware monitoring functionality of
   3                 the Winbond W83627EHF Super-I/O chip
   4     Copyright (C) 2005  Jean Delvare <khali@linux-fr.org>
   5     Copyright (C) 2006  Yuan Mu (Winbond),
   6                         Rudolf Marek <r.marek@assembler.cz>
   7                         David Hubbard <david.c.hubbard@gmail.com>
   8                         Daniel J Blueman <daniel.blueman@gmail.com>
   9     Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  10
  11     Shamelessly ripped from the w83627hf driver
  12     Copyright (C) 2003  Mark Studebaker
  13
  14     Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
  15     in testing and debugging this driver.
  16
  17     This driver also supports the W83627EHG, which is the lead-free
  18     version of the W83627EHF.
  19
  20     This program is free software; you can redistribute it and/or modify
  21     it under the terms of the GNU General Public License as published by
  22     the Free Software Foundation; either version 2 of the License, or
  23     (at your option) any later version.
  24
  25     This program is distributed in the hope that it will be useful,
  26     but WITHOUT ANY WARRANTY; without even the implied warranty of
  27     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28     GNU General Public License for more details.
  29
  30     You should have received a copy of the GNU General Public License
  31     along with this program; if not, write to the Free Software
  32     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  33
  34
  35     Supports the following chips:
  36
  37     Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  38     w83627ehf   10      5       4       3      0x8850 0x88    0x5ca3
  39                                                0x8860 0xa1
  40     w83627dhg    9      5       4       3      0xa020 0xc1    0x5ca3
  41     w83627dhg-p  9      5       4       3      0xb070 0xc1    0x5ca3
  42     w83667hg     9      5       3       3      0xa510 0xc1    0x5ca3
  43     w83667hg-b   9      5       3       4      0xb350 0xc1    0x5ca3
  44     nct6775f     9      4       3       9      0xb470 0xc1    0x5ca3
  45     nct6776f     9      5       3       9      0xC330 0xc1    0x5ca3
  46 */
  47
  48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/slab.h>
  53 #include <linux/jiffies.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/hwmon.h>
  56 #include <linux/hwmon-sysfs.h>
  57 #include <linux/hwmon-vid.h>
  58 #include <linux/err.h>
  59 #include <linux/mutex.h>
  60 #include <linux/acpi.h>
  61 #include <linux/io.h>
  62 #include "lm75.h"
  63
  64 enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg, w83667hg_b, nct6775,
  65         nct6776 };
  66
  67 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
  68 static const char * const w83627ehf_device_names[] = {
  69         "w83627ehf",
  70         "w83627dhg",
  71         "w83627dhg",
  72         "w83667hg",
  73         "w83667hg",
  74         "nct6775",
  75         "nct6776",
  76 };
  77
  78 static unsigned short force_id;
  79 module_param(force_id, ushort, 0);
  80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  81
  82 static unsigned short fan_debounce;
  83 module_param(fan_debounce, ushort, 0);
  84 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  85
  86 #define DRVNAME "w83627ehf"
  87
  88 /*
  89  * Super-I/O constants and functions
  90  */
  91
  92 #define W83627EHF_LD_HWM        0x0b
  93 #define W83667HG_LD_VID         0x0d
  94
  95 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  96 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  97 #define SIO_REG_EN_VRM10        0x2C    /* GPIO3, GPIO4 selection */
  98 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  99 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 100 #define SIO_REG_VID_CTRL        0xF0    /* VID control */
 101 #define SIO_REG_VID_DATA        0xF1    /* VID data */
 102
 103 #define SIO_W83627EHF_ID        0x8850
 104 #define SIO_W83627EHG_ID        0x8860
 105 #define SIO_W83627DHG_ID        0xa020
 106 #define SIO_W83627DHG_P_ID      0xb070
 107 #define SIO_W83667HG_ID         0xa510
 108 #define SIO_W83667HG_B_ID       0xb350
 109 #define SIO_NCT6775_ID          0xb470
 110 #define SIO_NCT6776_ID          0xc330
 111 #define SIO_ID_MASK             0xFFF0
 112
 113 static inline void
 114 superio_outb(int ioreg, int reg, int val)
 115 {
 116         outb(reg, ioreg);
 117         outb(val, ioreg + 1);
 118 }
 119
 120 static inline int
 121 superio_inb(int ioreg, int reg)
 122 {
 123         outb(reg, ioreg);
 124         return inb(ioreg + 1);
 125 }
 126
 127 static inline void
 128 superio_select(int ioreg, int ld)
 129 {
 130         outb(SIO_REG_LDSEL, ioreg);
 131         outb(ld, ioreg + 1);
 132 }
 133
 134 static inline void
 135 superio_enter(int ioreg)
 136 {
 137         outb(0x87, ioreg);
 138         outb(0x87, ioreg);
 139 }
 140
 141 static inline void
 142 superio_exit(int ioreg)
 143 {
 144         outb(0xaa, ioreg);
 145         outb(0x02, ioreg);
 146         outb(0x02, ioreg + 1);
 147 }
 148
 149 /*
 150  * ISA constants
 151  */
 152
 153 #define IOREGION_ALIGNMENT      (~7)
 154 #define IOREGION_OFFSET         5
 155 #define IOREGION_LENGTH         2
 156 #define ADDR_REG_OFFSET         0
 157 #define DATA_REG_OFFSET         1
 158
 159 #define W83627EHF_REG_BANK              0x4E
 160 #define W83627EHF_REG_CONFIG            0x40
 161
 162 /* Not currently used:
 163  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 164  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 165  * REG_MAN_ID is at port 0x4f
 166  * REG_CHIP_ID is at port 0x58 */
 167
 168 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
 169 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
 170
 171 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
 172 #define W83627EHF_REG_IN_MAX(nr)        ((nr < 7) ? (0x2b + (nr) * 2) : \
 173                                          (0x554 + (((nr) - 7) * 2)))
 174 #define W83627EHF_REG_IN_MIN(nr)        ((nr < 7) ? (0x2c + (nr) * 2) : \
 175                                          (0x555 + (((nr) - 7) * 2)))
 176 #define W83627EHF_REG_IN(nr)            ((nr < 7) ? (0x20 + (nr)) : \
 177                                          (0x550 + (nr) - 7))
 178
 179 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
 180 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
 181 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
 182 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
 183
 184 /* Fan clock dividers are spread over the following five registers */
 185 #define W83627EHF_REG_FANDIV1           0x47
 186 #define W83627EHF_REG_FANDIV2           0x4B
 187 #define W83627EHF_REG_VBAT              0x5D
 188 #define W83627EHF_REG_DIODE             0x59
 189 #define W83627EHF_REG_SMI_OVT           0x4C
 190
 191 /* NCT6775F has its own fan divider registers */
 192 #define NCT6775_REG_FANDIV1             0x506
 193 #define NCT6775_REG_FANDIV2             0x507
 194 #define NCT6775_REG_FAN_DEBOUNCE        0xf0
 195
 196 #define W83627EHF_REG_ALARM1            0x459
 197 #define W83627EHF_REG_ALARM2            0x45A
 198 #define W83627EHF_REG_ALARM3            0x45B
 199
 200 #define W83627EHF_REG_CASEOPEN_DET      0x42 /* SMI STATUS #2 */
 201 #define W83627EHF_REG_CASEOPEN_CLR      0x46 /* SMI MASK #3 */
 202
 203 /* SmartFan registers */
 204 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
 205 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
 206
 207 /* DC or PWM output fan configuration */
 208 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
 209         0x04,                   /* SYS FAN0 output mode and PWM mode */
 210         0x04,                   /* CPU FAN0 output mode and PWM mode */
 211         0x12,                   /* AUX FAN mode */
 212         0x62,                   /* CPU FAN1 mode */
 213 };
 214
 215 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
 216 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
 217
 218 /* FAN Duty Cycle, be used to control */
 219 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
 220 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
 221 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
 222
 223 /* Advanced Fan control, some values are common for all fans */
 224 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
 225 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
 226 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
 227
 228 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
 229                                                 = { 0xff, 0x67, 0xff, 0x69 };
 230 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
 231                                                 = { 0xff, 0x68, 0xff, 0x6a };
 232
 233 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
 234 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
 235                                                 = { 0x68, 0x6a, 0x6c };
 236
 237 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
 238 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
 239 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
 240 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
 241 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
 242 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
 243 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 244 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 245 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 246 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
 247
 248 static const u16 NCT6775_REG_TEMP[]
 249         = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
 250 static const u16 NCT6775_REG_TEMP_CONFIG[]
 251         = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
 252 static const u16 NCT6775_REG_TEMP_HYST[]
 253         = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
 254 static const u16 NCT6775_REG_TEMP_OVER[]
 255         = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
 256 static const u16 NCT6775_REG_TEMP_SOURCE[]
 257         = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
 258
 259 static const char *const w83667hg_b_temp_label[] = {
 260         "SYSTIN",
 261         "CPUTIN",
 262         "AUXTIN",
 263         "AMDTSI",
 264         "PECI Agent 1",
 265         "PECI Agent 2",
 266         "PECI Agent 3",
 267         "PECI Agent 4"
 268 };
 269
 270 static const char *const nct6775_temp_label[] = {
 271         "",
 272         "SYSTIN",
 273         "CPUTIN",
 274         "AUXTIN",
 275         "AMD SB-TSI",
 276         "PECI Agent 0",
 277         "PECI Agent 1",
 278         "PECI Agent 2",
 279         "PECI Agent 3",
 280         "PECI Agent 4",
 281         "PECI Agent 5",
 282         "PECI Agent 6",
 283         "PECI Agent 7",
 284         "PCH_CHIP_CPU_MAX_TEMP",
 285         "PCH_CHIP_TEMP",
 286         "PCH_CPU_TEMP",
 287         "PCH_MCH_TEMP",
 288         "PCH_DIM0_TEMP",
 289         "PCH_DIM1_TEMP",
 290         "PCH_DIM2_TEMP",
 291         "PCH_DIM3_TEMP"
 292 };
 293
 294 static const char *const nct6776_temp_label[] = {
 295         "",
 296         "SYSTIN",
 297         "CPUTIN",
 298         "AUXTIN",
 299         "SMBUSMASTER 0",
 300         "SMBUSMASTER 1",
 301         "SMBUSMASTER 2",
 302         "SMBUSMASTER 3",
 303         "SMBUSMASTER 4",
 304         "SMBUSMASTER 5",
 305         "SMBUSMASTER 6",
 306         "SMBUSMASTER 7",
 307         "PECI Agent 0",
 308         "PECI Agent 1",
 309         "PCH_CHIP_CPU_MAX_TEMP",
 310         "PCH_CHIP_TEMP",
 311         "PCH_CPU_TEMP",
 312         "PCH_MCH_TEMP",
 313         "PCH_DIM0_TEMP",
 314         "PCH_DIM1_TEMP",
 315         "PCH_DIM2_TEMP",
 316         "PCH_DIM3_TEMP",
 317         "BYTE_TEMP"
 318 };
 319
 320 #define NUM_REG_TEMP    ARRAY_SIZE(NCT6775_REG_TEMP)
 321
 322 static int is_word_sized(u16 reg)
 323 {
 324         return ((((reg & 0xff00) == 0x100
 325               || (reg & 0xff00) == 0x200)
 326              && ((reg & 0x00ff) == 0x50
 327               || (reg & 0x00ff) == 0x53
 328               || (reg & 0x00ff) == 0x55))
 329              || (reg & 0xfff0) == 0x630
 330              || reg == 0x640 || reg == 0x642
 331              || ((reg & 0xfff0) == 0x650
 332                  && (reg & 0x000f) >= 0x06)
 333              || reg == 0x73 || reg == 0x75 || reg == 0x77
 334                 );
 335 }
 336
 337 /*
 338  * Conversions
 339  */
 340
 341 /* 1 is PWM mode, output in ms */
 342 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
 343 {
 344         return mode ? 100 * reg : 400 * reg;
 345 }
 346
 347 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
 348 {
 349         return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
 350                                                 (msec + 200) / 400), 1, 255);
 351 }
 352
 353 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 354 {
 355         if (reg == 0 || reg == 255)
 356                 return 0;
 357         return 1350000U / (reg << divreg);
 358 }
 359
 360 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 361 {
 362         if ((reg & 0xff1f) == 0xff1f)
 363                 return 0;
 364
 365         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 366
 367         if (reg == 0)
 368                 return 0;
 369
 370         return 1350000U / reg;
 371 }
 372
 373 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 374 {
 375         if (reg == 0 || reg == 0xffff)
 376                 return 0;
 377
 378         /*
 379          * Even though the registers are 16 bit wide, the fan divisor
 380          * still applies.
 381          */
 382         return 1350000U / (reg << divreg);
 383 }
 384
 385 static inline unsigned int
 386 div_from_reg(u8 reg)
 387 {
 388         return 1 << reg;
 389 }
 390
 391 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
 392
 393 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
 394
 395 static inline long in_from_reg(u8 reg, u8 nr)
 396 {
 397         return reg * scale_in[nr];
 398 }
 399
 400 static inline u8 in_to_reg(u32 val, u8 nr)
 401 {
 402         return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0,
 403                              255);
 404 }
 405
 406 /*
 407  * Data structures and manipulation thereof
 408  */
 409
 410 struct w83627ehf_data {
 411         int addr;       /* IO base of hw monitor block */
 412         const char *name;
 413
 414         struct device *hwmon_dev;
 415         struct mutex lock;
 416
 417         u16 reg_temp[NUM_REG_TEMP];
 418         u16 reg_temp_over[NUM_REG_TEMP];
 419         u16 reg_temp_hyst[NUM_REG_TEMP];
 420         u16 reg_temp_config[NUM_REG_TEMP];
 421         u8 temp_src[NUM_REG_TEMP];
 422         const char * const *temp_label;
 423
 424         const u16 *REG_PWM;
 425         const u16 *REG_TARGET;
 426         const u16 *REG_FAN;
 427         const u16 *REG_FAN_MIN;
 428         const u16 *REG_FAN_START_OUTPUT;
 429         const u16 *REG_FAN_STOP_OUTPUT;
 430         const u16 *REG_FAN_STOP_TIME;
 431         const u16 *REG_FAN_MAX_OUTPUT;
 432         const u16 *REG_FAN_STEP_OUTPUT;
 433
 434         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 435         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 436
 437         struct mutex update_lock;
 438         char valid;             /* !=0 if following fields are valid */
 439         unsigned long last_updated;     /* In jiffies */
 440
 441         /* Register values */
 442         u8 bank;                /* current register bank */
 443         u8 in_num;              /* number of in inputs we have */
 444         u8 in[10];              /* Register value */
 445         u8 in_max[10];          /* Register value */
 446         u8 in_min[10];          /* Register value */
 447         unsigned int rpm[5];
 448         u16 fan_min[5];
 449         u8 fan_div[5];
 450         u8 has_fan;             /* some fan inputs can be disabled */
 451         u8 has_fan_min;         /* some fans don't have min register */
 452         bool has_fan_div;
 453         u8 temp_type[3];
 454         s16 temp[9];
 455         s16 temp_max[9];
 456         s16 temp_max_hyst[9];
 457         u32 alarms;
 458         u8 caseopen;
 459
 460         u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
 461         u8 pwm_enable[4]; /* 1->manual
 462                              2->thermal cruise mode (also called SmartFan I)
 463                              3->fan speed cruise mode
 464                              4->variable thermal cruise (also called
 465                                 SmartFan III)
 466                              5->enhanced variable thermal cruise (also called
 467                                 SmartFan IV) */
 468         u8 pwm_enable_orig[4];  /* original value of pwm_enable */
 469         u8 pwm_num;             /* number of pwm */
 470         u8 pwm[4];
 471         u8 target_temp[4];
 472         u8 tolerance[4];
 473
 474         u8 fan_start_output[4]; /* minimum fan speed when spinning up */
 475         u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
 476         u8 fan_stop_time[4]; /* time at minimum before disabling fan */
 477         u8 fan_max_output[4]; /* maximum fan speed */
 478         u8 fan_step_output[4]; /* rate of change output value */
 479
 480         u8 vid;
 481         u8 vrm;
 482
 483         u16 have_temp;
 484         u8 in6_skip;
 485 };
 486
 487 struct w83627ehf_sio_data {
 488         int sioreg;
 489         enum kinds kind;
 490 };
 491
 492 /*
 493  * On older chips, only registers 0x50-0x5f are banked.
 494  * On more recent chips, all registers are banked.
 495  * Assume that is the case and set the bank number for each access.
 496  * Cache the bank number so it only needs to be set if it changes.
 497  */
 498 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
 499 {
 500         u8 bank = reg >> 8;
 501         if (data->bank != bank) {
 502                 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
 503                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 504                 data->bank = bank;
 505         }
 506 }
 507
 508 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
 509 {
 510         int res, word_sized = is_word_sized(reg);
 511
 512         mutex_lock(&data->lock);
 513
 514         w83627ehf_set_bank(data, reg);
 515         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 516         res = inb_p(data->addr + DATA_REG_OFFSET);
 517         if (word_sized) {
 518                 outb_p((reg & 0xff) + 1,
 519                        data->addr + ADDR_REG_OFFSET);
 520                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 521         }
 522
 523         mutex_unlock(&data->lock);
 524         return res;
 525 }
 526
 527 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
 528                                  u16 value)
 529 {
 530         int word_sized = is_word_sized(reg);
 531
 532         mutex_lock(&data->lock);
 533
 534         w83627ehf_set_bank(data, reg);
 535         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 536         if (word_sized) {
 537                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 538                 outb_p((reg & 0xff) + 1,
 539                        data->addr + ADDR_REG_OFFSET);
 540         }
 541         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
 542
 543         mutex_unlock(&data->lock);
 544         return 0;
 545 }
 546
 547 /* We left-align 8-bit temperature values to make the code simpler */
 548 static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
 549 {
 550         u16 res;
 551
 552         res = w83627ehf_read_value(data, reg);
 553         if (!is_word_sized(reg))
 554                 res <<= 8;
 555
 556         return res;
 557 }
 558
 559 static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
 560                                        u16 value)
 561 {
 562         if (!is_word_sized(reg))
 563                 value >>= 8;
 564         return w83627ehf_write_value(data, reg, value);
 565 }
 566
 567 /* This function assumes that the caller holds data->update_lock */
 568 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
 569 {
 570         u8 reg;
 571
 572         switch (nr) {
 573         case 0:
 574                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
 575                     | (data->fan_div[0] & 0x7);
 576                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 577                 break;
 578         case 1:
 579                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
 580                     | ((data->fan_div[1] << 4) & 0x70);
 581                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 582         case 2:
 583                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
 584                     | (data->fan_div[2] & 0x7);
 585                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 586                 break;
 587         case 3:
 588                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
 589                     | ((data->fan_div[3] << 4) & 0x70);
 590                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 591                 break;
 592         }
 593 }
 594
 595 /* This function assumes that the caller holds data->update_lock */
 596 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
 597 {
 598         u8 reg;
 599
 600         switch (nr) {
 601         case 0:
 602                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
 603                     | ((data->fan_div[0] & 0x03) << 4);
 604                 /* fan5 input control bit is write only, compute the value */
 605                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 606                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 607                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
 608                     | ((data->fan_div[0] & 0x04) << 3);
 609                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 610                 break;
 611         case 1:
 612                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
 613                     | ((data->fan_div[1] & 0x03) << 6);
 614                 /* fan5 input control bit is write only, compute the value */
 615                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 616                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 617                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
 618                     | ((data->fan_div[1] & 0x04) << 4);
 619                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 620                 break;
 621         case 2:
 622                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
 623                     | ((data->fan_div[2] & 0x03) << 6);
 624                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
 625                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
 626                     | ((data->fan_div[2] & 0x04) << 5);
 627                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 628                 break;
 629         case 3:
 630                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
 631                     | (data->fan_div[3] & 0x03);
 632                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 633                 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
 634                     | ((data->fan_div[3] & 0x04) << 5);
 635                 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
 636                 break;
 637         case 4:
 638                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
 639                     | ((data->fan_div[4] & 0x03) << 2)
 640                     | ((data->fan_div[4] & 0x04) << 5);
 641                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 642                 break;
 643         }
 644 }
 645
 646 static void w83627ehf_write_fan_div_common(struct device *dev,
 647                                            struct w83627ehf_data *data, int nr)
 648 {
 649         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 650
 651         if (sio_data->kind == nct6776)
 652                 ; /* no dividers, do nothing */
 653         else if (sio_data->kind == nct6775)
 654                 nct6775_write_fan_div(data, nr);
 655         else
 656                 w83627ehf_write_fan_div(data, nr);
 657 }
 658
 659 static void nct6775_update_fan_div(struct w83627ehf_data *data)
 660 {
 661         u8 i;
 662
 663         i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
 664         data->fan_div[0] = i & 0x7;
 665         data->fan_div[1] = (i & 0x70) >> 4;
 666         i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
 667         data->fan_div[2] = i & 0x7;
 668         if (data->has_fan & (1<<3))
 669                 data->fan_div[3] = (i & 0x70) >> 4;
 670 }
 671
 672 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
 673 {
 674         int i;
 675
 676         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
 677         data->fan_div[0] = (i >> 4) & 0x03;
 678         data->fan_div[1] = (i >> 6) & 0x03;
 679         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
 680         data->fan_div[2] = (i >> 6) & 0x03;
 681         i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
 682         data->fan_div[0] |= (i >> 3) & 0x04;
 683         data->fan_div[1] |= (i >> 4) & 0x04;
 684         data->fan_div[2] |= (i >> 5) & 0x04;
 685         if (data->has_fan & ((1 << 3) | (1 << 4))) {
 686                 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
 687                 data->fan_div[3] = i & 0x03;
 688                 data->fan_div[4] = ((i >> 2) & 0x03)
 689                                  | ((i >> 5) & 0x04);
 690         }
 691         if (data->has_fan & (1 << 3)) {
 692                 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
 693                 data->fan_div[3] |= (i >> 5) & 0x04;
 694         }
 695 }
 696
 697 static void w83627ehf_update_fan_div_common(struct device *dev,
 698                                             struct w83627ehf_data *data)
 699 {
 700         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 701
 702         if (sio_data->kind == nct6776)
 703                 ; /* no dividers, do nothing */
 704         else if (sio_data->kind == nct6775)
 705                 nct6775_update_fan_div(data);
 706         else
 707                 w83627ehf_update_fan_div(data);
 708 }
 709
 710 static void nct6775_update_pwm(struct w83627ehf_data *data)
 711 {
 712         int i;
 713         int pwmcfg, fanmodecfg;
 714
 715         for (i = 0; i < data->pwm_num; i++) {
 716                 pwmcfg = w83627ehf_read_value(data,
 717                                               W83627EHF_REG_PWM_ENABLE[i]);
 718                 fanmodecfg = w83627ehf_read_value(data,
 719                                                   NCT6775_REG_FAN_MODE[i]);
 720                 data->pwm_mode[i] =
 721                   ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 722                 data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
 723                 data->tolerance[i] = fanmodecfg & 0x0f;
 724                 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 725         }
 726 }
 727
 728 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
 729 {
 730         int i;
 731         int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
 732
 733         for (i = 0; i < data->pwm_num; i++) {
 734                 if (!(data->has_fan & (1 << i)))
 735                         continue;
 736
 737                 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
 738                 if (i != 1) {
 739                         pwmcfg = w83627ehf_read_value(data,
 740                                         W83627EHF_REG_PWM_ENABLE[i]);
 741                         tolerance = w83627ehf_read_value(data,
 742                                         W83627EHF_REG_TOLERANCE[i]);
 743                 }
 744                 data->pwm_mode[i] =
 745                         ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 746                 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
 747                                        & 3) + 1;
 748                 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 749
 750                 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
 751         }
 752 }
 753
 754 static void w83627ehf_update_pwm_common(struct device *dev,
 755                                         struct w83627ehf_data *data)
 756 {
 757         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 758
 759         if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
 760                 nct6775_update_pwm(data);
 761         else
 762                 w83627ehf_update_pwm(data);
 763 }
 764
 765 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
 766 {
 767         struct w83627ehf_data *data = dev_get_drvdata(dev);
 768         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 769
 770         int i;
 771
 772         mutex_lock(&data->update_lock);
 773
 774         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
 775          || !data->valid) {
 776                 /* Fan clock dividers */
 777                 w83627ehf_update_fan_div_common(dev, data);
 778
 779                 /* Measured voltages and limits */
 780                 for (i = 0; i < data->in_num; i++) {
 781                         if ((i == 6) && data->in6_skip)
 782                                 continue;
 783
 784                         data->in[i] = w83627ehf_read_value(data,
 785                                       W83627EHF_REG_IN(i));
 786                         data->in_min[i] = w83627ehf_read_value(data,
 787                                           W83627EHF_REG_IN_MIN(i));
 788                         data->in_max[i] = w83627ehf_read_value(data,
 789                                           W83627EHF_REG_IN_MAX(i));
 790                 }
 791
 792                 /* Measured fan speeds and limits */
 793                 for (i = 0; i < 5; i++) {
 794                         u16 reg;
 795
 796                         if (!(data->has_fan & (1 << i)))
 797                                 continue;
 798
 799                         reg = w83627ehf_read_value(data, data->REG_FAN[i]);
 800                         data->rpm[i] = data->fan_from_reg(reg,
 801                                                           data->fan_div[i]);
 802
 803                         if (data->has_fan_min & (1 << i))
 804                                 data->fan_min[i] = w83627ehf_read_value(data,
 805                                            data->REG_FAN_MIN[i]);
 806
 807                         /* If we failed to measure the fan speed and clock
 808                            divider can be increased, let's try that for next
 809                            time */
 810                         if (data->has_fan_div
 811                             && (reg >= 0xff || (sio_data->kind == nct6775
 812                                                 && reg == 0x00))
 813                             && data->fan_div[i] < 0x07) {
 814                                 dev_dbg(dev, "Increasing fan%d "
 815                                         "clock divider from %u to %u\n",
 816                                         i + 1, div_from_reg(data->fan_div[i]),
 817                                         div_from_reg(data->fan_div[i] + 1));
 818                                 data->fan_div[i]++;
 819                                 w83627ehf_write_fan_div_common(dev, data, i);
 820                                 /* Preserve min limit if possible */
 821                                 if ((data->has_fan_min & (1 << i))
 822                                  && data->fan_min[i] >= 2
 823                                  && data->fan_min[i] != 255)
 824                                         w83627ehf_write_value(data,
 825                                                 data->REG_FAN_MIN[i],
 826                                                 (data->fan_min[i] /= 2));
 827                         }
 828                 }
 829
 830                 w83627ehf_update_pwm_common(dev, data);
 831
 832                 for (i = 0; i < data->pwm_num; i++) {
 833                         if (!(data->has_fan & (1 << i)))
 834                                 continue;
 835
 836                         data->fan_start_output[i] =
 837                           w83627ehf_read_value(data,
 838                                                data->REG_FAN_START_OUTPUT[i]);
 839                         data->fan_stop_output[i] =
 840                           w83627ehf_read_value(data,
 841                                                data->REG_FAN_STOP_OUTPUT[i]);
 842                         data->fan_stop_time[i] =
 843                           w83627ehf_read_value(data,
 844                                                data->REG_FAN_STOP_TIME[i]);
 845
 846                         if (data->REG_FAN_MAX_OUTPUT &&
 847                             data->REG_FAN_MAX_OUTPUT[i] != 0xff)
 848                                 data->fan_max_output[i] =
 849                                   w83627ehf_read_value(data,
 850                                                 data->REG_FAN_MAX_OUTPUT[i]);
 851
 852                         if (data->REG_FAN_STEP_OUTPUT &&
 853                             data->REG_FAN_STEP_OUTPUT[i] != 0xff)
 854                                 data->fan_step_output[i] =
 855                                   w83627ehf_read_value(data,
 856                                                 data->REG_FAN_STEP_OUTPUT[i]);
 857
 858                         data->target_temp[i] =
 859                                 w83627ehf_read_value(data,
 860                                         data->REG_TARGET[i]) &
 861                                         (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
 862                 }
 863
 864                 /* Measured temperatures and limits */
 865                 for (i = 0; i < NUM_REG_TEMP; i++) {
 866                         if (!(data->have_temp & (1 << i)))
 867                                 continue;
 868                         data->temp[i] = w83627ehf_read_temp(data,
 869                                                 data->reg_temp[i]);
 870                         if (data->reg_temp_over[i])
 871                                 data->temp_max[i]
 872                                   = w83627ehf_read_temp(data,
 873                                                 data->reg_temp_over[i]);
 874                         if (data->reg_temp_hyst[i])
 875                                 data->temp_max_hyst[i]
 876                                   = w83627ehf_read_temp(data,
 877                                                 data->reg_temp_hyst[i]);
 878                 }
 879
 880                 data->alarms = w83627ehf_read_value(data,
 881                                         W83627EHF_REG_ALARM1) |
 882                                (w83627ehf_read_value(data,
 883                                         W83627EHF_REG_ALARM2) << 8) |
 884                                (w83627ehf_read_value(data,
 885                                         W83627EHF_REG_ALARM3) << 16);
 886
 887                 data->caseopen = w83627ehf_read_value(data,
 888                                                 W83627EHF_REG_CASEOPEN_DET);
 889
 890                 data->last_updated = jiffies;
 891                 data->valid = 1;
 892         }
 893
 894         mutex_unlock(&data->update_lock);
 895         return data;
 896 }
 897
 898 /*
 899  * Sysfs callback functions
 900  */
 901 #define show_in_reg(reg) \
 902 static ssize_t \
 903 show_##reg(struct device *dev, struct device_attribute *attr, \
 904            char *buf) \
 905 { \
 906         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 907         struct sensor_device_attribute *sensor_attr = \
 908                 to_sensor_dev_attr(attr); \
 909         int nr = sensor_attr->index; \
 910         return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
 911 }
 912 show_in_reg(in)
 913 show_in_reg(in_min)
 914 show_in_reg(in_max)
 915
 916 #define store_in_reg(REG, reg) \
 917 static ssize_t \
 918 store_in_##reg(struct device *dev, struct device_attribute *attr, \
 919                const char *buf, size_t count) \
 920 { \
 921         struct w83627ehf_data *data = dev_get_drvdata(dev); \
 922         struct sensor_device_attribute *sensor_attr = \
 923                 to_sensor_dev_attr(attr); \
 924         int nr = sensor_attr->index; \
 925         unsigned long val; \
 926         int err; \
 927         err = strict_strtoul(buf, 10, &val); \
 928         if (err < 0) \
 929                 return err; \
 930         mutex_lock(&data->update_lock); \
 931         data->in_##reg[nr] = in_to_reg(val, nr); \
 932         w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
 933                               data->in_##reg[nr]); \
 934         mutex_unlock(&data->update_lock); \
 935         return count; \
 936 }
 937
 938 store_in_reg(MIN, min)
 939 store_in_reg(MAX, max)
 940
 941 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
 942                           char *buf)
 943 {
 944         struct w83627ehf_data *data = w83627ehf_update_device(dev);
 945         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 946         int nr = sensor_attr->index;
 947         return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
 948 }
 949
 950 static struct sensor_device_attribute sda_in_input[] = {
 951         SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
 952         SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
 953         SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
 954         SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
 955         SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
 956         SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
 957         SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
 958         SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
 959         SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
 960         SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
 961 };
 962
 963 static struct sensor_device_attribute sda_in_alarm[] = {
 964         SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
 965         SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
 966         SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
 967         SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
 968         SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
 969         SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
 970         SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
 971         SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
 972         SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
 973         SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
 974 };
 975
 976 static struct sensor_device_attribute sda_in_min[] = {
 977         SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
 978         SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
 979         SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
 980         SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
 981         SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
 982         SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
 983         SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
 984         SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
 985         SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
 986         SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
 987 };
 988
 989 static struct sensor_device_attribute sda_in_max[] = {
 990         SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
 991         SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
 992         SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
 993         SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
 994         SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
 995         SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
 996         SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
 997         SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
 998         SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
 999         SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
1000 };
1001
1002 static ssize_t
1003 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1004 {
1005         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1006         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1007         int nr = sensor_attr->index;
1008         return sprintf(buf, "%d\n", data->rpm[nr]);
1009 }
1010
1011 static ssize_t
1012 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1013 {
1014         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1015         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1016         int nr = sensor_attr->index;
1017         return sprintf(buf, "%d\n",
1018                        data->fan_from_reg_min(data->fan_min[nr],
1019                                               data->fan_div[nr]));
1020 }
1021
1022 static ssize_t
1023 show_fan_div(struct device *dev, struct device_attribute *attr,
1024              char *buf)
1025 {
1026         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1027         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1028         int nr = sensor_attr->index;
1029         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1030 }
1031
1032 static ssize_t
1033 store_fan_min(struct device *dev, struct device_attribute *attr,
1034               const char *buf, size_t count)
1035 {
1036         struct w83627ehf_data *data = dev_get_drvdata(dev);
1037         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1038         int nr = sensor_attr->index;
1039         unsigned long val;
1040         int err;
1041         unsigned int reg;
1042         u8 new_div;
1043
1044         err = strict_strtoul(buf, 10, &val);
1045         if (err < 0)
1046                 return err;
1047
1048         mutex_lock(&data->update_lock);
1049         if (!data->has_fan_div) {
1050                 /*
1051                  * Only NCT6776F for now, so we know that this is a 13 bit
1052                  * register
1053                  */
1054                 if (!val) {
1055                         val = 0xff1f;
1056                 } else {
1057                         if (val > 1350000U)
1058                                 val = 135000U;
1059                         val = 1350000U / val;
1060                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1061                 }
1062                 data->fan_min[nr] = val;
1063                 goto done;      /* Leave fan divider alone */
1064         }
1065         if (!val) {
1066                 /* No min limit, alarm disabled */
1067                 data->fan_min[nr] = 255;
1068                 new_div = data->fan_div[nr]; /* No change */
1069                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1070         } else if ((reg = 1350000U / val) >= 128 * 255) {
1071                 /* Speed below this value cannot possibly be represented,
1072                    even with the highest divider (128) */
1073                 data->fan_min[nr] = 254;
1074                 new_div = 7; /* 128 == (1 << 7) */
1075                 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1076                          "minimum\n", nr + 1, val,
1077                          data->fan_from_reg_min(254, 7));
1078         } else if (!reg) {
1079                 /* Speed above this value cannot possibly be represented,
1080                    even with the lowest divider (1) */
1081                 data->fan_min[nr] = 1;
1082                 new_div = 0; /* 1 == (1 << 0) */
1083                 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1084                          "maximum\n", nr + 1, val,
1085                          data->fan_from_reg_min(1, 0));
1086         } else {
1087                 /* Automatically pick the best divider, i.e. the one such
1088                    that the min limit will correspond to a register value
1089                    in the 96..192 range */
1090                 new_div = 0;
1091                 while (reg > 192 && new_div < 7) {
1092                         reg >>= 1;
1093                         new_div++;
1094                 }
1095                 data->fan_min[nr] = reg;
1096         }
1097
1098         /* Write both the fan clock divider (if it changed) and the new
1099            fan min (unconditionally) */
1100         if (new_div != data->fan_div[nr]) {
1101                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1102                         nr + 1, div_from_reg(data->fan_div[nr]),
1103                         div_from_reg(new_div));
1104                 data->fan_div[nr] = new_div;
1105                 w83627ehf_write_fan_div_common(dev, data, nr);
1106                 /* Give the chip time to sample a new speed value */
1107                 data->last_updated = jiffies;
1108         }
1109 done:
1110         w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1111                               data->fan_min[nr]);
1112         mutex_unlock(&data->update_lock);
1113
1114         return count;
1115 }
1116
1117 static struct sensor_device_attribute sda_fan_input[] = {
1118         SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1119         SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1120         SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1121         SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1122         SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1123 };
1124
1125 static struct sensor_device_attribute sda_fan_alarm[] = {
1126         SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1127         SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1128         SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1129         SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1130         SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1131 };
1132
1133 static struct sensor_device_attribute sda_fan_min[] = {
1134         SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1135                     store_fan_min, 0),
1136         SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1137                     store_fan_min, 1),
1138         SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1139                     store_fan_min, 2),
1140         SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1141                     store_fan_min, 3),
1142         SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1143                     store_fan_min, 4),
1144 };
1145
1146 static struct sensor_device_attribute sda_fan_div[] = {
1147         SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1148         SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1149         SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1150         SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1151         SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1152 };
1153
1154 static ssize_t
1155 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1156 {
1157         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1158         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1159         int nr = sensor_attr->index;
1160         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1161 }
1162
1163 #define show_temp_reg(addr, reg) \
1164 static ssize_t \
1165 show_##reg(struct device *dev, struct device_attribute *attr, \
1166            char *buf) \
1167 { \
1168         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1169         struct sensor_device_attribute *sensor_attr = \
1170                 to_sensor_dev_attr(attr); \
1171         int nr = sensor_attr->index; \
1172         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->reg[nr])); \
1173 }
1174 show_temp_reg(reg_temp, temp);
1175 show_temp_reg(reg_temp_over, temp_max);
1176 show_temp_reg(reg_temp_hyst, temp_max_hyst);
1177
1178 #define store_temp_reg(addr, reg) \
1179 static ssize_t \
1180 store_##reg(struct device *dev, struct device_attribute *attr, \
1181             const char *buf, size_t count) \
1182 { \
1183         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1184         struct sensor_device_attribute *sensor_attr = \
1185                 to_sensor_dev_attr(attr); \
1186         int nr = sensor_attr->index; \
1187         int err; \
1188         long val; \
1189         err = strict_strtol(buf, 10, &val); \
1190         if (err < 0) \
1191                 return err; \
1192         mutex_lock(&data->update_lock); \
1193         data->reg[nr] = LM75_TEMP_TO_REG(val); \
1194         w83627ehf_write_temp(data, data->addr[nr], data->reg[nr]); \
1195         mutex_unlock(&data->update_lock); \
1196         return count; \
1197 }
1198 store_temp_reg(reg_temp_over, temp_max);
1199 store_temp_reg(reg_temp_hyst, temp_max_hyst);
1200
1201 static ssize_t
1202 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1203 {
1204         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1205         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1206         int nr = sensor_attr->index;
1207         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1208 }
1209
1210 static struct sensor_device_attribute sda_temp_input[] = {
1211         SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1212         SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1213         SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1214         SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1215         SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1216         SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1217         SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1218         SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1219         SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1220 };
1221
1222 static struct sensor_device_attribute sda_temp_label[] = {
1223         SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1224         SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1225         SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1226         SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1227         SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1228         SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1229         SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1230         SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1231         SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1232 };
1233
1234 static struct sensor_device_attribute sda_temp_max[] = {
1235         SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1236                     store_temp_max, 0),
1237         SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1238                     store_temp_max, 1),
1239         SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1240                     store_temp_max, 2),
1241         SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1242                     store_temp_max, 3),
1243         SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1244                     store_temp_max, 4),
1245         SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1246                     store_temp_max, 5),
1247         SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1248                     store_temp_max, 6),
1249         SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1250                     store_temp_max, 7),
1251         SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1252                     store_temp_max, 8),
1253 };
1254
1255 static struct sensor_device_attribute sda_temp_max_hyst[] = {
1256         SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1257                     store_temp_max_hyst, 0),
1258         SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1259                     store_temp_max_hyst, 1),
1260         SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1261                     store_temp_max_hyst, 2),
1262         SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1263                     store_temp_max_hyst, 3),
1264         SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1265                     store_temp_max_hyst, 4),
1266         SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1267                     store_temp_max_hyst, 5),
1268         SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1269                     store_temp_max_hyst, 6),
1270         SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1271                     store_temp_max_hyst, 7),
1272         SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1273                     store_temp_max_hyst, 8),
1274 };
1275
1276 static struct sensor_device_attribute sda_temp_alarm[] = {
1277         SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1278         SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1279         SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1280 };
1281
1282 static struct sensor_device_attribute sda_temp_type[] = {
1283         SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1284         SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1285         SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1286 };
1287
1288 #define show_pwm_reg(reg) \
1289 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1290                           char *buf) \
1291 { \
1292         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1293         struct sensor_device_attribute *sensor_attr = \
1294                 to_sensor_dev_attr(attr); \
1295         int nr = sensor_attr->index; \
1296         return sprintf(buf, "%d\n", data->reg[nr]); \
1297 }
1298
1299 show_pwm_reg(pwm_mode)
1300 show_pwm_reg(pwm_enable)
1301 show_pwm_reg(pwm)
1302
1303 static ssize_t
1304 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1305                         const char *buf, size_t count)
1306 {
1307         struct w83627ehf_data *data = dev_get_drvdata(dev);
1308         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1309         int nr = sensor_attr->index;
1310         unsigned long val;
1311         int err;
1312         u16 reg;
1313
1314         err = strict_strtoul(buf, 10, &val);
1315         if (err < 0)
1316                 return err;
1317
1318         if (val > 1)
1319                 return -EINVAL;
1320         mutex_lock(&data->update_lock);
1321         reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1322         data->pwm_mode[nr] = val;
1323         reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1324         if (!val)
1325                 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1326         w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1327         mutex_unlock(&data->update_lock);
1328         return count;
1329 }
1330
1331 static ssize_t
1332 store_pwm(struct device *dev, struct device_attribute *attr,
1333                         const char *buf, size_t count)
1334 {
1335         struct w83627ehf_data *data = dev_get_drvdata(dev);
1336         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1337         int nr = sensor_attr->index;
1338         unsigned long val;
1339         int err;
1340
1341         err = strict_strtoul(buf, 10, &val);
1342         if (err < 0)
1343                 return err;
1344
1345         val = SENSORS_LIMIT(val, 0, 255);
1346
1347         mutex_lock(&data->update_lock);
1348         data->pwm[nr] = val;
1349         w83627ehf_write_value(data, data->REG_PWM[nr], val);
1350         mutex_unlock(&data->update_lock);
1351         return count;
1352 }
1353
1354 static ssize_t
1355 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1356                         const char *buf, size_t count)
1357 {
1358         struct w83627ehf_data *data = dev_get_drvdata(dev);
1359         struct w83627ehf_sio_data *sio_data = dev->platform_data;
1360         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1361         int nr = sensor_attr->index;
1362         unsigned long val;
1363         int err;
1364         u16 reg;
1365
1366         err = strict_strtoul(buf, 10, &val);
1367         if (err < 0)
1368                 return err;
1369
1370         if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1371                 return -EINVAL;
1372         /* SmartFan III mode is not supported on NCT6776F */
1373         if (sio_data->kind == nct6776 && val == 4)
1374                 return -EINVAL;
1375
1376         mutex_lock(&data->update_lock);
1377         data->pwm_enable[nr] = val;
1378         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1379                 reg = w83627ehf_read_value(data,
1380                                            NCT6775_REG_FAN_MODE[nr]);
1381                 reg &= 0x0f;
1382                 reg |= (val - 1) << 4;
1383                 w83627ehf_write_value(data,
1384                                       NCT6775_REG_FAN_MODE[nr], reg);
1385         } else {
1386                 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1387                 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1388                 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1389                 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1390         }
1391         mutex_unlock(&data->update_lock);
1392         return count;
1393 }
1394
1395
1396 #define show_tol_temp(reg) \
1397 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1398                                 char *buf) \
1399 { \
1400         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1401         struct sensor_device_attribute *sensor_attr = \
1402                 to_sensor_dev_attr(attr); \
1403         int nr = sensor_attr->index; \
1404         return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1405 }
1406
1407 show_tol_temp(tolerance)
1408 show_tol_temp(target_temp)
1409
1410 static ssize_t
1411 store_target_temp(struct device *dev, struct device_attribute *attr,
1412                         const char *buf, size_t count)
1413 {
1414         struct w83627ehf_data *data = dev_get_drvdata(dev);
1415         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1416         int nr = sensor_attr->index;
1417         long val;
1418         int err;
1419
1420         err = strict_strtol(buf, 10, &val);
1421         if (err < 0)
1422                 return err;
1423
1424         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1425
1426         mutex_lock(&data->update_lock);
1427         data->target_temp[nr] = val;
1428         w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1429         mutex_unlock(&data->update_lock);
1430         return count;
1431 }
1432
1433 static ssize_t
1434 store_tolerance(struct device *dev, struct device_attribute *attr,
1435                         const char *buf, size_t count)
1436 {
1437         struct w83627ehf_data *data = dev_get_drvdata(dev);
1438         struct w83627ehf_sio_data *sio_data = dev->platform_data;
1439         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1440         int nr = sensor_attr->index;
1441         u16 reg;
1442         long val;
1443         int err;
1444
1445         err = strict_strtol(buf, 10, &val);
1446         if (err < 0)
1447                 return err;
1448
1449         /* Limit the temp to 0C - 15C */
1450         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1451
1452         mutex_lock(&data->update_lock);
1453         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1454                 /* Limit tolerance further for NCT6776F */
1455                 if (sio_data->kind == nct6776 && val > 7)
1456                         val = 7;
1457                 reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1458                 reg = (reg & 0xf0) | val;
1459                 w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1460         } else {
1461                 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1462                 if (nr == 1)
1463                         reg = (reg & 0x0f) | (val << 4);
1464                 else
1465                         reg = (reg & 0xf0) | val;
1466                 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1467         }
1468         data->tolerance[nr] = val;
1469         mutex_unlock(&data->update_lock);
1470         return count;
1471 }
1472
1473 static struct sensor_device_attribute sda_pwm[] = {
1474         SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1475         SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1476         SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1477         SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1478 };
1479
1480 static struct sensor_device_attribute sda_pwm_mode[] = {
1481         SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1482                     store_pwm_mode, 0),
1483         SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1484                     store_pwm_mode, 1),
1485         SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1486                     store_pwm_mode, 2),
1487         SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1488                     store_pwm_mode, 3),
1489 };
1490
1491 static struct sensor_device_attribute sda_pwm_enable[] = {
1492         SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1493                     store_pwm_enable, 0),
1494         SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1495                     store_pwm_enable, 1),
1496         SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1497                     store_pwm_enable, 2),
1498         SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1499                     store_pwm_enable, 3),
1500 };
1501
1502 static struct sensor_device_attribute sda_target_temp[] = {
1503         SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1504                     store_target_temp, 0),
1505         SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1506                     store_target_temp, 1),
1507         SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1508                     store_target_temp, 2),
1509         SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1510                     store_target_temp, 3),
1511 };
1512
1513 static struct sensor_device_attribute sda_tolerance[] = {
1514         SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1515                     store_tolerance, 0),
1516         SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1517                     store_tolerance, 1),
1518         SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1519                     store_tolerance, 2),
1520         SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1521                     store_tolerance, 3),
1522 };
1523
1524 /* Smart Fan registers */
1525
1526 #define fan_functions(reg, REG) \
1527 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1528                        char *buf) \
1529 { \
1530         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1531         struct sensor_device_attribute *sensor_attr = \
1532                 to_sensor_dev_attr(attr); \
1533         int nr = sensor_attr->index; \
1534         return sprintf(buf, "%d\n", data->reg[nr]); \
1535 } \
1536 static ssize_t \
1537 store_##reg(struct device *dev, struct device_attribute *attr, \
1538                             const char *buf, size_t count) \
1539 { \
1540         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1541         struct sensor_device_attribute *sensor_attr = \
1542                 to_sensor_dev_attr(attr); \
1543         int nr = sensor_attr->index; \
1544         unsigned long val; \
1545         int err; \
1546         err = strict_strtoul(buf, 10, &val); \
1547         if (err < 0) \
1548                 return err; \
1549         val = SENSORS_LIMIT(val, 1, 255); \
1550         mutex_lock(&data->update_lock); \
1551         data->reg[nr] = val; \
1552         w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1553         mutex_unlock(&data->update_lock); \
1554         return count; \
1555 }
1556
1557 fan_functions(fan_start_output, FAN_START_OUTPUT)
1558 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1559 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1560 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1561
1562 #define fan_time_functions(reg, REG) \
1563 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1564                                 char *buf) \
1565 { \
1566         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1567         struct sensor_device_attribute *sensor_attr = \
1568                 to_sensor_dev_attr(attr); \
1569         int nr = sensor_attr->index; \
1570         return sprintf(buf, "%d\n", \
1571                         step_time_from_reg(data->reg[nr], \
1572                                            data->pwm_mode[nr])); \
1573 } \
1574 \
1575 static ssize_t \
1576 store_##reg(struct device *dev, struct device_attribute *attr, \
1577                         const char *buf, size_t count) \
1578 { \
1579         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1580         struct sensor_device_attribute *sensor_attr = \
1581                 to_sensor_dev_attr(attr); \
1582         int nr = sensor_attr->index; \
1583         unsigned long val; \
1584         int err; \
1585         err = strict_strtoul(buf, 10, &val); \
1586         if (err < 0) \
1587                 return err; \
1588         val = step_time_to_reg(val, data->pwm_mode[nr]); \
1589         mutex_lock(&data->update_lock); \
1590         data->reg[nr] = val; \
1591         w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1592         mutex_unlock(&data->update_lock); \
1593         return count; \
1594 } \
1595
1596 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1597
1598 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1599                          char *buf)
1600 {
1601         struct w83627ehf_data *data = dev_get_drvdata(dev);
1602
1603         return sprintf(buf, "%s\n", data->name);
1604 }
1605 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1606
1607 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1608         SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1609                     store_fan_stop_time, 3),
1610         SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1611                     store_fan_start_output, 3),
1612         SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1613                     store_fan_stop_output, 3),
1614         SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1615                     store_fan_max_output, 3),
1616         SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1617                     store_fan_step_output, 3),
1618 };
1619
1620 static struct sensor_device_attribute sda_sf3_arrays[] = {
1621         SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1622                     store_fan_stop_time, 0),
1623         SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1624                     store_fan_stop_time, 1),
1625         SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1626                     store_fan_stop_time, 2),
1627         SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1628                     store_fan_start_output, 0),
1629         SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1630                     store_fan_start_output, 1),
1631         SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1632                     store_fan_start_output, 2),
1633         SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1634                     store_fan_stop_output, 0),
1635         SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1636                     store_fan_stop_output, 1),
1637         SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1638                     store_fan_stop_output, 2),
1639 };
1640
1641
1642 /*
1643  * pwm1 and pwm3 don't support max and step settings on all chips.
1644  * Need to check support while generating/removing attribute files.
1645  */
1646 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1647         SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1648                     store_fan_max_output, 0),
1649         SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1650                     store_fan_step_output, 0),
1651         SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1652                     store_fan_max_output, 1),
1653         SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1654                     store_fan_step_output, 1),
1655         SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1656                     store_fan_max_output, 2),
1657         SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1658                     store_fan_step_output, 2),
1659 };
1660
1661 static ssize_t
1662 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1663 {
1664         struct w83627ehf_data *data = dev_get_drvdata(dev);
1665         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1666 }
1667 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1668
1669
1670 /* Case open detection */
1671
1672 static ssize_t
1673 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
1674 {
1675         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1676
1677         return sprintf(buf, "%d\n",
1678                 !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
1679 }
1680
1681 static ssize_t
1682 clear_caseopen(struct device *dev, struct device_attribute *attr,
1683                         const char *buf, size_t count)
1684 {
1685         struct w83627ehf_data *data = dev_get_drvdata(dev);
1686         unsigned long val;
1687         u16 reg, mask;
1688
1689         if (strict_strtoul(buf, 10, &val) || val != 0)
1690                 return -EINVAL;
1691
1692         mask = to_sensor_dev_attr_2(attr)->nr;
1693
1694         mutex_lock(&data->update_lock);
1695         reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1696         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1697         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1698         data->valid = 0;        /* Force cache refresh */
1699         mutex_unlock(&data->update_lock);
1700
1701         return count;
1702 }
1703
1704 static struct sensor_device_attribute_2 sda_caseopen[] = {
1705         SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1706                         clear_caseopen, 0x80, 0x10),
1707         SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1708                         clear_caseopen, 0x40, 0x40),
1709 };
1710
1711 /*
1712  * Driver and device management
1713  */
1714
1715 static void w83627ehf_device_remove_files(struct device *dev)
1716 {
1717         /* some entries in the following arrays may not have been used in
1718          * device_create_file(), but device_remove_file() will ignore them */
1719         int i;
1720         struct w83627ehf_data *data = dev_get_drvdata(dev);
1721
1722         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1723                 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1724         for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1725                 struct sensor_device_attribute *attr =
1726                   &sda_sf3_max_step_arrays[i];
1727                 if (data->REG_FAN_STEP_OUTPUT &&
1728                     data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1729                         device_remove_file(dev, &attr->dev_attr);
1730         }
1731         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1732                 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1733         for (i = 0; i < data->in_num; i++) {
1734                 if ((i == 6) && data->in6_skip)
1735                         continue;
1736                 device_remove_file(dev, &sda_in_input[i].dev_attr);
1737                 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1738                 device_remove_file(dev, &sda_in_min[i].dev_attr);
1739                 device_remove_file(dev, &sda_in_max[i].dev_attr);
1740         }
1741         for (i = 0; i < 5; i++) {
1742                 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1743                 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1744                 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1745                 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1746         }
1747         for (i = 0; i < data->pwm_num; i++) {
1748                 device_remove_file(dev, &sda_pwm[i].dev_attr);
1749                 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1750                 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1751                 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1752                 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1753         }
1754         for (i = 0; i < NUM_REG_TEMP; i++) {
1755                 if (!(data->have_temp & (1 << i)))
1756                         continue;
1757                 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1758                 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1759                 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1760                 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1761                 if (i > 2)
1762                         continue;
1763                 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1764                 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1765         }
1766
1767         device_remove_file(dev, &sda_caseopen[0].dev_attr);
1768         device_remove_file(dev, &sda_caseopen[1].dev_attr);
1769
1770         device_remove_file(dev, &dev_attr_name);
1771         device_remove_file(dev, &dev_attr_cpu0_vid);
1772 }
1773
1774 /* Get the monitoring functions started */
1775 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data,
1776                                                    enum kinds kind)
1777 {
1778         int i;
1779         u8 tmp, diode;
1780
1781         /* Start monitoring is needed */
1782         tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1783         if (!(tmp & 0x01))
1784                 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1785                                       tmp | 0x01);
1786
1787         /* Enable temperature sensors if needed */
1788         for (i = 0; i < NUM_REG_TEMP; i++) {
1789                 if (!(data->have_temp & (1 << i)))
1790                         continue;
1791                 if (!data->reg_temp_config[i])
1792                         continue;
1793                 tmp = w83627ehf_read_value(data,
1794                                            data->reg_temp_config[i]);
1795                 if (tmp & 0x01)
1796                         w83627ehf_write_value(data,
1797                                               data->reg_temp_config[i],
1798                                               tmp & 0xfe);
1799         }
1800
1801         /* Enable VBAT monitoring if needed */
1802         tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1803         if (!(tmp & 0x01))
1804                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1805
1806         /* Get thermal sensor types */
1807         switch (kind) {
1808         case w83627ehf:
1809                 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1810                 break;
1811         default:
1812                 diode = 0x70;
1813         }
1814         for (i = 0; i < 3; i++) {
1815                 const char *label = data->temp_label[data->temp_src[i]];
1816
1817                 /* Digital source overrides analog type */
1818                 if (strncmp(label, "PECI", 4) == 0)
1819                         data->temp_type[i] = 6;
1820                 else if (strncmp(label, "AMD", 3) == 0)
1821                         data->temp_type[i] = 5;
1822                 else if ((tmp & (0x02 << i)))
1823                         data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1824                 else
1825                         data->temp_type[i] = 4; /* thermistor */
1826         }
1827 }
1828
1829 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1830                                    int r1, int r2)
1831 {
1832         u16 tmp;
1833
1834         tmp = data->temp_src[r1];
1835         data->temp_src[r1] = data->temp_src[r2];
1836         data->temp_src[r2] = tmp;
1837
1838         tmp = data->reg_temp[r1];
1839         data->reg_temp[r1] = data->reg_temp[r2];
1840         data->reg_temp[r2] = tmp;
1841
1842         tmp = data->reg_temp_over[r1];
1843         data->reg_temp_over[r1] = data->reg_temp_over[r2];
1844         data->reg_temp_over[r2] = tmp;
1845
1846         tmp = data->reg_temp_hyst[r1];
1847         data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];
1848         data->reg_temp_hyst[r2] = tmp;
1849
1850         tmp = data->reg_temp_config[r1];
1851         data->reg_temp_config[r1] = data->reg_temp_config[r2];
1852         data->reg_temp_config[r2] = tmp;
1853 }
1854
1855 static void __devinit
1856 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
1857 {
1858         int i;
1859
1860         for (i = 0; i < n_temp; i++) {
1861                 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1862                 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1863                 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1864                 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1865         }
1866 }
1867
1868 static void __devinit
1869 w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
1870                            struct w83627ehf_data *data)
1871 {
1872         int fan3pin, fan4pin, fan4min, fan5pin, regval;
1873
1874         superio_enter(sio_data->sioreg);
1875
1876         /* fan4 and fan5 share some pins with the GPIO and serial flash */
1877         if (sio_data->kind == nct6775) {
1878                 /* On NCT6775, fan4 shares pins with the fdc interface */
1879                 fan3pin = 1;
1880                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1881                 fan4min = 0;
1882                 fan5pin = 0;
1883         } else if (sio_data->kind == nct6776) {
1884                 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
1885                 fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
1886                 fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
1887                 fan4min = fan4pin;
1888         } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1889                 fan3pin = 1;
1890                 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
1891                 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
1892                 fan4min = fan4pin;
1893         } else {
1894                 fan3pin = 1;
1895                 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
1896                 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
1897                 fan4min = fan4pin;
1898         }
1899
1900         superio_exit(sio_data->sioreg);
1901
1902         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
1903         data->has_fan |= (fan3pin << 2);
1904         data->has_fan_min |= (fan3pin << 2);
1905
1906         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1907                 /*
1908                  * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1
1909                  * register
1910                  */
1911                 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
1912                 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
1913         } else {
1914                 /*
1915                  * It looks like fan4 and fan5 pins can be alternatively used
1916                  * as fan on/off switches, but fan5 control is write only :/
1917                  * We assume that if the serial interface is disabled, designers
1918                  * connected fan5 as input unless they are emitting log 1, which
1919                  * is not the default.
1920                  */
1921                 regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1922                 if ((regval & (1 << 2)) && fan4pin) {
1923                         data->has_fan |= (1 << 3);
1924                         data->has_fan_min |= (1 << 3);
1925                 }
1926                 if (!(regval & (1 << 1)) && fan5pin) {
1927                         data->has_fan |= (1 << 4);
1928                         data->has_fan_min |= (1 << 4);
1929                 }
1930         }
1931 }
1932
1933 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1934 {
1935         struct device *dev = &pdev->dev;
1936         struct w83627ehf_sio_data *sio_data = dev->platform_data;
1937         struct w83627ehf_data *data;
1938         struct resource *res;
1939         u8 en_vrm10;
1940         int i, err = 0;
1941
1942         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1943         if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1944                 err = -EBUSY;
1945                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1946                         (unsigned long)res->start,
1947                         (unsigned long)res->start + IOREGION_LENGTH - 1);
1948                 goto exit;
1949         }
1950
1951         data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL);
1952         if (!data) {
1953                 err = -ENOMEM;
1954                 goto exit_release;
1955         }
1956
1957         data->addr = res->start;
1958         mutex_init(&data->lock);
1959         mutex_init(&data->update_lock);
1960         data->name = w83627ehf_device_names[sio_data->kind];
1961         platform_set_drvdata(pdev, data);
1962
1963         /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1964         data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1965         /* 667HG, NCT6775F, and NCT6776F have 3 pwms */
1966         data->pwm_num = (sio_data->kind == w83667hg
1967                          || sio_data->kind == w83667hg_b
1968                          || sio_data->kind == nct6775
1969                          || sio_data->kind == nct6776) ? 3 : 4;
1970
1971         /* Default to 3 temperature inputs, code below will adjust as needed */
1972         data->have_temp = 0x07;
1973
1974         /* Deal with temperature register setup first. */
1975         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1976                 int mask = 0;
1977
1978                 /*
1979                  * Display temperature sensor output only if it monitors
1980                  * a source other than one already reported. Always display
1981                  * first three temperature registers, though.
1982                  */
1983                 for (i = 0; i < NUM_REG_TEMP; i++) {
1984                         u8 src;
1985
1986                         data->reg_temp[i] = NCT6775_REG_TEMP[i];
1987                         data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
1988                         data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
1989                         data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
1990
1991                         src = w83627ehf_read_value(data,
1992                                                    NCT6775_REG_TEMP_SOURCE[i]);
1993                         src &= 0x1f;
1994                         if (src && !(mask & (1 << src))) {
1995                                 data->have_temp |= 1 << i;
1996                                 mask |= 1 << src;
1997                         }
1998
1999                         data->temp_src[i] = src;
2000
2001                         /*
2002                          * Now do some register swapping if index 0..2 don't
2003                          * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
2004                          * Idea is to have the first three attributes
2005                          * report SYSTIN, CPUIN, and AUXIN if possible
2006                          * without overriding the basic system configuration.
2007                          */
2008                         if (i > 0 && data->temp_src[0] != 1
2009                             && data->temp_src[i] == 1)
2010                                 w82627ehf_swap_tempreg(data, 0, i);
2011                         if (i > 1 && data->temp_src[1] != 2
2012                             && data->temp_src[i] == 2)
2013                                 w82627ehf_swap_tempreg(data, 1, i);
2014                         if (i > 2 && data->temp_src[2] != 3
2015                             && data->temp_src[i] == 3)
2016                                 w82627ehf_swap_tempreg(data, 2, i);
2017                 }
2018                 if (sio_data->kind == nct6776) {
2019                         /*
2020                          * On NCT6776, AUXTIN and VIN3 pins are shared.
2021                          * Only way to detect it is to check if AUXTIN is used
2022                          * as a temperature source, and if that source is
2023                          * enabled.
2024                          *
2025                          * If that is the case, disable in6, which reports VIN3.
2026                          * Otherwise disable temp3.
2027                          */
2028                         if (data->temp_src[2] == 3) {
2029                                 u8 reg;
2030
2031                                 if (data->reg_temp_config[2])
2032                                         reg = w83627ehf_read_value(data,
2033                                                 data->reg_temp_config[2]);
2034                                 else
2035                                         reg = 0; /* Assume AUXTIN is used */
2036
2037                                 if (reg & 0x01)
2038                                         data->have_temp &= ~(1 << 2);
2039                                 else
2040                                         data->in6_skip = 1;
2041                         }
2042                         data->temp_label = nct6776_temp_label;
2043                 } else {
2044                         data->temp_label = nct6775_temp_label;
2045                 }
2046         } else if (sio_data->kind == w83667hg_b) {
2047                 u8 reg;
2048
2049                 w83627ehf_set_temp_reg_ehf(data, 4);
2050
2051                 /*
2052                  * Temperature sources are selected with bank 0, registers 0x49
2053                  * and 0x4a.
2054                  */
2055                 reg = w83627ehf_read_value(data, 0x4a);
2056                 data->temp_src[0] = reg >> 5;
2057                 reg = w83627ehf_read_value(data, 0x49);
2058                 data->temp_src[1] = reg & 0x07;
2059                 data->temp_src[2] = (reg >> 4) & 0x07;
2060
2061                 /*
2062                  * W83667HG-B has another temperature register at 0x7e.
2063                  * The temperature source is selected with register 0x7d.
2064                  * Support it if the source differs from already reported
2065                  * sources.
2066                  */
2067                 reg = w83627ehf_read_value(data, 0x7d);
2068                 reg &= 0x07;
2069                 if (reg != data->temp_src[0] && reg != data->temp_src[1]
2070                     && reg != data->temp_src[2]) {
2071                         data->temp_src[3] = reg;
2072                         data->have_temp |= 1 << 3;
2073                 }
2074
2075                 /*
2076                  * Chip supports either AUXTIN or VIN3. Try to find out which
2077                  * one.
2078                  */
2079                 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
2080                 if (data->temp_src[2] == 2 && (reg & 0x01))
2081                         data->have_temp &= ~(1 << 2);
2082
2083                 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
2084                     || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
2085                         data->in6_skip = 1;
2086
2087                 data->temp_label = w83667hg_b_temp_label;
2088         } else {
2089                 w83627ehf_set_temp_reg_ehf(data, 3);
2090
2091                 /* Temperature sources are fixed */
2092
2093                 if (sio_data->kind == w83667hg) {
2094                         u8 reg;
2095
2096                         /*
2097                          * Chip supports either AUXTIN or VIN3. Try to find
2098                          * out which one.
2099                          */
2100                         reg = w83627ehf_read_value(data,
2101                                                 W83627EHF_REG_TEMP_CONFIG[2]);
2102                         if (reg & 0x01)
2103                                 data->have_temp &= ~(1 << 2);
2104                         else
2105                                 data->in6_skip = 1;
2106                 }
2107         }
2108
2109         if (sio_data->kind == nct6775) {
2110                 data->has_fan_div = true;
2111                 data->fan_from_reg = fan_from_reg16;
2112                 data->fan_from_reg_min = fan_from_reg8;
2113                 data->REG_PWM = NCT6775_REG_PWM;
2114                 data->REG_TARGET = NCT6775_REG_TARGET;
2115                 data->REG_FAN = NCT6775_REG_FAN;
2116                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2117                 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2118                 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2119                 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2120                 data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
2121                 data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
2122         } else if (sio_data->kind == nct6776) {
2123                 data->has_fan_div = false;
2124                 data->fan_from_reg = fan_from_reg13;
2125                 data->fan_from_reg_min = fan_from_reg13;
2126                 data->REG_PWM = NCT6775_REG_PWM;
2127                 data->REG_TARGET = NCT6775_REG_TARGET;
2128                 data->REG_FAN = NCT6775_REG_FAN;
2129                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2130                 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2131                 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2132                 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2133         } else if (sio_data->kind == w83667hg_b) {
2134                 data->has_fan_div = true;
2135                 data->fan_from_reg = fan_from_reg8;
2136                 data->fan_from_reg_min = fan_from_reg8;
2137                 data->REG_PWM = W83627EHF_REG_PWM;
2138                 data->REG_TARGET = W83627EHF_REG_TARGET;
2139                 data->REG_FAN = W83627EHF_REG_FAN;
2140                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2141                 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2142                 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2143                 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2144                 data->REG_FAN_MAX_OUTPUT =
2145                   W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
2146                 data->REG_FAN_STEP_OUTPUT =
2147                   W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2148         } else {
2149                 data->has_fan_div = true;
2150                 data->fan_from_reg = fan_from_reg8;
2151                 data->fan_from_reg_min = fan_from_reg8;
2152                 data->REG_PWM = W83627EHF_REG_PWM;
2153                 data->REG_TARGET = W83627EHF_REG_TARGET;
2154                 data->REG_FAN = W83627EHF_REG_FAN;
2155                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2156                 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2157                 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2158                 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2159                 data->REG_FAN_MAX_OUTPUT =
2160                   W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2161                 data->REG_FAN_STEP_OUTPUT =
2162                   W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2163         }
2164
2165         /* Initialize the chip */
2166         w83627ehf_init_device(data, sio_data->kind);
2167
2168         data->vrm = vid_which_vrm();
2169         superio_enter(sio_data->sioreg);
2170         /* Read VID value */
2171         if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2172             sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2173                 /* W83667HG has different pins for VID input and output, so
2174                 we can get the VID input values directly at logical device D
2175                 0xe3. */
2176                 superio_select(sio_data->sioreg, W83667HG_LD_VID);
2177                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2178                 err = device_create_file(dev, &dev_attr_cpu0_vid);
2179                 if (err)
2180                         goto exit_release;
2181         } else {
2182                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2183                 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2184                         /* Set VID input sensibility if needed. In theory the
2185                            BIOS should have set it, but in practice it's not
2186                            always the case. We only do it for the W83627EHF/EHG
2187                            because the W83627DHG is more complex in this
2188                            respect. */
2189                         if (sio_data->kind == w83627ehf) {
2190                                 en_vrm10 = superio_inb(sio_data->sioreg,
2191                                                        SIO_REG_EN_VRM10);
2192                                 if ((en_vrm10 & 0x08) && data->vrm == 90) {
2193                                         dev_warn(dev, "Setting VID input "
2194                                                  "voltage to TTL\n");
2195                                         superio_outb(sio_data->sioreg,
2196                                                      SIO_REG_EN_VRM10,
2197                                                      en_vrm10 & ~0x08);
2198                                 } else if (!(en_vrm10 & 0x08)
2199                                            && data->vrm == 100) {
2200                                         dev_warn(dev, "Setting VID input "
2201                                                  "voltage to VRM10\n");
2202                                         superio_outb(sio_data->sioreg,
2203                                                      SIO_REG_EN_VRM10,
2204                                                      en_vrm10 | 0x08);
2205                                 }
2206                         }
2207
2208                         data->vid = superio_inb(sio_data->sioreg,
2209                                                 SIO_REG_VID_DATA);
2210                         if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2211                                 data->vid &= 0x3f;
2212
2213                         err = device_create_file(dev, &dev_attr_cpu0_vid);
2214                         if (err)
2215                                 goto exit_release;
2216                 } else {
2217                         dev_info(dev, "VID pins in output mode, CPU VID not "
2218                                  "available\n");
2219                 }
2220         }
2221
2222         if (fan_debounce &&
2223             (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2224                 u8 tmp;
2225
2226                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2227                 tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2228                 if (sio_data->kind == nct6776)
2229                         superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2230                                      0x3e | tmp);
2231                 else
2232                         superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2233                                      0x1e | tmp);
2234                 pr_info("Enabled fan debounce for chip %s\n", data->name);
2235         }
2236
2237         superio_exit(sio_data->sioreg);
2238
2239         w83627ehf_check_fan_inputs(sio_data, data);
2240
2241         /* Read fan clock dividers immediately */
2242         w83627ehf_update_fan_div_common(dev, data);
2243
2244         /* Read pwm data to save original values */
2245         w83627ehf_update_pwm_common(dev, data);
2246         for (i = 0; i < data->pwm_num; i++)
2247                 data->pwm_enable_orig[i] = data->pwm_enable[i];
2248
2249         /* Read pwm data to save original values */
2250         w83627ehf_update_pwm_common(dev, data);
2251         for (i = 0; i < data->pwm_num; i++)
2252                 data->pwm_enable_orig[i] = data->pwm_enable[i];
2253
2254         /* Register sysfs hooks */
2255         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2256                 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2257                 if (err)
2258                         goto exit_remove;
2259         }
2260
2261         for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2262                 struct sensor_device_attribute *attr =
2263                   &sda_sf3_max_step_arrays[i];
2264                 if (data->REG_FAN_STEP_OUTPUT &&
2265                     data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2266                         err = device_create_file(dev, &attr->dev_attr);
2267                         if (err)
2268                                 goto exit_remove;
2269                 }
2270         }
2271         /* if fan4 is enabled create the sf3 files for it */
2272         if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2273                 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2274                         err = device_create_file(dev,
2275                                         &sda_sf3_arrays_fan4[i].dev_attr);
2276                         if (err)
2277                                 goto exit_remove;
2278                 }
2279
2280         for (i = 0; i < data->in_num; i++) {
2281                 if ((i == 6) && data->in6_skip)
2282                         continue;
2283                 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2284                         || (err = device_create_file(dev,
2285                                 &sda_in_alarm[i].dev_attr))
2286                         || (err = device_create_file(dev,
2287                                 &sda_in_min[i].dev_attr))
2288                         || (err = device_create_file(dev,
2289                                 &sda_in_max[i].dev_attr)))
2290                         goto exit_remove;
2291         }
2292
2293         for (i = 0; i < 5; i++) {
2294                 if (data->has_fan & (1 << i)) {
2295                         if ((err = device_create_file(dev,
2296                                         &sda_fan_input[i].dev_attr))
2297                                 || (err = device_create_file(dev,
2298                                         &sda_fan_alarm[i].dev_attr)))
2299                                 goto exit_remove;
2300                         if (sio_data->kind != nct6776) {
2301                                 err = device_create_file(dev,
2302                                                 &sda_fan_div[i].dev_attr);
2303                                 if (err)
2304                                         goto exit_remove;
2305                         }
2306                         if (data->has_fan_min & (1 << i)) {
2307                                 err = device_create_file(dev,
2308                                                 &sda_fan_min[i].dev_attr);
2309                                 if (err)
2310                                         goto exit_remove;
2311                         }
2312                         if (i < data->pwm_num &&
2313                                 ((err = device_create_file(dev,
2314                                         &sda_pwm[i].dev_attr))
2315                                 || (err = device_create_file(dev,
2316                                         &sda_pwm_mode[i].dev_attr))
2317                                 || (err = device_create_file(dev,
2318                                         &sda_pwm_enable[i].dev_attr))
2319                                 || (err = device_create_file(dev,
2320                                         &sda_target_temp[i].dev_attr))
2321                                 || (err = device_create_file(dev,
2322                                         &sda_tolerance[i].dev_attr))))
2323                                 goto exit_remove;
2324                 }
2325         }
2326
2327         for (i = 0; i < NUM_REG_TEMP; i++) {
2328                 if (!(data->have_temp & (1 << i)))
2329                         continue;
2330                 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2331                 if (err)
2332                         goto exit_remove;
2333                 if (data->temp_label) {
2334                         err = device_create_file(dev,
2335                                                  &sda_temp_label[i].dev_attr);
2336                         if (err)
2337                                 goto exit_remove;
2338                 }
2339                 if (data->reg_temp_over[i]) {
2340                         err = device_create_file(dev,
2341                                 &sda_temp_max[i].dev_attr);
2342                         if (err)
2343                                 goto exit_remove;
2344                 }
2345                 if (data->reg_temp_hyst[i]) {
2346                         err = device_create_file(dev,
2347                                 &sda_temp_max_hyst[i].dev_attr);
2348                         if (err)
2349                                 goto exit_remove;
2350                 }
2351                 if (i > 2)
2352                         continue;
2353                 if ((err = device_create_file(dev,
2354                                 &sda_temp_alarm[i].dev_attr))
2355                         || (err = device_create_file(dev,
2356                                 &sda_temp_type[i].dev_attr)))
2357                         goto exit_remove;
2358         }
2359
2360         err = device_create_file(dev, &sda_caseopen[0].dev_attr);
2361         if (err)
2362                 goto exit_remove;
2363
2364         if (sio_data->kind == nct6776) {
2365                 err = device_create_file(dev, &sda_caseopen[1].dev_attr);
2366                 if (err)
2367                         goto exit_remove;
2368         }
2369
2370         err = device_create_file(dev, &dev_attr_name);
2371         if (err)
2372                 goto exit_remove;
2373
2374         data->hwmon_dev = hwmon_device_register(dev);
2375         if (IS_ERR(data->hwmon_dev)) {
2376                 err = PTR_ERR(data->hwmon_dev);
2377                 goto exit_remove;
2378         }
2379
2380         return 0;
2381
2382 exit_remove:
2383         w83627ehf_device_remove_files(dev);
2384         kfree(data);
2385         platform_set_drvdata(pdev, NULL);
2386 exit_release:
2387         release_region(res->start, IOREGION_LENGTH);
2388 exit:
2389         return err;
2390 }
2391
2392 static int __devexit w83627ehf_remove(struct platform_device *pdev)
2393 {
2394         struct w83627ehf_data *data = platform_get_drvdata(pdev);
2395
2396         hwmon_device_unregister(data->hwmon_dev);
2397         w83627ehf_device_remove_files(&pdev->dev);
2398         release_region(data->addr, IOREGION_LENGTH);
2399         platform_set_drvdata(pdev, NULL);
2400         kfree(data);
2401
2402         return 0;
2403 }
2404
2405 static struct platform_driver w83627ehf_driver = {
2406         .driver = {
2407                 .owner  = THIS_MODULE,
2408                 .name   = DRVNAME,
2409         },
2410         .probe          = w83627ehf_probe,
2411         .remove         = __devexit_p(w83627ehf_remove),
2412 };
2413
2414 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2415 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2416                                  struct w83627ehf_sio_data *sio_data)
2417 {
2418         static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
2419         static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
2420         static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
2421         static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
2422         static const char __initdata sio_name_W83667HG[] = "W83667HG";
2423         static const char __initdata sio_name_W83667HG_B[] = "W83667HG-B";
2424         static const char __initdata sio_name_NCT6775[] = "NCT6775F";
2425         static const char __initdata sio_name_NCT6776[] = "NCT6776F";
2426
2427         u16 val;
2428         const char *sio_name;
2429
2430         superio_enter(sioaddr);
2431
2432         if (force_id)
2433                 val = force_id;
2434         else
2435                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2436                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2437         switch (val & SIO_ID_MASK) {
2438         case SIO_W83627EHF_ID:
2439                 sio_data->kind = w83627ehf;
2440                 sio_name = sio_name_W83627EHF;
2441                 break;
2442         case SIO_W83627EHG_ID:
2443                 sio_data->kind = w83627ehf;
2444                 sio_name = sio_name_W83627EHG;
2445                 break;
2446         case SIO_W83627DHG_ID:
2447                 sio_data->kind = w83627dhg;
2448                 sio_name = sio_name_W83627DHG;
2449                 break;
2450         case SIO_W83627DHG_P_ID:
2451                 sio_data->kind = w83627dhg_p;
2452                 sio_name = sio_name_W83627DHG_P;
2453                 break;
2454         case SIO_W83667HG_ID:
2455                 sio_data->kind = w83667hg;
2456                 sio_name = sio_name_W83667HG;
2457                 break;
2458         case SIO_W83667HG_B_ID:
2459                 sio_data->kind = w83667hg_b;
2460                 sio_name = sio_name_W83667HG_B;
2461                 break;
2462         case SIO_NCT6775_ID:
2463                 sio_data->kind = nct6775;
2464                 sio_name = sio_name_NCT6775;
2465                 break;
2466         case SIO_NCT6776_ID:
2467                 sio_data->kind = nct6776;
2468                 sio_name = sio_name_NCT6776;
2469                 break;
2470         default:
2471                 if (val != 0xffff)
2472                         pr_debug("unsupported chip ID: 0x%04x\n", val);
2473                 superio_exit(sioaddr);
2474                 return -ENODEV;
2475         }
2476
2477         /* We have a known chip, find the HWM I/O address */
2478         superio_select(sioaddr, W83627EHF_LD_HWM);
2479         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2480             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2481         *addr = val & IOREGION_ALIGNMENT;
2482         if (*addr == 0) {
2483                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2484                 superio_exit(sioaddr);
2485                 return -ENODEV;
2486         }
2487
2488         /* Activate logical device if needed */
2489         val = superio_inb(sioaddr, SIO_REG_ENABLE);
2490         if (!(val & 0x01)) {
2491                 pr_warn("Forcibly enabling Super-I/O. "
2492                         "Sensor is probably unusable.\n");
2493                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2494         }
2495
2496         superio_exit(sioaddr);
2497         pr_info("Found %s chip at %#x\n", sio_name, *addr);
2498         sio_data->sioreg = sioaddr;
2499
2500         return 0;
2501 }
2502
2503 /* when Super-I/O functions move to a separate file, the Super-I/O
2504  * bus will manage the lifetime of the device and this module will only keep
2505  * track of the w83627ehf driver. But since we platform_device_alloc(), we
2506  * must keep track of the device */
2507 static struct platform_device *pdev;
2508
2509 static int __init sensors_w83627ehf_init(void)
2510 {
2511         int err;
2512         unsigned short address;
2513         struct resource res;
2514         struct w83627ehf_sio_data sio_data;
2515
2516         /* initialize sio_data->kind and sio_data->sioreg.
2517          *
2518          * when Super-I/O functions move to a separate file, the Super-I/O
2519          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2520          * w83627ehf hardware monitor, and call probe() */
2521         if (w83627ehf_find(0x2e, &address, &sio_data) &&
2522             w83627ehf_find(0x4e, &address, &sio_data))
2523                 return -ENODEV;
2524
2525         err = platform_driver_register(&w83627ehf_driver);
2526         if (err)
2527                 goto exit;
2528
2529         pdev = platform_device_alloc(DRVNAME, address);
2530         if (!pdev) {
2531                 err = -ENOMEM;
2532                 pr_err("Device allocation failed\n");
2533                 goto exit_unregister;
2534         }
2535
2536         err = platform_device_add_data(pdev, &sio_data,
2537                                        sizeof(struct w83627ehf_sio_data));
2538         if (err) {
2539                 pr_err("Platform data allocation failed\n");
2540                 goto exit_device_put;
2541         }
2542
2543         memset(&res, 0, sizeof(res));
2544         res.name = DRVNAME;
2545         res.start = address + IOREGION_OFFSET;
2546         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2547         res.flags = IORESOURCE_IO;
2548
2549         err = acpi_check_resource_conflict(&res);
2550         if (err)
2551                 goto exit_device_put;
2552
2553         err = platform_device_add_resources(pdev, &res, 1);
2554         if (err) {
2555                 pr_err("Device resource addition failed (%d)\n", err);
2556                 goto exit_device_put;
2557         }
2558
2559         /* platform_device_add calls probe() */
2560         err = platform_device_add(pdev);
2561         if (err) {
2562                 pr_err("Device addition failed (%d)\n", err);
2563                 goto exit_device_put;
2564         }
2565
2566         return 0;
2567
2568 exit_device_put:
2569         platform_device_put(pdev);
2570 exit_unregister:
2571         platform_driver_unregister(&w83627ehf_driver);
2572 exit:
2573         return err;
2574 }
2575
2576 static void __exit sensors_w83627ehf_exit(void)
2577 {
2578         platform_device_unregister(pdev);
2579         platform_driver_unregister(&w83627ehf_driver);
2580 }
2581
2582 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
2583 MODULE_DESCRIPTION("W83627EHF driver");
2584 MODULE_LICENSE("GPL");
2585
2586 module_init(sensors_w83627ehf_init);
2587 module_exit(sensors_w83627ehf_exit);