2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
9 Shamelessly ripped from the w83627hf driver
10 Copyright (C) 2003 Mark Studebaker
12 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
13 in testing and debugging this driver.
15 This driver also supports the W83627EHG, which is the lead-free
16 version of the W83627EHF.
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 Supports the following chips:
35 Chip #vin #fan #pwm #temp chip IDs man ID
36 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
38 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
41 #include <linux/module.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/jiffies.h>
45 #include <linux/platform_device.h>
46 #include <linux/hwmon.h>
47 #include <linux/hwmon-sysfs.h>
48 #include <linux/hwmon-vid.h>
49 #include <linux/err.h>
50 #include <linux/mutex.h>
54 enum kinds { w83627ehf, w83627dhg };
56 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
57 static const char * w83627ehf_device_names[] = {
62 #define DRVNAME "w83627ehf"
65 * Super-I/O constants and functions
68 #define W83627EHF_LD_HWM 0x0b
70 #define SIO_REG_LDSEL 0x07 /* Logical device select */
71 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
72 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
73 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
74 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
75 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
76 #define SIO_REG_VID_DATA 0xF1 /* VID data */
78 #define SIO_W83627EHF_ID 0x8850
79 #define SIO_W83627EHG_ID 0x8860
80 #define SIO_W83627DHG_ID 0xa020
81 #define SIO_ID_MASK 0xFFF0
84 superio_outb(int ioreg, int reg, int val)
91 superio_inb(int ioreg, int reg)
94 return inb(ioreg + 1);
98 superio_select(int ioreg, int ld)
100 outb(SIO_REG_LDSEL, ioreg);
105 superio_enter(int ioreg)
112 superio_exit(int ioreg)
115 outb(0x02, ioreg + 1);
122 #define IOREGION_ALIGNMENT ~7
123 #define IOREGION_OFFSET 5
124 #define IOREGION_LENGTH 2
125 #define ADDR_REG_OFFSET 0
126 #define DATA_REG_OFFSET 1
128 #define W83627EHF_REG_BANK 0x4E
129 #define W83627EHF_REG_CONFIG 0x40
131 /* Not currently used:
132 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
133 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
134 * REG_MAN_ID is at port 0x4f
135 * REG_CHIP_ID is at port 0x58 */
137 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
138 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
140 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
141 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
142 (0x554 + (((nr) - 7) * 2)))
143 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
144 (0x555 + (((nr) - 7) * 2)))
145 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
148 #define W83627EHF_REG_TEMP1 0x27
149 #define W83627EHF_REG_TEMP1_HYST 0x3a
150 #define W83627EHF_REG_TEMP1_OVER 0x39
151 static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
152 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
153 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
154 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
156 /* Fan clock dividers are spread over the following five registers */
157 #define W83627EHF_REG_FANDIV1 0x47
158 #define W83627EHF_REG_FANDIV2 0x4B
159 #define W83627EHF_REG_VBAT 0x5D
160 #define W83627EHF_REG_DIODE 0x59
161 #define W83627EHF_REG_SMI_OVT 0x4C
163 #define W83627EHF_REG_ALARM1 0x459
164 #define W83627EHF_REG_ALARM2 0x45A
165 #define W83627EHF_REG_ALARM3 0x45B
167 /* SmartFan registers */
168 /* DC or PWM output fan configuration */
169 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
170 0x04, /* SYS FAN0 output mode and PWM mode */
171 0x04, /* CPU FAN0 output mode and PWM mode */
172 0x12, /* AUX FAN mode */
173 0x62, /* CPU fan1 mode */
176 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
177 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
179 /* FAN Duty Cycle, be used to control */
180 static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
181 static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
182 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
185 /* Advanced Fan control, some values are common for all fans */
186 static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
187 static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 };
193 /* 1 is PWM mode, output in ms */
194 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
196 return mode ? 100 * reg : 400 * reg;
199 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
201 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
202 (msec + 200) / 400), 1, 255);
205 static inline unsigned int
206 fan_from_reg(u8 reg, unsigned int div)
208 if (reg == 0 || reg == 255)
210 return 1350000U / (reg * div);
213 static inline unsigned int
220 temp1_from_reg(s8 reg)
226 temp1_to_reg(int temp, int min, int max)
233 return (temp - 500) / 1000;
234 return (temp + 500) / 1000;
237 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
239 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
241 static inline long in_from_reg(u8 reg, u8 nr)
243 return reg * scale_in[nr];
246 static inline u8 in_to_reg(u32 val, u8 nr)
248 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
252 * Data structures and manipulation thereof
255 struct w83627ehf_data {
256 int addr; /* IO base of hw monitor block */
259 struct class_device *class_dev;
262 struct mutex update_lock;
263 char valid; /* !=0 if following fields are valid */
264 unsigned long last_updated; /* In jiffies */
266 /* Register values */
267 u8 in_num; /* number of in inputs we have */
268 u8 in[10]; /* Register value */
269 u8 in_max[10]; /* Register value */
270 u8 in_min[10]; /* Register value */
274 u8 has_fan; /* some fan inputs can be disabled */
281 s16 temp_max_hyst[2];
284 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
285 u8 pwm_enable[4]; /* 1->manual
286 2->thermal cruise (also called SmartFan I) */
291 u8 fan_min_output[4]; /* minimum fan speed */
298 struct w83627ehf_sio_data {
303 static inline int is_word_sized(u16 reg)
305 return (((reg & 0xff00) == 0x100
306 || (reg & 0xff00) == 0x200)
307 && ((reg & 0x00ff) == 0x50
308 || (reg & 0x00ff) == 0x53
309 || (reg & 0x00ff) == 0x55));
312 /* We assume that the default bank is 0, thus the following two functions do
313 nothing for registers which live in bank 0. For others, they respectively
314 set the bank register to the correct value (before the register is
315 accessed), and back to 0 (afterwards). */
316 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
319 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
320 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
324 static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
327 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
328 outb_p(0, data->addr + DATA_REG_OFFSET);
332 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
334 int res, word_sized = is_word_sized(reg);
336 mutex_lock(&data->lock);
338 w83627ehf_set_bank(data, reg);
339 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
340 res = inb_p(data->addr + DATA_REG_OFFSET);
342 outb_p((reg & 0xff) + 1,
343 data->addr + ADDR_REG_OFFSET);
344 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
346 w83627ehf_reset_bank(data, reg);
348 mutex_unlock(&data->lock);
353 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
355 int word_sized = is_word_sized(reg);
357 mutex_lock(&data->lock);
359 w83627ehf_set_bank(data, reg);
360 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
362 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
363 outb_p((reg & 0xff) + 1,
364 data->addr + ADDR_REG_OFFSET);
366 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
367 w83627ehf_reset_bank(data, reg);
369 mutex_unlock(&data->lock);
373 /* This function assumes that the caller holds data->update_lock */
374 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
380 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
381 | ((data->fan_div[0] & 0x03) << 4);
382 /* fan5 input control bit is write only, compute the value */
383 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
384 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
385 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
386 | ((data->fan_div[0] & 0x04) << 3);
387 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
390 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
391 | ((data->fan_div[1] & 0x03) << 6);
392 /* fan5 input control bit is write only, compute the value */
393 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
394 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
395 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
396 | ((data->fan_div[1] & 0x04) << 4);
397 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
400 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
401 | ((data->fan_div[2] & 0x03) << 6);
402 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
403 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
404 | ((data->fan_div[2] & 0x04) << 5);
405 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
408 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
409 | (data->fan_div[3] & 0x03);
410 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
411 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
412 | ((data->fan_div[3] & 0x04) << 5);
413 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
416 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
417 | ((data->fan_div[4] & 0x03) << 2)
418 | ((data->fan_div[4] & 0x04) << 5);
419 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
424 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
428 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
429 data->fan_div[0] = (i >> 4) & 0x03;
430 data->fan_div[1] = (i >> 6) & 0x03;
431 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
432 data->fan_div[2] = (i >> 6) & 0x03;
433 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
434 data->fan_div[0] |= (i >> 3) & 0x04;
435 data->fan_div[1] |= (i >> 4) & 0x04;
436 data->fan_div[2] |= (i >> 5) & 0x04;
437 if (data->has_fan & ((1 << 3) | (1 << 4))) {
438 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
439 data->fan_div[3] = i & 0x03;
440 data->fan_div[4] = ((i >> 2) & 0x03)
443 if (data->has_fan & (1 << 3)) {
444 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
445 data->fan_div[3] |= (i >> 5) & 0x04;
449 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
451 struct w83627ehf_data *data = dev_get_drvdata(dev);
452 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
455 mutex_lock(&data->update_lock);
457 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
459 /* Fan clock dividers */
460 w83627ehf_update_fan_div(data);
462 /* Measured voltages and limits */
463 for (i = 0; i < data->in_num; i++) {
464 data->in[i] = w83627ehf_read_value(data,
465 W83627EHF_REG_IN(i));
466 data->in_min[i] = w83627ehf_read_value(data,
467 W83627EHF_REG_IN_MIN(i));
468 data->in_max[i] = w83627ehf_read_value(data,
469 W83627EHF_REG_IN_MAX(i));
472 /* Measured fan speeds and limits */
473 for (i = 0; i < 5; i++) {
474 if (!(data->has_fan & (1 << i)))
477 data->fan[i] = w83627ehf_read_value(data,
478 W83627EHF_REG_FAN[i]);
479 data->fan_min[i] = w83627ehf_read_value(data,
480 W83627EHF_REG_FAN_MIN[i]);
482 /* If we failed to measure the fan speed and clock
483 divider can be increased, let's try that for next
485 if (data->fan[i] == 0xff
486 && data->fan_div[i] < 0x07) {
487 dev_dbg(dev, "Increasing fan%d "
488 "clock divider from %u to %u\n",
489 i + 1, div_from_reg(data->fan_div[i]),
490 div_from_reg(data->fan_div[i] + 1));
492 w83627ehf_write_fan_div(data, i);
493 /* Preserve min limit if possible */
494 if (data->fan_min[i] >= 2
495 && data->fan_min[i] != 255)
496 w83627ehf_write_value(data,
497 W83627EHF_REG_FAN_MIN[i],
498 (data->fan_min[i] /= 2));
502 for (i = 0; i < 4; i++) {
503 /* pwmcfg, tolarance mapped for i=0, i=1 to same reg */
505 pwmcfg = w83627ehf_read_value(data,
506 W83627EHF_REG_PWM_ENABLE[i]);
507 tolerance = w83627ehf_read_value(data,
508 W83627EHF_REG_TOLERANCE[i]);
511 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
513 data->pwm_enable[i] =
514 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
516 data->pwm[i] = w83627ehf_read_value(data,
517 W83627EHF_REG_PWM[i]);
518 data->fan_min_output[i] = w83627ehf_read_value(data,
519 W83627EHF_REG_FAN_MIN_OUTPUT[i]);
520 data->fan_stop_time[i] = w83627ehf_read_value(data,
521 W83627EHF_REG_FAN_STOP_TIME[i]);
522 data->target_temp[i] =
523 w83627ehf_read_value(data,
524 W83627EHF_REG_TARGET[i]) &
525 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
526 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
530 /* Measured temperatures and limits */
531 data->temp1 = w83627ehf_read_value(data,
532 W83627EHF_REG_TEMP1);
533 data->temp1_max = w83627ehf_read_value(data,
534 W83627EHF_REG_TEMP1_OVER);
535 data->temp1_max_hyst = w83627ehf_read_value(data,
536 W83627EHF_REG_TEMP1_HYST);
537 for (i = 0; i < 2; i++) {
538 data->temp[i] = w83627ehf_read_value(data,
539 W83627EHF_REG_TEMP[i]);
540 data->temp_max[i] = w83627ehf_read_value(data,
541 W83627EHF_REG_TEMP_OVER[i]);
542 data->temp_max_hyst[i] = w83627ehf_read_value(data,
543 W83627EHF_REG_TEMP_HYST[i]);
546 data->alarms = w83627ehf_read_value(data,
547 W83627EHF_REG_ALARM1) |
548 (w83627ehf_read_value(data,
549 W83627EHF_REG_ALARM2) << 8) |
550 (w83627ehf_read_value(data,
551 W83627EHF_REG_ALARM3) << 16);
553 data->last_updated = jiffies;
557 mutex_unlock(&data->update_lock);
562 * Sysfs callback functions
564 #define show_in_reg(reg) \
566 show_##reg(struct device *dev, struct device_attribute *attr, \
569 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
570 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
571 int nr = sensor_attr->index; \
572 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
578 #define store_in_reg(REG, reg) \
580 store_in_##reg (struct device *dev, struct device_attribute *attr, \
581 const char *buf, size_t count) \
583 struct w83627ehf_data *data = dev_get_drvdata(dev); \
584 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
585 int nr = sensor_attr->index; \
586 u32 val = simple_strtoul(buf, NULL, 10); \
588 mutex_lock(&data->update_lock); \
589 data->in_##reg[nr] = in_to_reg(val, nr); \
590 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
591 data->in_##reg[nr]); \
592 mutex_unlock(&data->update_lock); \
596 store_in_reg(MIN, min)
597 store_in_reg(MAX, max)
599 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
601 struct w83627ehf_data *data = w83627ehf_update_device(dev);
602 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
603 int nr = sensor_attr->index;
604 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
607 static struct sensor_device_attribute sda_in_input[] = {
608 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
609 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
610 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
611 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
612 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
613 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
614 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
615 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
616 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
617 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
620 static struct sensor_device_attribute sda_in_alarm[] = {
621 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
622 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
623 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
624 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
625 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
626 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
627 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
628 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
629 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
630 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
633 static struct sensor_device_attribute sda_in_min[] = {
634 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
635 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
636 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
637 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
638 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
639 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
640 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
641 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
642 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
643 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
646 static struct sensor_device_attribute sda_in_max[] = {
647 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
648 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
649 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
650 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
651 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
652 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
653 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
654 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
655 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
656 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
659 #define show_fan_reg(reg) \
661 show_##reg(struct device *dev, struct device_attribute *attr, \
664 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
665 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
666 int nr = sensor_attr->index; \
667 return sprintf(buf, "%d\n", \
668 fan_from_reg(data->reg[nr], \
669 div_from_reg(data->fan_div[nr]))); \
672 show_fan_reg(fan_min);
675 show_fan_div(struct device *dev, struct device_attribute *attr,
678 struct w83627ehf_data *data = w83627ehf_update_device(dev);
679 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
680 int nr = sensor_attr->index;
681 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
685 store_fan_min(struct device *dev, struct device_attribute *attr,
686 const char *buf, size_t count)
688 struct w83627ehf_data *data = dev_get_drvdata(dev);
689 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
690 int nr = sensor_attr->index;
691 unsigned int val = simple_strtoul(buf, NULL, 10);
695 mutex_lock(&data->update_lock);
697 /* No min limit, alarm disabled */
698 data->fan_min[nr] = 255;
699 new_div = data->fan_div[nr]; /* No change */
700 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
701 } else if ((reg = 1350000U / val) >= 128 * 255) {
702 /* Speed below this value cannot possibly be represented,
703 even with the highest divider (128) */
704 data->fan_min[nr] = 254;
705 new_div = 7; /* 128 == (1 << 7) */
706 dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
707 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
709 /* Speed above this value cannot possibly be represented,
710 even with the lowest divider (1) */
711 data->fan_min[nr] = 1;
712 new_div = 0; /* 1 == (1 << 0) */
713 dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
714 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
716 /* Automatically pick the best divider, i.e. the one such
717 that the min limit will correspond to a register value
718 in the 96..192 range */
720 while (reg > 192 && new_div < 7) {
724 data->fan_min[nr] = reg;
727 /* Write both the fan clock divider (if it changed) and the new
728 fan min (unconditionally) */
729 if (new_div != data->fan_div[nr]) {
730 /* Preserve the fan speed reading */
731 if (data->fan[nr] != 0xff) {
732 if (new_div > data->fan_div[nr])
733 data->fan[nr] >>= new_div - data->fan_div[nr];
734 else if (data->fan[nr] & 0x80)
735 data->fan[nr] = 0xff;
737 data->fan[nr] <<= data->fan_div[nr] - new_div;
740 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
741 nr + 1, div_from_reg(data->fan_div[nr]),
742 div_from_reg(new_div));
743 data->fan_div[nr] = new_div;
744 w83627ehf_write_fan_div(data, nr);
745 /* Give the chip time to sample a new speed value */
746 data->last_updated = jiffies;
748 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
750 mutex_unlock(&data->update_lock);
755 static struct sensor_device_attribute sda_fan_input[] = {
756 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
757 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
758 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
759 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
760 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
763 static struct sensor_device_attribute sda_fan_alarm[] = {
764 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
765 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
766 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
767 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
768 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
771 static struct sensor_device_attribute sda_fan_min[] = {
772 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
774 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
776 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
778 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
780 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
784 static struct sensor_device_attribute sda_fan_div[] = {
785 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
786 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
787 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
788 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
789 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
792 #define show_temp1_reg(reg) \
794 show_##reg(struct device *dev, struct device_attribute *attr, \
797 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
798 return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
800 show_temp1_reg(temp1);
801 show_temp1_reg(temp1_max);
802 show_temp1_reg(temp1_max_hyst);
804 #define store_temp1_reg(REG, reg) \
806 store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
807 const char *buf, size_t count) \
809 struct w83627ehf_data *data = dev_get_drvdata(dev); \
810 u32 val = simple_strtoul(buf, NULL, 10); \
812 mutex_lock(&data->update_lock); \
813 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
814 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
815 data->temp1_##reg); \
816 mutex_unlock(&data->update_lock); \
819 store_temp1_reg(OVER, max);
820 store_temp1_reg(HYST, max_hyst);
822 #define show_temp_reg(reg) \
824 show_##reg(struct device *dev, struct device_attribute *attr, \
827 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
828 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
829 int nr = sensor_attr->index; \
830 return sprintf(buf, "%d\n", \
831 LM75_TEMP_FROM_REG(data->reg[nr])); \
834 show_temp_reg(temp_max);
835 show_temp_reg(temp_max_hyst);
837 #define store_temp_reg(REG, reg) \
839 store_##reg(struct device *dev, struct device_attribute *attr, \
840 const char *buf, size_t count) \
842 struct w83627ehf_data *data = dev_get_drvdata(dev); \
843 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
844 int nr = sensor_attr->index; \
845 u32 val = simple_strtoul(buf, NULL, 10); \
847 mutex_lock(&data->update_lock); \
848 data->reg[nr] = LM75_TEMP_TO_REG(val); \
849 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
851 mutex_unlock(&data->update_lock); \
854 store_temp_reg(OVER, temp_max);
855 store_temp_reg(HYST, temp_max_hyst);
858 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
860 struct w83627ehf_data *data = w83627ehf_update_device(dev);
861 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
862 int nr = sensor_attr->index;
863 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
866 static struct sensor_device_attribute sda_temp[] = {
867 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
868 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
869 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
870 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
872 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
874 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
876 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
877 store_temp1_max_hyst, 0),
878 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
879 store_temp_max_hyst, 0),
880 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
881 store_temp_max_hyst, 1),
882 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
883 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
884 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
885 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
886 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
887 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
890 #define show_pwm_reg(reg) \
891 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
894 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
895 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
896 int nr = sensor_attr->index; \
897 return sprintf(buf, "%d\n", data->reg[nr]); \
900 show_pwm_reg(pwm_mode)
901 show_pwm_reg(pwm_enable)
905 store_pwm_mode(struct device *dev, struct device_attribute *attr,
906 const char *buf, size_t count)
908 struct w83627ehf_data *data = dev_get_drvdata(dev);
909 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
910 int nr = sensor_attr->index;
911 u32 val = simple_strtoul(buf, NULL, 10);
916 mutex_lock(&data->update_lock);
917 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
918 data->pwm_mode[nr] = val;
919 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
921 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
922 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
923 mutex_unlock(&data->update_lock);
928 store_pwm(struct device *dev, struct device_attribute *attr,
929 const char *buf, size_t count)
931 struct w83627ehf_data *data = dev_get_drvdata(dev);
932 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
933 int nr = sensor_attr->index;
934 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
936 mutex_lock(&data->update_lock);
938 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
939 mutex_unlock(&data->update_lock);
944 store_pwm_enable(struct device *dev, struct device_attribute *attr,
945 const char *buf, size_t count)
947 struct w83627ehf_data *data = dev_get_drvdata(dev);
948 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
949 int nr = sensor_attr->index;
950 u32 val = simple_strtoul(buf, NULL, 10);
953 if (!val || (val > 2)) /* only modes 1 and 2 are supported */
955 mutex_lock(&data->update_lock);
956 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
957 data->pwm_enable[nr] = val;
958 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
959 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
960 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
961 mutex_unlock(&data->update_lock);
966 #define show_tol_temp(reg) \
967 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
970 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
971 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
972 int nr = sensor_attr->index; \
973 return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
976 show_tol_temp(tolerance)
977 show_tol_temp(target_temp)
980 store_target_temp(struct device *dev, struct device_attribute *attr,
981 const char *buf, size_t count)
983 struct w83627ehf_data *data = dev_get_drvdata(dev);
984 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
985 int nr = sensor_attr->index;
986 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
988 mutex_lock(&data->update_lock);
989 data->target_temp[nr] = val;
990 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
991 mutex_unlock(&data->update_lock);
996 store_tolerance(struct device *dev, struct device_attribute *attr,
997 const char *buf, size_t count)
999 struct w83627ehf_data *data = dev_get_drvdata(dev);
1000 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1001 int nr = sensor_attr->index;
1003 /* Limit the temp to 0C - 15C */
1004 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
1006 mutex_lock(&data->update_lock);
1007 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1008 data->tolerance[nr] = val;
1010 reg = (reg & 0x0f) | (val << 4);
1012 reg = (reg & 0xf0) | val;
1013 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1014 mutex_unlock(&data->update_lock);
1018 static struct sensor_device_attribute sda_pwm[] = {
1019 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1020 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1021 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1022 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1025 static struct sensor_device_attribute sda_pwm_mode[] = {
1026 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1028 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1030 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1032 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1036 static struct sensor_device_attribute sda_pwm_enable[] = {
1037 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1038 store_pwm_enable, 0),
1039 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1040 store_pwm_enable, 1),
1041 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1042 store_pwm_enable, 2),
1043 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1044 store_pwm_enable, 3),
1047 static struct sensor_device_attribute sda_target_temp[] = {
1048 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1049 store_target_temp, 0),
1050 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1051 store_target_temp, 1),
1052 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1053 store_target_temp, 2),
1054 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1055 store_target_temp, 3),
1058 static struct sensor_device_attribute sda_tolerance[] = {
1059 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1060 store_tolerance, 0),
1061 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1062 store_tolerance, 1),
1063 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1064 store_tolerance, 2),
1065 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1066 store_tolerance, 3),
1069 /* Smart Fan registers */
1071 #define fan_functions(reg, REG) \
1072 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1075 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1076 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1077 int nr = sensor_attr->index; \
1078 return sprintf(buf, "%d\n", data->reg[nr]); \
1081 store_##reg(struct device *dev, struct device_attribute *attr, \
1082 const char *buf, size_t count) \
1084 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1085 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1086 int nr = sensor_attr->index; \
1087 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1088 mutex_lock(&data->update_lock); \
1089 data->reg[nr] = val; \
1090 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1091 mutex_unlock(&data->update_lock); \
1095 fan_functions(fan_min_output, FAN_MIN_OUTPUT)
1097 #define fan_time_functions(reg, REG) \
1098 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1101 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1102 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1103 int nr = sensor_attr->index; \
1104 return sprintf(buf, "%d\n", \
1105 step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
1109 store_##reg(struct device *dev, struct device_attribute *attr, \
1110 const char *buf, size_t count) \
1112 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1113 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1114 int nr = sensor_attr->index; \
1115 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1116 data->pwm_mode[nr]); \
1117 mutex_lock(&data->update_lock); \
1118 data->reg[nr] = val; \
1119 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1120 mutex_unlock(&data->update_lock); \
1124 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1126 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1129 struct w83627ehf_data *data = dev_get_drvdata(dev);
1131 return sprintf(buf, "%s\n", data->name);
1133 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1135 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1136 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1137 store_fan_stop_time, 3),
1138 SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1139 store_fan_min_output, 3),
1142 static struct sensor_device_attribute sda_sf3_arrays[] = {
1143 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1144 store_fan_stop_time, 0),
1145 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1146 store_fan_stop_time, 1),
1147 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1148 store_fan_stop_time, 2),
1149 SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1150 store_fan_min_output, 0),
1151 SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1152 store_fan_min_output, 1),
1153 SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1154 store_fan_min_output, 2),
1158 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1160 struct w83627ehf_data *data = dev_get_drvdata(dev);
1161 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1163 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1166 * Driver and device management
1169 static void w83627ehf_device_remove_files(struct device *dev)
1171 /* some entries in the following arrays may not have been used in
1172 * device_create_file(), but device_remove_file() will ignore them */
1174 struct w83627ehf_data *data = dev_get_drvdata(dev);
1176 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1177 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1178 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1179 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1180 for (i = 0; i < data->in_num; i++) {
1181 device_remove_file(dev, &sda_in_input[i].dev_attr);
1182 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1183 device_remove_file(dev, &sda_in_min[i].dev_attr);
1184 device_remove_file(dev, &sda_in_max[i].dev_attr);
1186 for (i = 0; i < 5; i++) {
1187 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1188 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1189 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1190 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1192 for (i = 0; i < 4; i++) {
1193 device_remove_file(dev, &sda_pwm[i].dev_attr);
1194 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1195 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1196 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1197 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1199 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1200 device_remove_file(dev, &sda_temp[i].dev_attr);
1202 device_remove_file(dev, &dev_attr_name);
1203 if (data->vid != 0x3f)
1204 device_remove_file(dev, &dev_attr_cpu0_vid);
1207 /* Get the monitoring functions started */
1208 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1213 /* Start monitoring is needed */
1214 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1216 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1219 /* Enable temp2 and temp3 if needed */
1220 for (i = 0; i < 2; i++) {
1221 tmp = w83627ehf_read_value(data,
1222 W83627EHF_REG_TEMP_CONFIG[i]);
1224 w83627ehf_write_value(data,
1225 W83627EHF_REG_TEMP_CONFIG[i],
1229 /* Enable VBAT monitoring if needed */
1230 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1232 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1234 /* Get thermal sensor types */
1235 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1236 for (i = 0; i < 3; i++) {
1237 if ((tmp & (0x02 << i)))
1238 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1240 data->temp_type[i] = 4; /* thermistor */
1244 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1246 struct device *dev = &pdev->dev;
1247 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1248 struct w83627ehf_data *data;
1249 struct resource *res;
1250 u8 fan4pin, fan5pin, en_vrm10;
1253 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1254 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1256 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1257 (unsigned long)res->start,
1258 (unsigned long)res->start + IOREGION_LENGTH - 1);
1262 if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1267 data->addr = res->start;
1268 mutex_init(&data->lock);
1269 mutex_init(&data->update_lock);
1270 data->name = w83627ehf_device_names[sio_data->kind];
1271 platform_set_drvdata(pdev, data);
1273 /* 627EHG and 627EHF have 10 voltage inputs; DHG has 9 */
1274 data->in_num = (sio_data->kind == w83627dhg) ? 9 : 10;
1276 /* Initialize the chip */
1277 w83627ehf_init_device(data);
1279 data->vrm = vid_which_vrm();
1280 superio_enter(sio_data->sioreg);
1281 /* Set VID input sensibility if needed. In theory the BIOS should
1282 have set it, but in practice it's not always the case. */
1283 en_vrm10 = superio_inb(sio_data->sioreg, SIO_REG_EN_VRM10);
1284 if ((en_vrm10 & 0x08) && data->vrm != 100) {
1285 dev_warn(dev, "Setting VID input voltage to TTL\n");
1286 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1288 } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {
1289 dev_warn(dev, "Setting VID input voltage to VRM10\n");
1290 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1293 /* Read VID value */
1294 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1295 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80)
1296 data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f;
1298 dev_info(dev, "VID pins in output mode, CPU VID not "
1303 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1305 fan5pin = superio_inb(sio_data->sioreg, 0x24) & 0x2;
1306 fan4pin = superio_inb(sio_data->sioreg, 0x29) & 0x6;
1307 superio_exit(sio_data->sioreg);
1309 /* It looks like fan4 and fan5 pins can be alternatively used
1310 as fan on/off switches, but fan5 control is write only :/
1311 We assume that if the serial interface is disabled, designers
1312 connected fan5 as input unless they are emitting log 1, which
1313 is not the default. */
1315 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1316 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1317 if ((i & (1 << 2)) && (!fan4pin))
1318 data->has_fan |= (1 << 3);
1319 if (!(i & (1 << 1)) && (!fan5pin))
1320 data->has_fan |= (1 << 4);
1322 /* Read fan clock dividers immediately */
1323 w83627ehf_update_fan_div(data);
1325 /* Register sysfs hooks */
1326 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1327 if ((err = device_create_file(dev,
1328 &sda_sf3_arrays[i].dev_attr)))
1331 /* if fan4 is enabled create the sf3 files for it */
1332 if (data->has_fan & (1 << 3))
1333 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1334 if ((err = device_create_file(dev,
1335 &sda_sf3_arrays_fan4[i].dev_attr)))
1339 for (i = 0; i < data->in_num; i++)
1340 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1341 || (err = device_create_file(dev,
1342 &sda_in_alarm[i].dev_attr))
1343 || (err = device_create_file(dev,
1344 &sda_in_min[i].dev_attr))
1345 || (err = device_create_file(dev,
1346 &sda_in_max[i].dev_attr)))
1349 for (i = 0; i < 5; i++) {
1350 if (data->has_fan & (1 << i)) {
1351 if ((err = device_create_file(dev,
1352 &sda_fan_input[i].dev_attr))
1353 || (err = device_create_file(dev,
1354 &sda_fan_alarm[i].dev_attr))
1355 || (err = device_create_file(dev,
1356 &sda_fan_div[i].dev_attr))
1357 || (err = device_create_file(dev,
1358 &sda_fan_min[i].dev_attr)))
1360 if (i < 4 && /* w83627ehf only has 4 pwm */
1361 ((err = device_create_file(dev,
1362 &sda_pwm[i].dev_attr))
1363 || (err = device_create_file(dev,
1364 &sda_pwm_mode[i].dev_attr))
1365 || (err = device_create_file(dev,
1366 &sda_pwm_enable[i].dev_attr))
1367 || (err = device_create_file(dev,
1368 &sda_target_temp[i].dev_attr))
1369 || (err = device_create_file(dev,
1370 &sda_tolerance[i].dev_attr))))
1375 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1376 if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
1379 err = device_create_file(dev, &dev_attr_name);
1383 if (data->vid != 0x3f) {
1384 err = device_create_file(dev, &dev_attr_cpu0_vid);
1389 data->class_dev = hwmon_device_register(dev);
1390 if (IS_ERR(data->class_dev)) {
1391 err = PTR_ERR(data->class_dev);
1398 w83627ehf_device_remove_files(dev);
1400 platform_set_drvdata(pdev, NULL);
1402 release_region(res->start, IOREGION_LENGTH);
1407 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1409 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1411 hwmon_device_unregister(data->class_dev);
1412 w83627ehf_device_remove_files(&pdev->dev);
1413 release_region(data->addr, IOREGION_LENGTH);
1414 platform_set_drvdata(pdev, NULL);
1420 static struct platform_driver w83627ehf_driver = {
1422 .owner = THIS_MODULE,
1425 .probe = w83627ehf_probe,
1426 .remove = __devexit_p(w83627ehf_remove),
1429 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1430 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1431 struct w83627ehf_sio_data *sio_data)
1433 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1434 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1435 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1438 const char *sio_name;
1440 superio_enter(sioaddr);
1442 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1443 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1444 switch (val & SIO_ID_MASK) {
1445 case SIO_W83627EHF_ID:
1446 sio_data->kind = w83627ehf;
1447 sio_name = sio_name_W83627EHF;
1449 case SIO_W83627EHG_ID:
1450 sio_data->kind = w83627ehf;
1451 sio_name = sio_name_W83627EHG;
1453 case SIO_W83627DHG_ID:
1454 sio_data->kind = w83627dhg;
1455 sio_name = sio_name_W83627DHG;
1459 pr_debug(DRVNAME ": unsupported chip ID: 0x%04x\n",
1461 superio_exit(sioaddr);
1465 /* We have a known chip, find the HWM I/O address */
1466 superio_select(sioaddr, W83627EHF_LD_HWM);
1467 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1468 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1469 *addr = val & IOREGION_ALIGNMENT;
1471 printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
1472 "device with a base I/O port 0.\n");
1473 superio_exit(sioaddr);
1477 /* Activate logical device if needed */
1478 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1479 if (!(val & 0x01)) {
1480 printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
1481 "Sensor is probably unusable.\n");
1482 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1485 superio_exit(sioaddr);
1486 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1487 sio_data->sioreg = sioaddr;
1492 /* when Super-I/O functions move to a separate file, the Super-I/O
1493 * bus will manage the lifetime of the device and this module will only keep
1494 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1495 * must keep track of the device */
1496 static struct platform_device *pdev;
1498 static int __init sensors_w83627ehf_init(void)
1501 unsigned short address;
1502 struct resource res;
1503 struct w83627ehf_sio_data sio_data;
1505 /* initialize sio_data->kind and sio_data->sioreg.
1507 * when Super-I/O functions move to a separate file, the Super-I/O
1508 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1509 * w83627ehf hardware monitor, and call probe() */
1510 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1511 w83627ehf_find(0x4e, &address, &sio_data))
1514 err = platform_driver_register(&w83627ehf_driver);
1518 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1520 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1521 goto exit_unregister;
1524 err = platform_device_add_data(pdev, &sio_data,
1525 sizeof(struct w83627ehf_sio_data));
1527 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1528 goto exit_device_put;
1531 memset(&res, 0, sizeof(res));
1533 res.start = address + IOREGION_OFFSET;
1534 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1535 res.flags = IORESOURCE_IO;
1536 err = platform_device_add_resources(pdev, &res, 1);
1538 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1540 goto exit_device_put;
1543 /* platform_device_add calls probe() */
1544 err = platform_device_add(pdev);
1546 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1548 goto exit_device_put;
1554 platform_device_put(pdev);
1556 platform_driver_unregister(&w83627ehf_driver);
1561 static void __exit sensors_w83627ehf_exit(void)
1563 platform_device_unregister(pdev);
1564 platform_driver_unregister(&w83627ehf_driver);
1567 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1568 MODULE_DESCRIPTION("W83627EHF driver");
1569 MODULE_LICENSE("GPL");
1571 module_init(sensors_w83627ehf_init);
1572 module_exit(sensors_w83627ehf_exit);