2 * Copyright(C) 2016 Linaro Limited. All rights reserved.
3 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #include <linux/circ_buf.h>
19 #include <linux/coresight.h>
20 #include <linux/perf_event.h>
21 #include <linux/slab.h>
22 #include "coresight-priv.h"
23 #include "coresight-tmc.h"
25 static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
27 CS_UNLOCK(drvdata->base);
29 /* Wait for TMCSReady bit to be set */
30 tmc_wait_for_tmcready(drvdata);
32 writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
33 writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI |
34 TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT |
35 TMC_FFCR_TRIGON_TRIGIN,
36 drvdata->base + TMC_FFCR);
38 writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG);
39 tmc_enable_hw(drvdata);
41 CS_LOCK(drvdata->base);
44 static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata)
53 for (i = 0; i < drvdata->memwidth; i++) {
54 read_data = readl_relaxed(drvdata->base + TMC_RRD);
55 if (read_data == 0xFFFFFFFF)
57 memcpy(bufp, &read_data, 4);
64 static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
66 CS_UNLOCK(drvdata->base);
68 tmc_flush_and_stop(drvdata);
70 * When operating in sysFS mode the content of the buffer needs to be
71 * read before the TMC is disabled.
73 if (drvdata->mode == CS_MODE_SYSFS)
74 tmc_etb_dump_hw(drvdata);
75 tmc_disable_hw(drvdata);
77 CS_LOCK(drvdata->base);
80 static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
82 CS_UNLOCK(drvdata->base);
84 /* Wait for TMCSReady bit to be set */
85 tmc_wait_for_tmcready(drvdata);
87 writel_relaxed(TMC_MODE_HARDWARE_FIFO, drvdata->base + TMC_MODE);
88 writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI,
89 drvdata->base + TMC_FFCR);
90 writel_relaxed(0x0, drvdata->base + TMC_BUFWM);
91 tmc_enable_hw(drvdata);
93 CS_LOCK(drvdata->base);
96 static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
98 CS_UNLOCK(drvdata->base);
100 tmc_flush_and_stop(drvdata);
101 tmc_disable_hw(drvdata);
103 CS_LOCK(drvdata->base);
106 static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev)
112 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
115 * If we don't have a buffer release the lock and allocate memory.
116 * Otherwise keep the lock and move along.
118 spin_lock_irqsave(&drvdata->spinlock, flags);
120 spin_unlock_irqrestore(&drvdata->spinlock, flags);
122 /* Allocating the memory here while outside of the spinlock */
123 buf = kzalloc(drvdata->size, GFP_KERNEL);
127 /* Let's try again */
128 spin_lock_irqsave(&drvdata->spinlock, flags);
131 if (drvdata->reading) {
137 * In sysFS mode we can have multiple writers per sink. Since this
138 * sink is already enabled no memory is needed and the HW need not be
141 if (drvdata->mode == CS_MODE_SYSFS)
145 * If drvdata::buf isn't NULL, memory was allocated for a previous
146 * trace run but wasn't read. If so simply zero-out the memory.
147 * Otherwise use the memory allocated above.
149 * The memory is freed when users read the buffer using the
150 * /dev/xyz.{etf|etb} interface. See tmc_read_unprepare_etf() for
154 memset(drvdata->buf, 0, drvdata->size);
160 drvdata->mode = CS_MODE_SYSFS;
161 tmc_etb_enable_hw(drvdata);
163 spin_unlock_irqrestore(&drvdata->spinlock, flags);
165 /* Free memory outside the spinlock if need be */
170 dev_info(drvdata->dev, "TMC-ETB/ETF enabled\n");
175 static int tmc_enable_etf_sink_perf(struct coresight_device *csdev)
179 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
181 spin_lock_irqsave(&drvdata->spinlock, flags);
182 if (drvdata->reading) {
188 * In Perf mode there can be only one writer per sink. There
189 * is also no need to continue if the ETB/ETR is already operated
192 if (drvdata->mode != CS_MODE_DISABLED) {
197 drvdata->mode = CS_MODE_PERF;
198 tmc_etb_enable_hw(drvdata);
200 spin_unlock_irqrestore(&drvdata->spinlock, flags);
205 static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode)
209 return tmc_enable_etf_sink_sysfs(csdev);
211 return tmc_enable_etf_sink_perf(csdev);
214 /* We shouldn't be here */
218 static void tmc_disable_etf_sink(struct coresight_device *csdev)
221 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
223 spin_lock_irqsave(&drvdata->spinlock, flags);
224 if (drvdata->reading) {
225 spin_unlock_irqrestore(&drvdata->spinlock, flags);
229 /* Disable the TMC only if it needs to */
230 if (drvdata->mode != CS_MODE_DISABLED) {
231 tmc_etb_disable_hw(drvdata);
232 drvdata->mode = CS_MODE_DISABLED;
235 spin_unlock_irqrestore(&drvdata->spinlock, flags);
237 dev_info(drvdata->dev, "TMC-ETB/ETF disabled\n");
240 static int tmc_enable_etf_link(struct coresight_device *csdev,
241 int inport, int outport)
244 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
246 spin_lock_irqsave(&drvdata->spinlock, flags);
247 if (drvdata->reading) {
248 spin_unlock_irqrestore(&drvdata->spinlock, flags);
252 tmc_etf_enable_hw(drvdata);
253 drvdata->mode = CS_MODE_SYSFS;
254 spin_unlock_irqrestore(&drvdata->spinlock, flags);
256 dev_info(drvdata->dev, "TMC-ETF enabled\n");
260 static void tmc_disable_etf_link(struct coresight_device *csdev,
261 int inport, int outport)
264 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
266 spin_lock_irqsave(&drvdata->spinlock, flags);
267 if (drvdata->reading) {
268 spin_unlock_irqrestore(&drvdata->spinlock, flags);
272 tmc_etf_disable_hw(drvdata);
273 drvdata->mode = CS_MODE_DISABLED;
274 spin_unlock_irqrestore(&drvdata->spinlock, flags);
276 dev_info(drvdata->dev, "TMC disabled\n");
279 static void *tmc_alloc_etf_buffer(struct coresight_device *csdev, int cpu,
280 void **pages, int nr_pages, bool overwrite)
283 struct cs_buffers *buf;
286 cpu = smp_processor_id();
287 node = cpu_to_node(cpu);
289 /* Allocate memory structure for interaction with Perf */
290 buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
294 buf->snapshot = overwrite;
295 buf->nr_pages = nr_pages;
296 buf->data_pages = pages;
301 static void tmc_free_etf_buffer(void *config)
303 struct cs_buffers *buf = config;
308 static int tmc_set_etf_buffer(struct coresight_device *csdev,
309 struct perf_output_handle *handle,
314 struct cs_buffers *buf = sink_config;
316 /* wrap head around to the amount of space we have */
317 head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
319 /* find the page to write to */
320 buf->cur = head / PAGE_SIZE;
322 /* and offset within that page */
323 buf->offset = head % PAGE_SIZE;
325 local_set(&buf->data_size, 0);
330 static unsigned long tmc_reset_etf_buffer(struct coresight_device *csdev,
331 struct perf_output_handle *handle,
335 struct cs_buffers *buf = sink_config;
339 * In snapshot mode ->data_size holds the new address of the
340 * ring buffer's head. The size itself is the whole address
341 * range since we want the latest information.
344 handle->head = local_xchg(&buf->data_size,
345 buf->nr_pages << PAGE_SHIFT);
347 * Tell the tracer PMU how much we got in this run and if
348 * something went wrong along the way. Nobody else can use
349 * this cs_buffers instance until we are done. As such
350 * resetting parameters here and squaring off with the ring
351 * buffer API in the tracer PMU is fine.
353 size = local_xchg(&buf->data_size, 0);
359 static void tmc_update_etf_buffer(struct coresight_device *csdev,
360 struct perf_output_handle *handle,
365 u32 read_ptr, write_ptr;
367 unsigned long offset;
368 struct cs_buffers *buf = sink_config;
369 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
374 /* This shouldn't happen */
375 if (WARN_ON_ONCE(drvdata->mode != CS_MODE_PERF))
378 CS_UNLOCK(drvdata->base);
380 tmc_flush_and_stop(drvdata);
382 read_ptr = readl_relaxed(drvdata->base + TMC_RRP);
383 write_ptr = readl_relaxed(drvdata->base + TMC_RWP);
386 * Get a hold of the status register and see if a wrap around
387 * has occurred. If so adjust things accordingly.
389 status = readl_relaxed(drvdata->base + TMC_STS);
390 if (status & TMC_STS_FULL) {
391 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
392 to_read = drvdata->size;
394 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->size);
398 * The TMC RAM buffer may be bigger than the space available in the
399 * perf ring buffer (handle->size). If so advance the RRP so that we
400 * get the latest trace data.
402 if (to_read > handle->size) {
406 * The value written to RRP must be byte-address aligned to
407 * the width of the trace memory databus _and_ to a frame
408 * boundary (16 byte), whichever is the biggest. For example,
409 * for 32-bit, 64-bit and 128-bit wide trace memory, the four
410 * LSBs must be 0s. For 256-bit wide trace memory, the five
413 switch (drvdata->memwidth) {
414 case TMC_MEM_INTF_WIDTH_32BITS:
415 case TMC_MEM_INTF_WIDTH_64BITS:
416 case TMC_MEM_INTF_WIDTH_128BITS:
417 mask = GENMASK(31, 5);
419 case TMC_MEM_INTF_WIDTH_256BITS:
420 mask = GENMASK(31, 6);
425 * Make sure the new size is aligned in accordance with the
426 * requirement explained above.
428 to_read = handle->size & mask;
429 /* Move the RAM read pointer up */
430 read_ptr = (write_ptr + drvdata->size) - to_read;
431 /* Make sure we are still within our limits */
432 if (read_ptr > (drvdata->size - 1))
433 read_ptr -= drvdata->size;
435 writel_relaxed(read_ptr, drvdata->base + TMC_RRP);
436 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
440 offset = buf->offset;
442 /* for every byte to read */
443 for (i = 0; i < to_read; i += 4) {
444 buf_ptr = buf->data_pages[cur] + offset;
445 *buf_ptr = readl_relaxed(drvdata->base + TMC_RRD);
448 if (offset >= PAGE_SIZE) {
451 /* wrap around at the end of the buffer */
452 cur &= buf->nr_pages - 1;
457 * In snapshot mode all we have to do is communicate to
458 * perf_aux_output_end() the address of the current head. In full
459 * trace mode the same function expects a size to move rb->aux_head
463 local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
465 local_add(to_read, &buf->data_size);
467 CS_LOCK(drvdata->base);
470 static const struct coresight_ops_sink tmc_etf_sink_ops = {
471 .enable = tmc_enable_etf_sink,
472 .disable = tmc_disable_etf_sink,
473 .alloc_buffer = tmc_alloc_etf_buffer,
474 .free_buffer = tmc_free_etf_buffer,
475 .set_buffer = tmc_set_etf_buffer,
476 .reset_buffer = tmc_reset_etf_buffer,
477 .update_buffer = tmc_update_etf_buffer,
480 static const struct coresight_ops_link tmc_etf_link_ops = {
481 .enable = tmc_enable_etf_link,
482 .disable = tmc_disable_etf_link,
485 const struct coresight_ops tmc_etb_cs_ops = {
486 .sink_ops = &tmc_etf_sink_ops,
489 const struct coresight_ops tmc_etf_cs_ops = {
490 .sink_ops = &tmc_etf_sink_ops,
491 .link_ops = &tmc_etf_link_ops,
494 int tmc_read_prepare_etb(struct tmc_drvdata *drvdata)
500 /* config types are set a boot time and never change */
501 if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETB &&
502 drvdata->config_type != TMC_CONFIG_TYPE_ETF))
505 spin_lock_irqsave(&drvdata->spinlock, flags);
507 if (drvdata->reading) {
512 /* There is no point in reading a TMC in HW FIFO mode */
513 mode = readl_relaxed(drvdata->base + TMC_MODE);
514 if (mode != TMC_MODE_CIRCULAR_BUFFER) {
519 /* Don't interfere if operated from Perf */
520 if (drvdata->mode == CS_MODE_PERF) {
525 /* If drvdata::buf is NULL the trace data has been read already */
526 if (drvdata->buf == NULL) {
531 /* Disable the TMC if need be */
532 if (drvdata->mode == CS_MODE_SYSFS)
533 tmc_etb_disable_hw(drvdata);
535 drvdata->reading = true;
537 spin_unlock_irqrestore(&drvdata->spinlock, flags);
542 int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata)
548 /* config types are set a boot time and never change */
549 if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETB &&
550 drvdata->config_type != TMC_CONFIG_TYPE_ETF))
553 spin_lock_irqsave(&drvdata->spinlock, flags);
555 /* There is no point in reading a TMC in HW FIFO mode */
556 mode = readl_relaxed(drvdata->base + TMC_MODE);
557 if (mode != TMC_MODE_CIRCULAR_BUFFER) {
558 spin_unlock_irqrestore(&drvdata->spinlock, flags);
562 /* Re-enable the TMC if need be */
563 if (drvdata->mode == CS_MODE_SYSFS) {
565 * The trace run will continue with the same allocated trace
566 * buffer. As such zero-out the buffer so that we don't end
567 * up with stale data.
569 * Since the tracer is still enabled drvdata::buf
572 memset(drvdata->buf, 0, drvdata->size);
573 tmc_etb_enable_hw(drvdata);
576 * The ETB/ETF is not tracing and the buffer was just read.
577 * As such prepare to free the trace buffer.
583 drvdata->reading = false;
584 spin_unlock_irqrestore(&drvdata->spinlock, flags);
587 * Free allocated memory outside of the spinlock. There is no need
588 * to assert the validity of 'buf' since calling kfree(NULL) is safe.