1 /* -------------------------------------------------------------------------
2 * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters
3 * -------------------------------------------------------------------------
4 * Copyright (C) 1995-2000 Simon G. Vogl
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * ------------------------------------------------------------------------- */
21 /* With some changes from Frodo Looijaard <frodol@dds.nl>, Kyösti Mälkki
22 <kmalkki@cc.hut.fi> and Jean Delvare <khali@linux-fr.org> */
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/errno.h>
29 #include <linux/sched.h>
30 #include <linux/i2c.h>
31 #include <linux/i2c-algo-bit.h>
34 /* ----- global defines ----------------------------------------------- */
37 #define bit_dbg(level, dev, format, args...) \
39 if (i2c_debug >= level) \
40 dev_dbg(dev, format, ##args); \
43 #define bit_dbg(level, dev, format, args...) \
47 /* ----- global variables --------------------------------------------- */
49 static int bit_test; /* see if the line-setting functions work */
50 module_param(bit_test, int, S_IRUGO);
51 MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
54 static int i2c_debug = 1;
55 module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
56 MODULE_PARM_DESC(i2c_debug,
57 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
60 /* --- setting states on the bus with the right timing: --------------- */
62 #define setsda(adap, val) adap->setsda(adap->data, val)
63 #define setscl(adap, val) adap->setscl(adap->data, val)
64 #define getsda(adap) adap->getsda(adap->data)
65 #define getscl(adap) adap->getscl(adap->data)
67 static inline void sdalo(struct i2c_algo_bit_data *adap)
70 udelay((adap->udelay + 1) / 2);
73 static inline void sdahi(struct i2c_algo_bit_data *adap)
76 udelay((adap->udelay + 1) / 2);
79 static inline void scllo(struct i2c_algo_bit_data *adap)
82 udelay(adap->udelay / 2);
86 * Raise scl line, and do checking for delays. This is necessary for slower
89 static int sclhi(struct i2c_algo_bit_data *adap)
95 /* Not all adapters have scl sense line... */
100 while (!getscl(adap)) {
101 /* This hw knows how to read the clock line, so we wait
102 * until it actually gets high. This is safer as some
103 * chips may hold it low ("clock stretching") while they
104 * are processing data internally.
106 if (time_after(jiffies, start + adap->timeout))
111 if (jiffies != start && i2c_debug >= 3)
112 pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go "
113 "high\n", jiffies - start);
117 udelay(adap->udelay);
122 /* --- other auxiliary functions -------------------------------------- */
123 static void i2c_start(struct i2c_algo_bit_data *adap)
125 /* assert: scl, sda are high */
127 udelay(adap->udelay);
131 static void i2c_repstart(struct i2c_algo_bit_data *adap)
133 /* assert: scl is low */
137 udelay(adap->udelay);
142 static void i2c_stop(struct i2c_algo_bit_data *adap)
144 /* assert: scl is low */
148 udelay(adap->udelay);
153 /* send a byte without start cond., look for arbitration,
154 check ackn. from slave */
156 * 1 if the device acknowledged
157 * 0 if the device did not ack
158 * -ETIMEDOUT if an error occurred (while raising the scl line)
160 static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
165 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
167 /* assert: scl is low */
168 for (i = 7; i >= 0; i--) {
171 udelay((adap->udelay + 1) / 2);
172 if (sclhi(adap) < 0) { /* timed out */
173 bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
174 "timeout at bit #%d\n", (int)c, i);
177 /* FIXME do arbitration here:
178 * if (sb && !getsda(adap)) -> ouch! Get out of here.
180 * Report a unique code, so higher level code can retry
181 * the whole (combined) message and *NOT* issue STOP.
186 if (sclhi(adap) < 0) { /* timeout */
187 bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
188 "timeout at ack\n", (int)c);
192 /* read ack: SDA should be pulled down by slave, or it may
193 * NAK (usually to report problems with the data we wrote).
195 ack = !getsda(adap); /* ack: sda is pulled low -> success */
196 bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
201 /* assert: scl is low (sda undef) */
205 static int i2c_inb(struct i2c_adapter *i2c_adap)
207 /* read byte via i2c port, without start/stop sequence */
208 /* acknowledge is sent in i2c_read. */
210 unsigned char indata = 0;
211 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
213 /* assert: scl is low */
215 for (i = 0; i < 8; i++) {
216 if (sclhi(adap) < 0) { /* timeout */
217 bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit "
225 udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
227 /* assert: scl is low */
232 * Sanity check for the adapter hardware - check the reaction of
233 * the bus lines only if it seems to be idle.
235 static int test_bus(struct i2c_adapter *i2c_adap)
237 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
238 const char *name = i2c_adap->name;
241 if (adap->pre_xfer) {
242 ret = adap->pre_xfer(i2c_adap);
247 if (adap->getscl == NULL)
248 pr_info("%s: Testing SDA only, SCL is not readable\n", name);
251 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
254 "%s: bus seems to be busy (scl=%d, sda=%d)\n",
261 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
263 printk(KERN_WARNING "%s: SDA stuck high!\n", name);
267 printk(KERN_WARNING "%s: SCL unexpected low "
268 "while pulling SDA low!\n", name);
274 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
276 printk(KERN_WARNING "%s: SDA stuck low!\n", name);
280 printk(KERN_WARNING "%s: SCL unexpected low "
281 "while pulling SDA high!\n", name);
287 scl = (adap->getscl == NULL) ? 0 : getscl(adap);
289 printk(KERN_WARNING "%s: SCL stuck high!\n", name);
293 printk(KERN_WARNING "%s: SDA unexpected low "
294 "while pulling SCL low!\n", name);
300 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
302 printk(KERN_WARNING "%s: SCL stuck low!\n", name);
306 printk(KERN_WARNING "%s: SDA unexpected low "
307 "while pulling SCL high!\n", name);
312 adap->post_xfer(i2c_adap);
314 pr_info("%s: Test OK\n", name);
321 adap->post_xfer(i2c_adap);
326 /* ----- Utility functions
329 /* try_address tries to contact a chip for a number of
330 * times before it gives up.
333 * 0 chip did not answer
334 * -x transmission error
336 static int try_address(struct i2c_adapter *i2c_adap,
337 unsigned char addr, int retries)
339 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
342 for (i = 0; i <= retries; i++) {
343 ret = i2c_outb(i2c_adap, addr);
344 if (ret == 1 || i == retries)
346 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
348 udelay(adap->udelay);
350 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
354 bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at "
355 "0x%02x: %s\n", i + 1,
356 addr & 1 ? "read from" : "write to", addr >> 1,
357 ret == 1 ? "success" : "failed, timeout?");
361 static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
363 const unsigned char *temp = msg->buf;
364 int count = msg->len;
365 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
370 retval = i2c_outb(i2c_adap, *temp);
372 /* OK/ACK; or ignored NAK */
373 if ((retval > 0) || (nak_ok && (retval == 0))) {
378 /* A slave NAKing the master means the slave didn't like
379 * something about the data it saw. For example, maybe
380 * the SMBus PEC was wrong.
382 } else if (retval == 0) {
383 dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
386 /* Timeout; or (someday) lost arbitration
388 * FIXME Lost ARB implies retrying the transaction from
389 * the first message, after the "winning" master issues
390 * its STOP. As a rule, upper layer code has no reason
391 * to know or care about this ... it is *NOT* an error.
394 dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
402 static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
404 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
406 /* assert: sda is high */
407 if (is_ack) /* send ack */
409 udelay((adap->udelay + 1) / 2);
410 if (sclhi(adap) < 0) { /* timeout */
411 dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
418 static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
421 int rdcount = 0; /* counts bytes read */
422 unsigned char *temp = msg->buf;
423 int count = msg->len;
424 const unsigned flags = msg->flags;
427 inval = i2c_inb(i2c_adap);
431 } else { /* read timed out */
438 /* Some SMBus transactions require that we receive the
439 transaction length as the first read byte. */
440 if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
441 if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
442 if (!(flags & I2C_M_NO_RD_ACK))
444 dev_err(&i2c_adap->dev, "readbytes: invalid "
445 "block length (%d)\n", inval);
448 /* The original count value accounts for the extra
449 bytes, that is, either 1 for a regular transaction,
450 or 2 for a PEC transaction. */
455 bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
457 (flags & I2C_M_NO_RD_ACK)
459 : (count ? "A" : "NA"));
461 if (!(flags & I2C_M_NO_RD_ACK)) {
462 inval = acknak(i2c_adap, count);
470 /* doAddress initiates the transfer by generating the start condition (in
471 * try_address) and transmits the address in the necessary format to handle
472 * reads, writes as well as 10bit-addresses.
474 * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
475 * -x an error occurred (like: -ENXIO if the device did not answer, or
476 * -ETIMEDOUT, for example if the lines are stuck...)
478 static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
480 unsigned short flags = msg->flags;
481 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
482 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
487 retries = nak_ok ? 0 : i2c_adap->retries;
489 if (flags & I2C_M_TEN) {
490 /* a ten bit address */
491 addr = 0xf0 | ((msg->addr >> 7) & 0x06);
492 bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
493 /* try extended address code...*/
494 ret = try_address(i2c_adap, addr, retries);
495 if ((ret != 1) && !nak_ok) {
496 dev_err(&i2c_adap->dev,
497 "died at extended address code\n");
500 /* the remaining 8 bit address */
501 ret = i2c_outb(i2c_adap, msg->addr & 0xff);
502 if ((ret != 1) && !nak_ok) {
503 /* the chip did not ack / xmission error occurred */
504 dev_err(&i2c_adap->dev, "died at 2nd address code\n");
507 if (flags & I2C_M_RD) {
508 bit_dbg(3, &i2c_adap->dev, "emitting repeated "
509 "start condition\n");
511 /* okay, now switch into reading mode */
513 ret = try_address(i2c_adap, addr, retries);
514 if ((ret != 1) && !nak_ok) {
515 dev_err(&i2c_adap->dev,
516 "died at repeated address code\n");
520 } else { /* normal 7bit address */
521 addr = msg->addr << 1;
522 if (flags & I2C_M_RD)
524 if (flags & I2C_M_REV_DIR_ADDR)
526 ret = try_address(i2c_adap, addr, retries);
527 if ((ret != 1) && !nak_ok)
534 static int bit_xfer(struct i2c_adapter *i2c_adap,
535 struct i2c_msg msgs[], int num)
537 struct i2c_msg *pmsg;
538 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
540 unsigned short nak_ok;
542 if (adap->pre_xfer) {
543 ret = adap->pre_xfer(i2c_adap);
548 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
550 for (i = 0; i < num; i++) {
552 nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
553 if (!(pmsg->flags & I2C_M_NOSTART)) {
555 bit_dbg(3, &i2c_adap->dev, "emitting "
556 "repeated start condition\n");
559 ret = bit_doAddress(i2c_adap, pmsg);
560 if ((ret != 0) && !nak_ok) {
561 bit_dbg(1, &i2c_adap->dev, "NAK from "
562 "device addr 0x%02x msg #%d\n",
567 if (pmsg->flags & I2C_M_RD) {
568 /* read bytes into buffer*/
569 ret = readbytes(i2c_adap, pmsg);
571 bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
572 ret, ret == 1 ? "" : "s");
573 if (ret < pmsg->len) {
579 /* write bytes from buffer */
580 ret = sendbytes(i2c_adap, pmsg);
582 bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
583 ret, ret == 1 ? "" : "s");
584 if (ret < pmsg->len) {
594 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
598 adap->post_xfer(i2c_adap);
602 static u32 bit_func(struct i2c_adapter *adap)
604 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
605 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
606 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
607 I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
611 /* -----exported algorithm data: ------------------------------------- */
613 static const struct i2c_algorithm i2c_bit_algo = {
614 .master_xfer = bit_xfer,
615 .functionality = bit_func,
619 * registering functions to load algorithms at runtime
621 static int __i2c_bit_add_bus(struct i2c_adapter *adap,
622 int (*add_adapter)(struct i2c_adapter *))
624 struct i2c_algo_bit_data *bit_adap = adap->algo_data;
628 ret = test_bus(adap);
629 if (bit_test >= 2 && ret < 0)
633 /* register new adapter to i2c module... */
634 adap->algo = &i2c_bit_algo;
637 ret = add_adapter(adap);
641 /* Complain if SCL can't be read */
642 if (bit_adap->getscl == NULL) {
643 dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
644 dev_warn(&adap->dev, "Bus may be unreliable\n");
649 int i2c_bit_add_bus(struct i2c_adapter *adap)
651 return __i2c_bit_add_bus(adap, i2c_add_adapter);
653 EXPORT_SYMBOL(i2c_bit_add_bus);
655 int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
657 return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
659 EXPORT_SYMBOL(i2c_bit_add_numbered_bus);
661 MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>");
662 MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
663 MODULE_LICENSE("GPL");