2 * Renesas Solutions Highlander FPGA I2C/SMBus support.
4 * Supported devices: R0P7780LC0011RL, R0P7785LC0011RL
6 * Copyright (C) 2008 Paul Mundt
7 * Copyright (C) 2008 Renesas Solutions Corp.
8 * Copyright (C) 2008 Atom Create Engineering Co., Ltd.
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License version 2. See the file "COPYING" in the main directory
12 * of this archive for more details.
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/completion.h>
21 #include <linux/delay.h>
22 #include <linux/slab.h>
25 #define SMCR_START (1 << 0)
26 #define SMCR_IRIC (1 << 1)
27 #define SMCR_BBSY (1 << 2)
28 #define SMCR_ACKE (1 << 3)
29 #define SMCR_RST (1 << 4)
30 #define SMCR_IEIC (1 << 6)
35 #define SMMR_MODE0 (1 << 0)
36 #define SMMR_MODE1 (1 << 1)
37 #define SMMR_CAP (1 << 3)
38 #define SMMR_TMMD (1 << 4)
39 #define SMMR_SP (1 << 7)
44 struct highlander_i2c_dev {
47 struct i2c_adapter adapter;
48 struct completion cmd_complete;
49 unsigned long last_read_time;
55 static int iic_force_poll, iic_force_normal;
56 static int iic_timeout = 1000, iic_read_delay;
58 static inline void highlander_i2c_irq_enable(struct highlander_i2c_dev *dev)
60 iowrite16(ioread16(dev->base + SMCR) | SMCR_IEIC, dev->base + SMCR);
63 static inline void highlander_i2c_irq_disable(struct highlander_i2c_dev *dev)
65 iowrite16(ioread16(dev->base + SMCR) & ~SMCR_IEIC, dev->base + SMCR);
68 static inline void highlander_i2c_start(struct highlander_i2c_dev *dev)
70 iowrite16(ioread16(dev->base + SMCR) | SMCR_START, dev->base + SMCR);
73 static inline void highlander_i2c_done(struct highlander_i2c_dev *dev)
75 iowrite16(ioread16(dev->base + SMCR) | SMCR_IRIC, dev->base + SMCR);
78 static void highlander_i2c_setup(struct highlander_i2c_dev *dev)
82 smmr = ioread16(dev->base + SMMR);
90 iowrite16(smmr, dev->base + SMMR);
93 static void smbus_write_data(u8 *src, u16 *dst, int len)
95 for (; len > 1; len -= 2) {
96 *dst++ = be16_to_cpup((__be16 *)src);
104 static void smbus_read_data(u16 *src, u8 *dst, int len)
106 for (; len > 1; len -= 2) {
107 *(__be16 *)dst = cpu_to_be16p(src++);
115 static void highlander_i2c_command(struct highlander_i2c_dev *dev,
119 u16 cmd = (command << 8) | command;
121 for (i = 0; i < len; i += 2) {
124 iowrite16(cmd, dev->base + SMSADR + i);
125 dev_dbg(dev->dev, "command data[%x] 0x%04x\n", i/2, cmd);
129 static int highlander_i2c_wait_for_bbsy(struct highlander_i2c_dev *dev)
131 unsigned long timeout;
133 timeout = jiffies + msecs_to_jiffies(iic_timeout);
134 while (ioread16(dev->base + SMCR) & SMCR_BBSY) {
135 if (time_after(jiffies, timeout)) {
136 dev_warn(dev->dev, "timeout waiting for bus ready\n");
146 static int highlander_i2c_reset(struct highlander_i2c_dev *dev)
148 iowrite16(ioread16(dev->base + SMCR) | SMCR_RST, dev->base + SMCR);
149 return highlander_i2c_wait_for_bbsy(dev);
152 static int highlander_i2c_wait_for_ack(struct highlander_i2c_dev *dev)
154 u16 tmp = ioread16(dev->base + SMCR);
156 if ((tmp & (SMCR_IRIC | SMCR_ACKE)) == SMCR_ACKE) {
157 dev_warn(dev->dev, "ack abnormality\n");
158 return highlander_i2c_reset(dev);
164 static irqreturn_t highlander_i2c_irq(int irq, void *dev_id)
166 struct highlander_i2c_dev *dev = dev_id;
168 highlander_i2c_done(dev);
169 complete(&dev->cmd_complete);
174 static void highlander_i2c_poll(struct highlander_i2c_dev *dev)
176 unsigned long timeout;
179 timeout = jiffies + msecs_to_jiffies(iic_timeout);
181 smcr = ioread16(dev->base + SMCR);
184 * Don't bother checking ACKE here, this and the reset
185 * are handled in highlander_i2c_wait_xfer_done() when
186 * waiting for the ACK.
189 if (smcr & SMCR_IRIC)
191 if (time_after(jiffies, timeout))
198 dev_err(dev->dev, "polling timed out\n");
201 static inline int highlander_i2c_wait_xfer_done(struct highlander_i2c_dev *dev)
204 wait_for_completion_timeout(&dev->cmd_complete,
205 msecs_to_jiffies(iic_timeout));
207 /* busy looping, the IRQ of champions */
208 highlander_i2c_poll(dev);
210 return highlander_i2c_wait_for_ack(dev);
213 static int highlander_i2c_read(struct highlander_i2c_dev *dev)
218 if (highlander_i2c_wait_for_bbsy(dev))
221 highlander_i2c_start(dev);
223 if (highlander_i2c_wait_xfer_done(dev)) {
224 dev_err(dev->dev, "Arbitration loss\n");
229 * The R0P7780LC0011RL FPGA needs a significant delay between
230 * data read cycles, otherwise the transciever gets confused and
231 * garbage is returned when the read is subsequently aborted.
233 * It is not sufficient to wait for BBSY.
235 * While this generally only applies to the older SH7780-based
236 * Highlanders, the same issue can be observed on SH7785 ones,
237 * albeit less frequently. SH7780-based Highlanders may need
238 * this to be as high as 1000 ms.
240 if (iic_read_delay && time_before(jiffies, dev->last_read_time +
241 msecs_to_jiffies(iic_read_delay)))
242 msleep(jiffies_to_msecs((dev->last_read_time +
243 msecs_to_jiffies(iic_read_delay)) - jiffies));
245 cnt = (dev->buf_len + 1) >> 1;
246 for (i = 0; i < cnt; i++) {
247 data[i] = ioread16(dev->base + SMTRDR + (i * sizeof(u16)));
248 dev_dbg(dev->dev, "read data[%x] 0x%04x\n", i, data[i]);
251 smbus_read_data(data, dev->buf, dev->buf_len);
253 dev->last_read_time = jiffies;
258 static int highlander_i2c_write(struct highlander_i2c_dev *dev)
263 smbus_write_data(dev->buf, data, dev->buf_len);
265 cnt = (dev->buf_len + 1) >> 1;
266 for (i = 0; i < cnt; i++) {
267 iowrite16(data[i], dev->base + SMTRDR + (i * sizeof(u16)));
268 dev_dbg(dev->dev, "write data[%x] 0x%04x\n", i, data[i]);
271 if (highlander_i2c_wait_for_bbsy(dev))
274 highlander_i2c_start(dev);
276 return highlander_i2c_wait_xfer_done(dev);
279 static int highlander_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr,
280 unsigned short flags, char read_write,
281 u8 command, int size,
282 union i2c_smbus_data *data)
284 struct highlander_i2c_dev *dev = i2c_get_adapdata(adap);
285 int read = read_write & I2C_SMBUS_READ;
288 init_completion(&dev->cmd_complete);
290 dev_dbg(dev->dev, "addr %04x, command %02x, read_write %d, size %d\n",
291 addr, command, read_write, size);
294 * Set up the buffer and transfer size
297 case I2C_SMBUS_BYTE_DATA:
298 dev->buf = &data->byte;
301 case I2C_SMBUS_I2C_BLOCK_DATA:
302 dev->buf = &data->block[1];
303 dev->buf_len = data->block[0];
306 dev_err(dev->dev, "unsupported command %d\n", size);
311 * Encode the mode setting
313 tmp = ioread16(dev->base + SMMR);
314 tmp &= ~(SMMR_MODE0 | SMMR_MODE1);
316 switch (dev->buf_len) {
327 tmp |= (SMMR_MODE0 | SMMR_MODE1);
330 dev_err(dev->dev, "unsupported xfer size %d\n", dev->buf_len);
334 iowrite16(tmp, dev->base + SMMR);
336 /* Ensure we're in a sane state */
337 highlander_i2c_done(dev);
339 /* Set slave address */
340 iowrite16((addr << 1) | read, dev->base + SMSMADR);
342 highlander_i2c_command(dev, command, dev->buf_len);
345 return highlander_i2c_read(dev);
347 return highlander_i2c_write(dev);
350 static u32 highlander_i2c_func(struct i2c_adapter *adapter)
352 return I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK;
355 static const struct i2c_algorithm highlander_i2c_algo = {
356 .smbus_xfer = highlander_i2c_smbus_xfer,
357 .functionality = highlander_i2c_func,
360 static int __devinit highlander_i2c_probe(struct platform_device *pdev)
362 struct highlander_i2c_dev *dev;
363 struct i2c_adapter *adap;
364 struct resource *res;
367 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
368 if (unlikely(!res)) {
369 dev_err(&pdev->dev, "no mem resource\n");
373 dev = kzalloc(sizeof(struct highlander_i2c_dev), GFP_KERNEL);
377 dev->base = ioremap_nocache(res->start, resource_size(res));
378 if (unlikely(!dev->base)) {
383 dev->dev = &pdev->dev;
384 platform_set_drvdata(pdev, dev);
386 dev->irq = platform_get_irq(pdev, 0);
391 ret = request_irq(dev->irq, highlander_i2c_irq, IRQF_DISABLED,
396 highlander_i2c_irq_enable(dev);
398 dev_notice(&pdev->dev, "no IRQ, using polling mode\n");
399 highlander_i2c_irq_disable(dev);
402 dev->last_read_time = jiffies; /* initial read jiffies */
404 highlander_i2c_setup(dev);
406 adap = &dev->adapter;
407 i2c_set_adapdata(adap, dev);
408 adap->owner = THIS_MODULE;
409 adap->class = I2C_CLASS_HWMON;
410 strlcpy(adap->name, "HL FPGA I2C adapter", sizeof(adap->name));
411 adap->algo = &highlander_i2c_algo;
412 adap->dev.parent = &pdev->dev;
418 ret = highlander_i2c_reset(dev);
420 dev_err(&pdev->dev, "controller didn't come up\n");
424 ret = i2c_add_numbered_adapter(adap);
426 dev_err(&pdev->dev, "failure adding adapter\n");
434 free_irq(dev->irq, dev);
440 platform_set_drvdata(pdev, NULL);
445 static int __devexit highlander_i2c_remove(struct platform_device *pdev)
447 struct highlander_i2c_dev *dev = platform_get_drvdata(pdev);
449 i2c_del_adapter(&dev->adapter);
452 free_irq(dev->irq, dev);
457 platform_set_drvdata(pdev, NULL);
462 static struct platform_driver highlander_i2c_driver = {
464 .name = "i2c-highlander",
465 .owner = THIS_MODULE,
468 .probe = highlander_i2c_probe,
469 .remove = __devexit_p(highlander_i2c_remove),
472 static int __init highlander_i2c_init(void)
474 return platform_driver_register(&highlander_i2c_driver);
477 static void __exit highlander_i2c_exit(void)
479 platform_driver_unregister(&highlander_i2c_driver);
482 module_init(highlander_i2c_init);
483 module_exit(highlander_i2c_exit);
485 MODULE_AUTHOR("Paul Mundt");
486 MODULE_DESCRIPTION("Renesas Highlander FPGA I2C/SMBus adapter");
487 MODULE_LICENSE("GPL v2");
489 module_param(iic_force_poll, bool, 0);
490 module_param(iic_force_normal, bool, 0);
491 module_param(iic_timeout, int, 0);
492 module_param(iic_read_delay, int, 0);
494 MODULE_PARM_DESC(iic_force_poll, "Force polling mode");
495 MODULE_PARM_DESC(iic_force_normal,
496 "Force normal mode (100 kHz), default is fast mode (400 kHz)");
497 MODULE_PARM_DESC(iic_timeout, "Set timeout value in msecs (default 1000 ms)");
498 MODULE_PARM_DESC(iic_read_delay,
499 "Delay between data read cycles (default 0 ms)");