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i2c: meson: don't create separate token chain just for the stop command
[karo-tx-linux.git] / drivers / i2c / busses / i2c-meson.c
1 /*
2  * I2C bus driver for Amlogic Meson SoCs
3  *
4  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/clk.h>
12 #include <linux/completion.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/of.h>
19 #include <linux/platform_device.h>
20 #include <linux/types.h>
21
22 /* Meson I2C register map */
23 #define REG_CTRL                0x00
24 #define REG_SLAVE_ADDR          0x04
25 #define REG_TOK_LIST0           0x08
26 #define REG_TOK_LIST1           0x0c
27 #define REG_TOK_WDATA0          0x10
28 #define REG_TOK_WDATA1          0x14
29 #define REG_TOK_RDATA0          0x18
30 #define REG_TOK_RDATA1          0x1c
31
32 /* Control register fields */
33 #define REG_CTRL_START          BIT(0)
34 #define REG_CTRL_ACK_IGNORE     BIT(1)
35 #define REG_CTRL_STATUS         BIT(2)
36 #define REG_CTRL_ERROR          BIT(3)
37 #define REG_CTRL_CLKDIV_SHIFT   12
38 #define REG_CTRL_CLKDIV_MASK    GENMASK(21, 12)
39 #define REG_CTRL_CLKDIVEXT_SHIFT 28
40 #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28)
41
42 #define I2C_TIMEOUT_MS          500
43
44 enum {
45         TOKEN_END = 0,
46         TOKEN_START,
47         TOKEN_SLAVE_ADDR_WRITE,
48         TOKEN_SLAVE_ADDR_READ,
49         TOKEN_DATA,
50         TOKEN_DATA_LAST,
51         TOKEN_STOP,
52 };
53
54 enum {
55         STATE_IDLE,
56         STATE_READ,
57         STATE_WRITE,
58 };
59
60 /**
61  * struct meson_i2c - Meson I2C device private data
62  *
63  * @adap:       I2C adapter instance
64  * @dev:        Pointer to device structure
65  * @regs:       Base address of the device memory mapped registers
66  * @clk:        Pointer to clock structure
67  * @irq:        IRQ number
68  * @msg:        Pointer to the current I2C message
69  * @state:      Current state in the driver state machine
70  * @last:       Flag set for the last message in the transfer
71  * @count:      Number of bytes to be sent/received in current transfer
72  * @pos:        Current position in the send/receive buffer
73  * @error:      Flag set when an error is received
74  * @lock:       To avoid race conditions between irq handler and xfer code
75  * @done:       Completion used to wait for transfer termination
76  * @tokens:     Sequence of tokens to be written to the device
77  * @num_tokens: Number of tokens
78  */
79 struct meson_i2c {
80         struct i2c_adapter      adap;
81         struct device           *dev;
82         void __iomem            *regs;
83         struct clk              *clk;
84
85         struct i2c_msg          *msg;
86         int                     state;
87         bool                    last;
88         int                     count;
89         int                     pos;
90         int                     error;
91
92         spinlock_t              lock;
93         struct completion       done;
94         u32                     tokens[2];
95         int                     num_tokens;
96 };
97
98 static void meson_i2c_set_mask(struct meson_i2c *i2c, int reg, u32 mask,
99                                u32 val)
100 {
101         u32 data;
102
103         data = readl(i2c->regs + reg);
104         data &= ~mask;
105         data |= val & mask;
106         writel(data, i2c->regs + reg);
107 }
108
109 static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
110 {
111         i2c->tokens[0] = 0;
112         i2c->tokens[1] = 0;
113         i2c->num_tokens = 0;
114 }
115
116 static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
117 {
118         if (i2c->num_tokens < 8)
119                 i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4);
120         else
121                 i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4);
122
123         i2c->num_tokens++;
124 }
125
126 static void meson_i2c_write_tokens(struct meson_i2c *i2c)
127 {
128         writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0);
129         writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1);
130 }
131
132 static void meson_i2c_set_clk_div(struct meson_i2c *i2c, unsigned int freq)
133 {
134         unsigned long clk_rate = clk_get_rate(i2c->clk);
135         unsigned int div;
136
137         div = DIV_ROUND_UP(clk_rate, freq * 4);
138
139         /* clock divider has 12 bits */
140         if (div >= (1 << 12)) {
141                 dev_err(i2c->dev, "requested bus frequency too low\n");
142                 div = (1 << 12) - 1;
143         }
144
145         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK,
146                            (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT);
147
148         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK,
149                            (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);
150
151         dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__,
152                 clk_rate, freq, div);
153 }
154
155 static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len)
156 {
157         u32 rdata0, rdata1;
158         int i;
159
160         rdata0 = readl(i2c->regs + REG_TOK_RDATA0);
161         rdata1 = readl(i2c->regs + REG_TOK_RDATA1);
162
163         dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
164                 rdata0, rdata1, len);
165
166         for (i = 0; i < min(4, len); i++)
167                 *buf++ = (rdata0 >> i * 8) & 0xff;
168
169         for (i = 4; i < min(8, len); i++)
170                 *buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
171 }
172
173 static void meson_i2c_put_data(struct meson_i2c *i2c, char *buf, int len)
174 {
175         u32 wdata0 = 0, wdata1 = 0;
176         int i;
177
178         for (i = 0; i < min(4, len); i++)
179                 wdata0 |= *buf++ << (i * 8);
180
181         for (i = 4; i < min(8, len); i++)
182                 wdata1 |= *buf++ << ((i - 4) * 8);
183
184         writel(wdata0, i2c->regs + REG_TOK_WDATA0);
185         writel(wdata1, i2c->regs + REG_TOK_WDATA1);
186
187         dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
188                 wdata0, wdata1, len);
189 }
190
191 static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
192 {
193         bool write = !(i2c->msg->flags & I2C_M_RD);
194         int i;
195
196         i2c->count = min(i2c->msg->len - i2c->pos, 8);
197
198         for (i = 0; i < i2c->count - 1; i++)
199                 meson_i2c_add_token(i2c, TOKEN_DATA);
200
201         if (i2c->count) {
202                 if (write || i2c->pos + i2c->count < i2c->msg->len)
203                         meson_i2c_add_token(i2c, TOKEN_DATA);
204                 else
205                         meson_i2c_add_token(i2c, TOKEN_DATA_LAST);
206         }
207
208         if (write)
209                 meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
210
211         if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len)
212                 meson_i2c_add_token(i2c, TOKEN_STOP);
213 }
214
215 static irqreturn_t meson_i2c_irq(int irqno, void *dev_id)
216 {
217         struct meson_i2c *i2c = dev_id;
218         unsigned int ctrl;
219
220         spin_lock(&i2c->lock);
221
222         meson_i2c_reset_tokens(i2c);
223         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
224         ctrl = readl(i2c->regs + REG_CTRL);
225
226         dev_dbg(i2c->dev, "irq: state %d, pos %d, count %d, ctrl %08x\n",
227                 i2c->state, i2c->pos, i2c->count, ctrl);
228
229         if (i2c->state == STATE_IDLE) {
230                 spin_unlock(&i2c->lock);
231                 return IRQ_NONE;
232         }
233
234         if (ctrl & REG_CTRL_ERROR) {
235                 /*
236                  * The bit is set when the IGNORE_NAK bit is cleared
237                  * and the device didn't respond. In this case, the
238                  * I2C controller automatically generates a STOP
239                  * condition.
240                  */
241                 dev_dbg(i2c->dev, "error bit set\n");
242                 i2c->error = -ENXIO;
243                 i2c->state = STATE_IDLE;
244                 complete(&i2c->done);
245                 goto out;
246         }
247
248         switch (i2c->state) {
249         case STATE_READ:
250                 if (i2c->count > 0) {
251                         meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos,
252                                            i2c->count);
253                         i2c->pos += i2c->count;
254                 }
255
256                 if (i2c->pos >= i2c->msg->len) {
257                         i2c->state = STATE_IDLE;
258                         complete(&i2c->done);
259                         break;
260                 }
261
262                 meson_i2c_prepare_xfer(i2c);
263                 break;
264         case STATE_WRITE:
265                 i2c->pos += i2c->count;
266
267                 if (i2c->pos >= i2c->msg->len) {
268                         i2c->state = STATE_IDLE;
269                         complete(&i2c->done);
270                         break;
271                 }
272
273                 meson_i2c_prepare_xfer(i2c);
274                 break;
275         }
276
277 out:
278         if (i2c->state != STATE_IDLE) {
279                 /* Restart the processing */
280                 meson_i2c_write_tokens(i2c);
281                 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START,
282                                    REG_CTRL_START);
283         }
284
285         spin_unlock(&i2c->lock);
286
287         return IRQ_HANDLED;
288 }
289
290 static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg)
291 {
292         int token;
293
294         token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ :
295                 TOKEN_SLAVE_ADDR_WRITE;
296
297         writel(msg->addr << 1, i2c->regs + REG_SLAVE_ADDR);
298         meson_i2c_add_token(i2c, TOKEN_START);
299         meson_i2c_add_token(i2c, token);
300 }
301
302 static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg,
303                               int last)
304 {
305         unsigned long time_left, flags;
306         int ret = 0;
307
308         i2c->msg = msg;
309         i2c->last = last;
310         i2c->pos = 0;
311         i2c->count = 0;
312         i2c->error = 0;
313
314         meson_i2c_reset_tokens(i2c);
315
316         flags = (msg->flags & I2C_M_IGNORE_NAK) ? REG_CTRL_ACK_IGNORE : 0;
317         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_ACK_IGNORE, flags);
318
319         if (!(msg->flags & I2C_M_NOSTART))
320                 meson_i2c_do_start(i2c, msg);
321
322         i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
323         meson_i2c_prepare_xfer(i2c);
324         meson_i2c_write_tokens(i2c);
325         reinit_completion(&i2c->done);
326
327         /* Start the transfer */
328         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START);
329
330         time_left = msecs_to_jiffies(I2C_TIMEOUT_MS);
331         time_left = wait_for_completion_timeout(&i2c->done, time_left);
332
333         /*
334          * Protect access to i2c struct and registers from interrupt
335          * handlers triggered by a transfer terminated after the
336          * timeout period
337          */
338         spin_lock_irqsave(&i2c->lock, flags);
339
340         /* Abort any active operation */
341         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
342
343         if (!time_left) {
344                 i2c->state = STATE_IDLE;
345                 ret = -ETIMEDOUT;
346         }
347
348         if (i2c->error)
349                 ret = i2c->error;
350
351         spin_unlock_irqrestore(&i2c->lock, flags);
352
353         return ret;
354 }
355
356 static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
357                           int num)
358 {
359         struct meson_i2c *i2c = adap->algo_data;
360         int i, ret = 0;
361
362         clk_enable(i2c->clk);
363
364         for (i = 0; i < num; i++) {
365                 ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1);
366                 if (ret)
367                         break;
368         }
369
370         clk_disable(i2c->clk);
371
372         return ret ?: i;
373 }
374
375 static u32 meson_i2c_func(struct i2c_adapter *adap)
376 {
377         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
378 }
379
380 static const struct i2c_algorithm meson_i2c_algorithm = {
381         .master_xfer    = meson_i2c_xfer,
382         .functionality  = meson_i2c_func,
383 };
384
385 static int meson_i2c_probe(struct platform_device *pdev)
386 {
387         struct device_node *np = pdev->dev.of_node;
388         struct meson_i2c *i2c;
389         struct resource *mem;
390         struct i2c_timings timings;
391         int irq, ret = 0;
392
393         i2c = devm_kzalloc(&pdev->dev, sizeof(struct meson_i2c), GFP_KERNEL);
394         if (!i2c)
395                 return -ENOMEM;
396
397         i2c_parse_fw_timings(&pdev->dev, &timings, true);
398
399         i2c->dev = &pdev->dev;
400         platform_set_drvdata(pdev, i2c);
401
402         spin_lock_init(&i2c->lock);
403         init_completion(&i2c->done);
404
405         i2c->clk = devm_clk_get(&pdev->dev, NULL);
406         if (IS_ERR(i2c->clk)) {
407                 dev_err(&pdev->dev, "can't get device clock\n");
408                 return PTR_ERR(i2c->clk);
409         }
410
411         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
412         i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
413         if (IS_ERR(i2c->regs))
414                 return PTR_ERR(i2c->regs);
415
416         irq = platform_get_irq(pdev, 0);
417         if (irq < 0) {
418                 dev_err(&pdev->dev, "can't find IRQ\n");
419                 return irq;
420         }
421
422         ret = devm_request_irq(&pdev->dev, irq, meson_i2c_irq, 0, NULL, i2c);
423         if (ret < 0) {
424                 dev_err(&pdev->dev, "can't request IRQ\n");
425                 return ret;
426         }
427
428         ret = clk_prepare(i2c->clk);
429         if (ret < 0) {
430                 dev_err(&pdev->dev, "can't prepare clock\n");
431                 return ret;
432         }
433
434         strlcpy(i2c->adap.name, "Meson I2C adapter",
435                 sizeof(i2c->adap.name));
436         i2c->adap.owner = THIS_MODULE;
437         i2c->adap.algo = &meson_i2c_algorithm;
438         i2c->adap.dev.parent = &pdev->dev;
439         i2c->adap.dev.of_node = np;
440         i2c->adap.algo_data = i2c;
441
442         /*
443          * A transfer is triggered when START bit changes from 0 to 1.
444          * Ensure that the bit is set to 0 after probe
445          */
446         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
447
448         ret = i2c_add_adapter(&i2c->adap);
449         if (ret < 0) {
450                 clk_unprepare(i2c->clk);
451                 return ret;
452         }
453
454         meson_i2c_set_clk_div(i2c, timings.bus_freq_hz);
455
456         return 0;
457 }
458
459 static int meson_i2c_remove(struct platform_device *pdev)
460 {
461         struct meson_i2c *i2c = platform_get_drvdata(pdev);
462
463         i2c_del_adapter(&i2c->adap);
464         clk_unprepare(i2c->clk);
465
466         return 0;
467 }
468
469 static const struct of_device_id meson_i2c_match[] = {
470         { .compatible = "amlogic,meson6-i2c" },
471         { .compatible = "amlogic,meson-gxbb-i2c" },
472         { },
473 };
474 MODULE_DEVICE_TABLE(of, meson_i2c_match);
475
476 static struct platform_driver meson_i2c_driver = {
477         .probe   = meson_i2c_probe,
478         .remove  = meson_i2c_remove,
479         .driver  = {
480                 .name  = "meson-i2c",
481                 .of_match_table = meson_i2c_match,
482         },
483 };
484
485 module_platform_driver(meson_i2c_driver);
486
487 MODULE_DESCRIPTION("Amlogic Meson I2C Bus driver");
488 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
489 MODULE_LICENSE("GPL v2");