2 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
3 Philip Edelbrock <phil@netroedge.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
19 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
20 ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800
24 Note: we assume there can only be one device, with one or more
26 The device can register multiple i2c_adapters (up to PIIX4_MAX_ADAPTERS).
27 For devices supporting multiple ports the i2c_adapter should provide
28 an i2c_algorithm to access them.
31 #include <linux/module.h>
32 #include <linux/moduleparam.h>
33 #include <linux/pci.h>
34 #include <linux/kernel.h>
35 #include <linux/delay.h>
36 #include <linux/stddef.h>
37 #include <linux/ioport.h>
38 #include <linux/i2c.h>
39 #include <linux/slab.h>
40 #include <linux/dmi.h>
41 #include <linux/acpi.h>
43 #include <linux/mutex.h>
46 /* PIIX4 SMBus address offsets */
47 #define SMBHSTSTS (0 + piix4_smba)
48 #define SMBHSLVSTS (1 + piix4_smba)
49 #define SMBHSTCNT (2 + piix4_smba)
50 #define SMBHSTCMD (3 + piix4_smba)
51 #define SMBHSTADD (4 + piix4_smba)
52 #define SMBHSTDAT0 (5 + piix4_smba)
53 #define SMBHSTDAT1 (6 + piix4_smba)
54 #define SMBBLKDAT (7 + piix4_smba)
55 #define SMBSLVCNT (8 + piix4_smba)
56 #define SMBSHDWCMD (9 + piix4_smba)
57 #define SMBSLVEVT (0xA + piix4_smba)
58 #define SMBSLVDAT (0xC + piix4_smba)
60 /* count for request_region */
63 /* PCI Address Constants */
65 #define SMBHSTCFG 0x0D2
67 #define SMBSHDW1 0x0D4
68 #define SMBSHDW2 0x0D5
72 #define MAX_TIMEOUT 500
76 #define PIIX4_QUICK 0x00
77 #define PIIX4_BYTE 0x04
78 #define PIIX4_BYTE_DATA 0x08
79 #define PIIX4_WORD_DATA 0x0C
80 #define PIIX4_BLOCK_DATA 0x14
82 /* Multi-port constants */
83 #define PIIX4_MAX_ADAPTERS 4
86 #define SB800_PIIX4_SMB_IDX 0xcd6
88 /* SB800 port is selected by bits 2:1 of the smb_en register (0x2c) */
89 #define SB800_PIIX4_PORT_IDX 0x2c
90 #define SB800_PIIX4_PORT_IDX_MASK 0x06
92 /* insmod parameters */
94 /* If force is set to anything different from 0, we forcibly enable the
97 module_param (force, int, 0);
98 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
100 /* If force_addr is set to anything different from 0, we forcibly enable
101 the PIIX4 at the given address. VERY DANGEROUS! */
102 static int force_addr;
103 module_param (force_addr, int, 0);
104 MODULE_PARM_DESC(force_addr,
105 "Forcibly enable the PIIX4 at the given address. "
106 "EXTREMELY DANGEROUS!");
108 static int srvrworks_csb5_delay;
109 static struct pci_driver piix4_driver;
111 static const struct dmi_system_id piix4_dmi_blacklist[] = {
113 .ident = "Sapphire AM2RD790",
115 DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."),
116 DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"),
120 .ident = "DFI Lanparty UT 790FX",
122 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."),
123 DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"),
129 /* The IBM entry is in a separate table because we only check it
130 on Intel-based systems */
131 static const struct dmi_system_id piix4_dmi_ibm[] = {
134 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
140 static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = {
141 "SDA0", "SDA2", "SDA3", "SDA4"
143 static const char *piix4_aux_port_name_sb800 = "SDA1";
145 struct i2c_piix4_adapdata {
154 static int piix4_setup(struct pci_dev *PIIX4_dev,
155 const struct pci_device_id *id)
158 unsigned short piix4_smba;
160 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
161 (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5))
162 srvrworks_csb5_delay = 1;
164 /* On some motherboards, it was reported that accessing the SMBus
165 caused severe hardware problems */
166 if (dmi_check_system(piix4_dmi_blacklist)) {
167 dev_err(&PIIX4_dev->dev,
168 "Accessing the SMBus on this system is unsafe!\n");
172 /* Don't access SMBus on IBM systems which get corrupted eeproms */
173 if (dmi_check_system(piix4_dmi_ibm) &&
174 PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
175 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
176 "may corrupt your serial eeprom! Refusing to load "
181 /* Determine the address of the SMBus areas */
183 piix4_smba = force_addr & 0xfff0;
186 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
187 piix4_smba &= 0xfff0;
188 if(piix4_smba == 0) {
189 dev_err(&PIIX4_dev->dev, "SMBus base address "
190 "uninitialized - upgrade BIOS or use "
191 "force_addr=0xaddr\n");
196 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
199 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
200 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
205 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
207 /* If force_addr is set, we program the new address here. Just to make
208 sure, we disable the PIIX4 first. */
210 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
211 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
212 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
213 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
214 "new address %04x!\n", piix4_smba);
215 } else if ((temp & 1) == 0) {
217 /* This should never need to be done, but has been
218 * noted that many Dell machines have the SMBus
219 * interface on the PIIX4 disabled!? NOTE: This assumes
220 * I/O space and other allocations WERE done by the
221 * Bios! Don't complain if your hardware does weird
222 * things after enabling this. :') Check for Bios
223 * updates before resorting to this.
225 pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
227 dev_notice(&PIIX4_dev->dev,
228 "WARNING: SMBus interface has been FORCEFULLY ENABLED!\n");
230 dev_err(&PIIX4_dev->dev,
231 "SMBus Host Controller not enabled!\n");
232 release_region(piix4_smba, SMBIOSIZE);
237 if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
238 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
239 else if ((temp & 0x0E) == 0)
240 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
242 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
243 "(or code out of date)!\n");
245 pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
246 dev_info(&PIIX4_dev->dev,
247 "SMBus Host Controller at 0x%x, revision %d\n",
253 static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
254 const struct pci_device_id *id, u8 aux)
256 unsigned short piix4_smba;
257 u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status;
258 u8 i2ccfg, i2ccfg_offset = 0x10;
260 /* SB800 and later SMBus does not support forcing address */
261 if (force || force_addr) {
262 dev_err(&PIIX4_dev->dev, "SMBus does not support "
263 "forcing address!\n");
267 /* Determine the address of the SMBus areas */
268 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
269 PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS &&
270 PIIX4_dev->revision >= 0x41) ||
271 (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
272 PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS &&
273 PIIX4_dev->revision >= 0x49))
276 smb_en = (aux) ? 0x28 : 0x2c;
278 outb_p(smb_en, SB800_PIIX4_SMB_IDX);
279 smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
280 outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
281 smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
284 smb_en_status = smba_en_lo & 0x10;
285 piix4_smba = smba_en_hi << 8;
289 smb_en_status = smba_en_lo & 0x01;
290 piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0;
293 if (!smb_en_status) {
294 dev_err(&PIIX4_dev->dev,
295 "SMBus Host Controller not enabled!\n");
299 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
302 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
303 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
308 /* Aux SMBus does not support IRQ information */
310 dev_info(&PIIX4_dev->dev,
311 "Auxiliary SMBus Host Controller at 0x%x\n",
316 /* Request the SMBus I2C bus config region */
317 if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) {
318 dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region "
319 "0x%x already in use!\n", piix4_smba + i2ccfg_offset);
320 release_region(piix4_smba, SMBIOSIZE);
323 i2ccfg = inb_p(piix4_smba + i2ccfg_offset);
324 release_region(piix4_smba + i2ccfg_offset, 1);
327 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
329 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
331 dev_info(&PIIX4_dev->dev,
332 "SMBus Host Controller at 0x%x, revision %d\n",
333 piix4_smba, i2ccfg >> 4);
338 static int piix4_setup_aux(struct pci_dev *PIIX4_dev,
339 const struct pci_device_id *id,
340 unsigned short base_reg_addr)
342 /* Set up auxiliary SMBus controllers found on some
343 * AMD chipsets e.g. SP5100 (SB700 derivative) */
345 unsigned short piix4_smba;
347 /* Read address of auxiliary SMBus controller */
348 pci_read_config_word(PIIX4_dev, base_reg_addr, &piix4_smba);
349 if ((piix4_smba & 1) == 0) {
350 dev_dbg(&PIIX4_dev->dev,
351 "Auxiliary SMBus controller not enabled\n");
355 piix4_smba &= 0xfff0;
356 if (piix4_smba == 0) {
357 dev_dbg(&PIIX4_dev->dev,
358 "Auxiliary SMBus base address uninitialized\n");
362 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
365 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
366 dev_err(&PIIX4_dev->dev, "Auxiliary SMBus region 0x%x "
367 "already in use!\n", piix4_smba);
371 dev_info(&PIIX4_dev->dev,
372 "Auxiliary SMBus Host Controller at 0x%x\n",
378 static int piix4_transaction(struct i2c_adapter *piix4_adapter)
380 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(piix4_adapter);
381 unsigned short piix4_smba = adapdata->smba;
386 dev_dbg(&piix4_adapter->dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
387 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
388 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
391 /* Make sure the SMBus host is ready to start transmitting */
392 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
393 dev_dbg(&piix4_adapter->dev, "SMBus busy (%02x). "
394 "Resetting...\n", temp);
395 outb_p(temp, SMBHSTSTS);
396 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
397 dev_err(&piix4_adapter->dev, "Failed! (%02x)\n", temp);
400 dev_dbg(&piix4_adapter->dev, "Successful!\n");
404 /* start the transaction by setting bit 6 */
405 outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
407 /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
408 if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */
413 while ((++timeout < MAX_TIMEOUT) &&
414 ((temp = inb_p(SMBHSTSTS)) & 0x01))
417 /* If the SMBus is still busy, we give up */
418 if (timeout == MAX_TIMEOUT) {
419 dev_err(&piix4_adapter->dev, "SMBus Timeout!\n");
425 dev_err(&piix4_adapter->dev, "Error: Failed bus transaction\n");
430 dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be "
431 "locked until next hard reset. (sorry!)\n");
432 /* Clock stops and slave is stuck in mid-transmission */
437 dev_dbg(&piix4_adapter->dev, "Error: no response!\n");
440 if (inb_p(SMBHSTSTS) != 0x00)
441 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
443 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
444 dev_err(&piix4_adapter->dev, "Failed reset at end of "
445 "transaction (%02x)\n", temp);
447 dev_dbg(&piix4_adapter->dev, "Transaction (post): CNT=%02x, CMD=%02x, "
448 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
449 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
454 /* Return negative errno on error. */
455 static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
456 unsigned short flags, char read_write,
457 u8 command, int size, union i2c_smbus_data * data)
459 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
460 unsigned short piix4_smba = adapdata->smba;
465 case I2C_SMBUS_QUICK:
466 outb_p((addr << 1) | read_write,
471 outb_p((addr << 1) | read_write,
473 if (read_write == I2C_SMBUS_WRITE)
474 outb_p(command, SMBHSTCMD);
477 case I2C_SMBUS_BYTE_DATA:
478 outb_p((addr << 1) | read_write,
480 outb_p(command, SMBHSTCMD);
481 if (read_write == I2C_SMBUS_WRITE)
482 outb_p(data->byte, SMBHSTDAT0);
483 size = PIIX4_BYTE_DATA;
485 case I2C_SMBUS_WORD_DATA:
486 outb_p((addr << 1) | read_write,
488 outb_p(command, SMBHSTCMD);
489 if (read_write == I2C_SMBUS_WRITE) {
490 outb_p(data->word & 0xff, SMBHSTDAT0);
491 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
493 size = PIIX4_WORD_DATA;
495 case I2C_SMBUS_BLOCK_DATA:
496 outb_p((addr << 1) | read_write,
498 outb_p(command, SMBHSTCMD);
499 if (read_write == I2C_SMBUS_WRITE) {
500 len = data->block[0];
501 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
503 outb_p(len, SMBHSTDAT0);
504 inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
505 for (i = 1; i <= len; i++)
506 outb_p(data->block[i], SMBBLKDAT);
508 size = PIIX4_BLOCK_DATA;
511 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
515 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
517 status = piix4_transaction(adap);
521 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
527 case PIIX4_BYTE_DATA:
528 data->byte = inb_p(SMBHSTDAT0);
530 case PIIX4_WORD_DATA:
531 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
533 case PIIX4_BLOCK_DATA:
534 data->block[0] = inb_p(SMBHSTDAT0);
535 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
537 inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
538 for (i = 1; i <= data->block[0]; i++)
539 data->block[i] = inb_p(SMBBLKDAT);
546 * Handles access to multiple SMBus ports on the SB800.
547 * The port is selected by bits 2:1 of the smb_en register (0x2c).
548 * Returns negative errno on error.
550 * Note: The selected port must be returned to the initial selection to avoid
551 * problems on certain systems.
553 static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
554 unsigned short flags, char read_write,
555 u8 command, int size, union i2c_smbus_data *data)
557 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
562 mutex_lock(adapdata->mutex);
564 outb_p(SB800_PIIX4_PORT_IDX, SB800_PIIX4_SMB_IDX);
565 smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
567 port = adapdata->port;
568 if ((smba_en_lo & SB800_PIIX4_PORT_IDX_MASK) != (port << 1))
569 outb_p((smba_en_lo & ~SB800_PIIX4_PORT_IDX_MASK) | (port << 1),
570 SB800_PIIX4_SMB_IDX + 1);
572 retval = piix4_access(adap, addr, flags, read_write,
573 command, size, data);
575 outb_p(smba_en_lo, SB800_PIIX4_SMB_IDX + 1);
577 mutex_unlock(adapdata->mutex);
582 static u32 piix4_func(struct i2c_adapter *adapter)
584 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
585 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
586 I2C_FUNC_SMBUS_BLOCK_DATA;
589 static const struct i2c_algorithm smbus_algorithm = {
590 .smbus_xfer = piix4_access,
591 .functionality = piix4_func,
594 static const struct i2c_algorithm piix4_smbus_algorithm_sb800 = {
595 .smbus_xfer = piix4_access_sb800,
596 .functionality = piix4_func,
599 static const struct pci_device_id piix4_ids[] = {
600 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
601 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
602 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
603 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
604 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
605 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
606 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
607 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
608 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) },
609 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
610 PCI_DEVICE_ID_SERVERWORKS_OSB4) },
611 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
612 PCI_DEVICE_ID_SERVERWORKS_CSB5) },
613 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
614 PCI_DEVICE_ID_SERVERWORKS_CSB6) },
615 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
616 PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
617 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
618 PCI_DEVICE_ID_SERVERWORKS_HT1100LD) },
622 MODULE_DEVICE_TABLE (pci, piix4_ids);
624 static struct i2c_adapter *piix4_main_adapters[PIIX4_MAX_ADAPTERS];
625 static struct i2c_adapter *piix4_aux_adapter;
627 static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
628 const char *name, struct i2c_adapter **padap)
630 struct i2c_adapter *adap;
631 struct i2c_piix4_adapdata *adapdata;
634 adap = kzalloc(sizeof(*adap), GFP_KERNEL);
636 release_region(smba, SMBIOSIZE);
640 adap->owner = THIS_MODULE;
641 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
642 adap->algo = &smbus_algorithm;
644 adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL);
645 if (adapdata == NULL) {
647 release_region(smba, SMBIOSIZE);
651 adapdata->smba = smba;
653 /* set up the sysfs linkage to our parent device */
654 adap->dev.parent = &dev->dev;
656 snprintf(adap->name, sizeof(adap->name),
657 "SMBus PIIX4 adapter %s at %04x", name, smba);
659 i2c_set_adapdata(adap, adapdata);
661 retval = i2c_add_adapter(adap);
663 dev_err(&dev->dev, "Couldn't register adapter!\n");
666 release_region(smba, SMBIOSIZE);
674 static int piix4_add_adapters_sb800(struct pci_dev *dev, unsigned short smba)
677 struct i2c_piix4_adapdata *adapdata;
681 mutex = kzalloc(sizeof(*mutex), GFP_KERNEL);
687 for (port = 0; port < PIIX4_MAX_ADAPTERS; port++) {
688 retval = piix4_add_adapter(dev, smba,
689 piix4_main_port_names_sb800[port],
690 &piix4_main_adapters[port]);
694 piix4_main_adapters[port]->algo = &piix4_smbus_algorithm_sb800;
696 adapdata = i2c_get_adapdata(piix4_main_adapters[port]);
697 adapdata->sb800_main = true;
698 adapdata->port = port;
699 adapdata->mutex = mutex;
706 "Error setting up SB800 adapters. Unregistering!\n");
707 while (--port >= 0) {
708 adapdata = i2c_get_adapdata(piix4_main_adapters[port]);
709 if (adapdata->smba) {
710 i2c_del_adapter(piix4_main_adapters[port]);
712 kfree(piix4_main_adapters[port]);
713 piix4_main_adapters[port] = NULL;
722 static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
726 if ((dev->vendor == PCI_VENDOR_ID_ATI &&
727 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
728 dev->revision >= 0x40) ||
729 dev->vendor == PCI_VENDOR_ID_AMD) {
730 if (!request_region(SB800_PIIX4_SMB_IDX, 2, "smba_idx")) {
732 "SMBus base address index region 0x%x already in use!\n",
733 SB800_PIIX4_SMB_IDX);
737 /* base address location etc changed in SB800 */
738 retval = piix4_setup_sb800(dev, id, 0);
740 release_region(SB800_PIIX4_SMB_IDX, 2);
745 * Try to register multiplexed main SMBus adapter,
746 * give up if we can't
748 retval = piix4_add_adapters_sb800(dev, retval);
750 release_region(SB800_PIIX4_SMB_IDX, 2);
754 retval = piix4_setup(dev, id);
758 /* Try to register main SMBus adapter, give up if we can't */
759 retval = piix4_add_adapter(dev, retval, "main",
760 &piix4_main_adapters[0]);
765 /* Check for auxiliary SMBus on some AMD chipsets */
768 if (dev->vendor == PCI_VENDOR_ID_ATI &&
769 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) {
770 if (dev->revision < 0x40) {
771 retval = piix4_setup_aux(dev, id, 0x58);
773 /* SB800 added aux bus too */
774 retval = piix4_setup_sb800(dev, id, 1);
778 if (dev->vendor == PCI_VENDOR_ID_AMD &&
779 dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) {
780 retval = piix4_setup_sb800(dev, id, 1);
784 /* Try to add the aux adapter if it exists,
785 * piix4_add_adapter will clean up if this fails */
786 piix4_add_adapter(dev, retval, piix4_aux_port_name_sb800,
793 static void piix4_adap_remove(struct i2c_adapter *adap)
795 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
797 if (adapdata->smba) {
798 i2c_del_adapter(adap);
799 if (adapdata->port == 0) {
800 release_region(adapdata->smba, SMBIOSIZE);
801 if (adapdata->sb800_main) {
802 kfree(adapdata->mutex);
803 release_region(SB800_PIIX4_SMB_IDX, 2);
811 static void piix4_remove(struct pci_dev *dev)
813 int port = PIIX4_MAX_ADAPTERS;
815 while (--port >= 0) {
816 if (piix4_main_adapters[port]) {
817 piix4_adap_remove(piix4_main_adapters[port]);
818 piix4_main_adapters[port] = NULL;
822 if (piix4_aux_adapter) {
823 piix4_adap_remove(piix4_aux_adapter);
824 piix4_aux_adapter = NULL;
828 static struct pci_driver piix4_driver = {
829 .name = "piix4_smbus",
830 .id_table = piix4_ids,
831 .probe = piix4_probe,
832 .remove = piix4_remove,
835 module_pci_driver(piix4_driver);
837 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
838 "Philip Edelbrock <phil@netroedge.com>");
839 MODULE_DESCRIPTION("PIIX4 SMBus driver");
840 MODULE_LICENSE("GPL");