2 * SuperH Mobile I2C Controller
4 * Copyright (C) 2008 Magnus Damm
6 * Portions of the code based on out-of-tree driver i2c-sh7343.c
7 * Copyright (c) 2006 Carlos Munoz <carlos@kenati.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/platform_device.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/err.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/clk.h>
34 #include <linux/slab.h>
35 #include <linux/i2c/i2c-sh_mobile.h>
37 /* Transmit operation: */
47 /* BUS: S A8 ACK D8(1) ACK P */
48 /* IRQ: DTE WAIT WAIT */
54 /* BUS: S A8 ACK D8(1) ACK D8(2) ACK P */
55 /* IRQ: DTE WAIT WAIT WAIT */
58 /* ICDR: A8 D8(1) D8(2) */
60 /* 3 bytes or more, +---------+ gets repeated */
63 /* Receive operation: */
65 /* 0 byte receive - not supported since slave may hold SDA low */
67 /* 1 byte receive [TX] | [RX] */
68 /* BUS: S A8 ACK | D8(1) ACK P */
69 /* IRQ: DTE WAIT | WAIT DTE */
70 /* ICIC: -DTE | +DTE */
71 /* ICCR: 0x94 0x81 | 0xc0 */
72 /* ICDR: A8 | D8(1) */
74 /* 2 byte receive [TX]| [RX] */
75 /* BUS: S A8 ACK | D8(1) ACK D8(2) ACK P */
76 /* IRQ: DTE WAIT | WAIT WAIT DTE */
77 /* ICIC: -DTE | +DTE */
78 /* ICCR: 0x94 0x81 | 0xc0 */
79 /* ICDR: A8 | D8(1) D8(2) */
81 /* 3 byte receive [TX] | [RX] */
82 /* BUS: S A8 ACK | D8(1) ACK D8(2) ACK D8(3) ACK P */
83 /* IRQ: DTE WAIT | WAIT WAIT WAIT DTE */
84 /* ICIC: -DTE | +DTE */
85 /* ICCR: 0x94 0x81 | 0xc0 */
86 /* ICDR: A8 | D8(1) D8(2) D8(3) */
88 /* 4 bytes or more, this part is repeated +---------+ */
91 /* Interrupt order and BUSY flag */
93 /* SDA ___\___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXAAAAAAAAA___/ */
94 /* SCL \_/1\_/2\_/3\_/4\_/5\_/6\_/7\_/8\___/9\_____/ */
96 /* S D7 D6 D5 D4 D3 D2 D1 D0 P */
98 /* WAIT IRQ ________________________________/ \___________ */
99 /* TACK IRQ ____________________________________/ \_______ */
100 /* DTE IRQ __________________________________________/ \_ */
101 /* AL IRQ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
102 /* _______________________________________________ */
106 enum sh_mobile_i2c_op {
117 struct sh_mobile_i2c_data {
120 struct i2c_adapter adap;
121 unsigned long bus_speed;
129 wait_queue_head_t wait;
135 #define IIC_FLAG_HAS_ICIC67 (1 << 0)
137 #define NORMAL_SPEED 100000 /* FAST_SPEED 400000 */
139 /* Register offsets */
148 #define ICCR_ICE 0x80
149 #define ICCR_RACK 0x40
150 #define ICCR_TRS 0x10
151 #define ICCR_BBSY 0x04
152 #define ICCR_SCP 0x01
154 #define ICSR_SCLM 0x80
155 #define ICSR_SDAM 0x40
157 #define ICSR_BUSY 0x10
159 #define ICSR_TACK 0x04
160 #define ICSR_WAIT 0x02
161 #define ICSR_DTE 0x01
163 #define ICIC_ICCLB8 0x80
164 #define ICIC_ICCHB8 0x40
165 #define ICIC_ALE 0x08
166 #define ICIC_TACKE 0x04
167 #define ICIC_WAITE 0x02
168 #define ICIC_DTEE 0x01
170 static void iic_wr(struct sh_mobile_i2c_data *pd, int offs, unsigned char data)
175 iowrite8(data, pd->reg + offs);
178 static unsigned char iic_rd(struct sh_mobile_i2c_data *pd, int offs)
180 return ioread8(pd->reg + offs);
183 static void iic_set_clr(struct sh_mobile_i2c_data *pd, int offs,
184 unsigned char set, unsigned char clr)
186 iic_wr(pd, offs, (iic_rd(pd, offs) | set) & ~clr);
189 static void activate_ch(struct sh_mobile_i2c_data *pd)
191 unsigned long i2c_clk;
196 /* Wake up device and enable clock */
197 pm_runtime_get_sync(pd->dev);
200 /* Get clock rate after clock is enabled */
201 i2c_clk = clk_get_rate(pd->clk);
203 /* Calculate the value for iccl. From the data sheet:
204 * iccl = (p clock / transfer rate) * (L / (L + H))
205 * where L and H are the SCL low/high ratio (5/4 in this case).
206 * We also round off the result.
209 denom = pd->bus_speed * 9;
210 tmp = num * 10 / denom;
212 pd->iccl = (u_int8_t)((num/denom) + 1);
214 pd->iccl = (u_int8_t)(num/denom);
216 /* one more bit of ICCL in ICIC */
217 if (pd->flags & IIC_FLAG_HAS_ICIC67) {
218 if ((num/denom) > 0xff)
219 pd->icic |= ICIC_ICCLB8;
221 pd->icic &= ~ICIC_ICCLB8;
224 /* Calculate the value for icch. From the data sheet:
225 icch = (p clock / transfer rate) * (H / (L + H)) */
227 tmp = num * 10 / denom;
229 pd->icch = (u_int8_t)((num/denom) + 1);
231 pd->icch = (u_int8_t)(num/denom);
233 /* one more bit of ICCH in ICIC */
234 if (pd->flags & IIC_FLAG_HAS_ICIC67) {
235 if ((num/denom) > 0xff)
236 pd->icic |= ICIC_ICCHB8;
238 pd->icic &= ~ICIC_ICCHB8;
241 /* Enable channel and configure rx ack */
242 iic_set_clr(pd, ICCR, ICCR_ICE, 0);
244 /* Mask all interrupts */
248 iic_wr(pd, ICCL, pd->iccl);
249 iic_wr(pd, ICCH, pd->icch);
252 static void deactivate_ch(struct sh_mobile_i2c_data *pd)
254 /* Clear/disable interrupts */
258 /* Disable channel */
259 iic_set_clr(pd, ICCR, 0, ICCR_ICE);
261 /* Disable clock and mark device as idle */
262 clk_disable(pd->clk);
263 pm_runtime_put_sync(pd->dev);
266 static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
267 enum sh_mobile_i2c_op op, unsigned char data)
269 unsigned char ret = 0;
272 dev_dbg(pd->dev, "op %d, data in 0x%02x\n", op, data);
274 spin_lock_irqsave(&pd->lock, flags);
277 case OP_START: /* issue start and trigger DTE interrupt */
278 iic_wr(pd, ICCR, 0x94);
280 case OP_TX_FIRST: /* disable DTE interrupt and write data */
281 iic_wr(pd, ICIC, ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
282 iic_wr(pd, ICDR, data);
284 case OP_TX: /* write data */
285 iic_wr(pd, ICDR, data);
287 case OP_TX_STOP: /* write data and issue a stop afterwards */
288 iic_wr(pd, ICDR, data);
289 iic_wr(pd, ICCR, 0x90);
291 case OP_TX_TO_RX: /* select read mode */
292 iic_wr(pd, ICCR, 0x81);
294 case OP_RX: /* just read data */
295 ret = iic_rd(pd, ICDR);
297 case OP_RX_STOP: /* enable DTE interrupt, issue stop */
299 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
300 iic_wr(pd, ICCR, 0xc0);
302 case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */
304 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
305 ret = iic_rd(pd, ICDR);
306 iic_wr(pd, ICCR, 0xc0);
310 spin_unlock_irqrestore(&pd->lock, flags);
312 dev_dbg(pd->dev, "op %d, data out 0x%02x\n", op, ret);
316 static int sh_mobile_i2c_is_first_byte(struct sh_mobile_i2c_data *pd)
324 static int sh_mobile_i2c_is_last_byte(struct sh_mobile_i2c_data *pd)
326 if (pd->pos == (pd->msg->len - 1))
332 static void sh_mobile_i2c_get_data(struct sh_mobile_i2c_data *pd,
337 *buf = (pd->msg->addr & 0x7f) << 1;
338 *buf |= (pd->msg->flags & I2C_M_RD) ? 1 : 0;
341 *buf = pd->msg->buf[pd->pos];
345 static int sh_mobile_i2c_isr_tx(struct sh_mobile_i2c_data *pd)
349 if (pd->pos == pd->msg->len)
352 sh_mobile_i2c_get_data(pd, &data);
354 if (sh_mobile_i2c_is_last_byte(pd))
355 i2c_op(pd, OP_TX_STOP, data);
356 else if (sh_mobile_i2c_is_first_byte(pd))
357 i2c_op(pd, OP_TX_FIRST, data);
359 i2c_op(pd, OP_TX, data);
365 static int sh_mobile_i2c_isr_rx(struct sh_mobile_i2c_data *pd)
372 sh_mobile_i2c_get_data(pd, &data);
374 if (sh_mobile_i2c_is_first_byte(pd))
375 i2c_op(pd, OP_TX_FIRST, data);
377 i2c_op(pd, OP_TX, data);
382 i2c_op(pd, OP_TX_TO_RX, 0);
386 real_pos = pd->pos - 2;
388 if (pd->pos == pd->msg->len) {
390 i2c_op(pd, OP_RX_STOP, 0);
393 data = i2c_op(pd, OP_RX_STOP_DATA, 0);
395 data = i2c_op(pd, OP_RX, 0);
398 pd->msg->buf[real_pos] = data;
402 return pd->pos == (pd->msg->len + 2);
405 static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
407 struct platform_device *dev = dev_id;
408 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
412 sr = iic_rd(pd, ICSR);
413 pd->sr |= sr; /* remember state */
415 dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
416 (pd->msg->flags & I2C_M_RD) ? "read" : "write",
417 pd->pos, pd->msg->len);
419 if (sr & (ICSR_AL | ICSR_TACK)) {
420 /* don't interrupt transaction - continue to issue stop */
421 iic_wr(pd, ICSR, sr & ~(ICSR_AL | ICSR_TACK));
423 } else if (pd->msg->flags & I2C_M_RD)
424 wakeup = sh_mobile_i2c_isr_rx(pd);
426 wakeup = sh_mobile_i2c_isr_tx(pd);
428 if (sr & ICSR_WAIT) /* TODO: add delay here to support slow acks */
429 iic_wr(pd, ICSR, sr & ~ICSR_WAIT);
439 static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
441 if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) {
442 dev_err(pd->dev, "Unsupported zero length i2c read\n");
446 /* Initialize channel registers */
447 iic_set_clr(pd, ICCR, 0, ICCR_ICE);
449 /* Enable channel and configure rx ack */
450 iic_set_clr(pd, ICCR, ICCR_ICE, 0);
453 iic_wr(pd, ICCL, pd->iccl);
454 iic_wr(pd, ICCH, pd->icch);
460 /* Enable all interrupts to begin with */
461 iic_wr(pd, ICIC, ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
465 static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
466 struct i2c_msg *msgs,
469 struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter);
473 int i, k, retry_count;
477 /* Process all messages */
478 for (i = 0; i < num; i++) {
481 err = start_ch(pd, msg);
485 i2c_op(pd, OP_START, 0);
487 /* The interrupt handler takes care of the rest... */
488 k = wait_event_timeout(pd->wait,
489 pd->sr & (ICSR_TACK | SW_DONE),
492 dev_err(pd->dev, "Transfer request timed out\n");
496 val = iic_rd(pd, ICSR);
498 dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
500 /* the interrupt handler may wake us up before the
501 * transfer is finished, so poll the hardware
504 if (val & ICSR_BUSY) {
510 dev_err(pd->dev, "Polling timed out\n");
514 /* handle missing acknowledge and arbitration lost */
515 if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
528 static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
530 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
533 static struct i2c_algorithm sh_mobile_i2c_algorithm = {
534 .functionality = sh_mobile_i2c_func,
535 .master_xfer = sh_mobile_i2c_xfer,
538 static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
540 struct resource *res;
544 while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
545 for (n = res->start; hook && n <= res->end; n++) {
546 if (request_irq(n, sh_mobile_i2c_isr, 0,
547 dev_name(&dev->dev), dev)) {
548 for (n--; n >= res->start; n--)
558 return k > 0 ? 0 : -ENOENT;
566 res = platform_get_resource(dev, IORESOURCE_IRQ, k);
567 for (n = res->start; n <= res->end; n++)
576 static int sh_mobile_i2c_probe(struct platform_device *dev)
578 struct i2c_sh_mobile_platform_data *pdata = dev->dev.platform_data;
579 struct sh_mobile_i2c_data *pd;
580 struct i2c_adapter *adap;
581 struct resource *res;
585 pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
587 dev_err(&dev->dev, "cannot allocate private data\n");
591 pd->clk = clk_get(&dev->dev, NULL);
592 if (IS_ERR(pd->clk)) {
593 dev_err(&dev->dev, "cannot get clock\n");
594 ret = PTR_ERR(pd->clk);
598 ret = sh_mobile_i2c_hook_irqs(dev, 1);
600 dev_err(&dev->dev, "cannot request IRQ\n");
605 platform_set_drvdata(dev, pd);
607 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
609 dev_err(&dev->dev, "cannot find IO resource\n");
614 size = resource_size(res);
616 pd->reg = ioremap(res->start, size);
617 if (pd->reg == NULL) {
618 dev_err(&dev->dev, "cannot map IO\n");
623 /* Use platformd data bus speed or NORMAL_SPEED */
624 pd->bus_speed = NORMAL_SPEED;
625 if (pdata && pdata->bus_speed)
626 pd->bus_speed = pdata->bus_speed;
628 /* The IIC blocks on SH-Mobile ARM processors
629 * come with two new bits in ICIC.
632 pd->flags |= IIC_FLAG_HAS_ICIC67;
634 /* Enable Runtime PM for this device.
636 * Also tell the Runtime PM core to ignore children
637 * for this device since it is valid for us to suspend
638 * this I2C master driver even though the slave devices
639 * on the I2C bus may not be suspended.
641 * The state of the I2C hardware bus is unaffected by
642 * the Runtime PM state.
644 pm_suspend_ignore_children(&dev->dev, true);
645 pm_runtime_enable(&dev->dev);
647 /* setup the private data */
649 i2c_set_adapdata(adap, pd);
651 adap->owner = THIS_MODULE;
652 adap->algo = &sh_mobile_i2c_algorithm;
653 adap->dev.parent = &dev->dev;
657 strlcpy(adap->name, dev->name, sizeof(adap->name));
659 spin_lock_init(&pd->lock);
660 init_waitqueue_head(&pd->wait);
662 ret = i2c_add_numbered_adapter(adap);
664 dev_err(&dev->dev, "cannot add numbered adapter\n");
668 dev_info(&dev->dev, "I2C adapter %d with bus speed %lu Hz\n",
669 adap->nr, pd->bus_speed);
675 sh_mobile_i2c_hook_irqs(dev, 0);
683 static int sh_mobile_i2c_remove(struct platform_device *dev)
685 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
687 i2c_del_adapter(&pd->adap);
689 sh_mobile_i2c_hook_irqs(dev, 0);
691 pm_runtime_disable(&dev->dev);
696 static int sh_mobile_i2c_runtime_nop(struct device *dev)
698 /* Runtime PM callback shared between ->runtime_suspend()
699 * and ->runtime_resume(). Simply returns success.
701 * This driver re-initializes all registers after
702 * pm_runtime_get_sync() anyway so there is no need
703 * to save and restore registers here.
708 static const struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = {
709 .runtime_suspend = sh_mobile_i2c_runtime_nop,
710 .runtime_resume = sh_mobile_i2c_runtime_nop,
713 static struct platform_driver sh_mobile_i2c_driver = {
715 .name = "i2c-sh_mobile",
716 .owner = THIS_MODULE,
717 .pm = &sh_mobile_i2c_dev_pm_ops,
719 .probe = sh_mobile_i2c_probe,
720 .remove = sh_mobile_i2c_remove,
723 static int __init sh_mobile_i2c_adap_init(void)
725 return platform_driver_register(&sh_mobile_i2c_driver);
728 static void __exit sh_mobile_i2c_adap_exit(void)
730 platform_driver_unregister(&sh_mobile_i2c_driver);
733 subsys_initcall(sh_mobile_i2c_adap_init);
734 module_exit(sh_mobile_i2c_adap_exit);
736 MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
737 MODULE_AUTHOR("Magnus Damm");
738 MODULE_LICENSE("GPL v2");
739 MODULE_ALIAS("platform:i2c-sh_mobile");