3 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
5 * SPDX-License-Identifier: GPL-2.0+
10 #include "designware_i2c.h"
13 #ifdef CONFIG_I2C_MULTI_BUS
14 static unsigned int bus_initialized[CONFIG_SYS_I2C_BUS_MAX];
15 static unsigned int current_bus = 0;
18 static struct i2c_regs *i2c_regs_p =
19 (struct i2c_regs *)CONFIG_SYS_I2C_BASE;
22 * set_speed - Set the i2c speed mode (standard, high, fast)
23 * @i2c_spd: required i2c speed mode
25 * Set the i2c speed mode (standard, high, fast)
27 static void set_speed(int i2c_spd)
30 unsigned int hcnt, lcnt;
33 /* to set speed cltr must be disabled */
34 enbl = readl(&i2c_regs_p->ic_enable);
35 enbl &= ~IC_ENABLE_0B;
36 writel(enbl, &i2c_regs_p->ic_enable);
38 cntl = (readl(&i2c_regs_p->ic_con) & (~IC_CON_SPD_MSK));
41 case IC_SPEED_MODE_MAX:
42 cntl |= IC_CON_SPD_HS;
43 hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
44 writel(hcnt, &i2c_regs_p->ic_hs_scl_hcnt);
45 lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
46 writel(lcnt, &i2c_regs_p->ic_hs_scl_lcnt);
49 case IC_SPEED_MODE_STANDARD:
50 cntl |= IC_CON_SPD_SS;
51 hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
52 writel(hcnt, &i2c_regs_p->ic_ss_scl_hcnt);
53 lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
54 writel(lcnt, &i2c_regs_p->ic_ss_scl_lcnt);
57 case IC_SPEED_MODE_FAST:
59 cntl |= IC_CON_SPD_FS;
60 hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
61 writel(hcnt, &i2c_regs_p->ic_fs_scl_hcnt);
62 lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
63 writel(lcnt, &i2c_regs_p->ic_fs_scl_lcnt);
67 writel(cntl, &i2c_regs_p->ic_con);
69 /* Enable back i2c now speed set */
71 writel(enbl, &i2c_regs_p->ic_enable);
75 * i2c_set_bus_speed - Set the i2c speed
76 * @speed: required i2c speed
80 int i2c_set_bus_speed(unsigned int speed)
84 if (speed >= I2C_MAX_SPEED)
85 i2c_spd = IC_SPEED_MODE_MAX;
86 else if (speed >= I2C_FAST_SPEED)
87 i2c_spd = IC_SPEED_MODE_FAST;
89 i2c_spd = IC_SPEED_MODE_STANDARD;
97 * i2c_get_bus_speed - Gets the i2c speed
101 unsigned int i2c_get_bus_speed(void)
105 cntl = (readl(&i2c_regs_p->ic_con) & IC_CON_SPD_MSK);
107 if (cntl == IC_CON_SPD_HS)
108 return I2C_MAX_SPEED;
109 else if (cntl == IC_CON_SPD_FS)
110 return I2C_FAST_SPEED;
111 else if (cntl == IC_CON_SPD_SS)
112 return I2C_STANDARD_SPEED;
118 * i2c_init - Init function
119 * @speed: required i2c speed
120 * @slaveadd: slave address for the device
122 * Initialization function.
124 void i2c_init(int speed, int slaveadd)
129 enbl = readl(&i2c_regs_p->ic_enable);
130 enbl &= ~IC_ENABLE_0B;
131 writel(enbl, &i2c_regs_p->ic_enable);
133 writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_regs_p->ic_con);
134 writel(IC_RX_TL, &i2c_regs_p->ic_rx_tl);
135 writel(IC_TX_TL, &i2c_regs_p->ic_tx_tl);
136 i2c_set_bus_speed(speed);
137 writel(IC_STOP_DET, &i2c_regs_p->ic_intr_mask);
138 writel(slaveadd, &i2c_regs_p->ic_sar);
141 enbl = readl(&i2c_regs_p->ic_enable);
142 enbl |= IC_ENABLE_0B;
143 writel(enbl, &i2c_regs_p->ic_enable);
145 #ifdef CONFIG_I2C_MULTI_BUS
146 bus_initialized[current_bus] = 1;
151 * i2c_setaddress - Sets the target slave address
152 * @i2c_addr: target i2c address
154 * Sets the target slave address.
156 static void i2c_setaddress(unsigned int i2c_addr)
161 enbl = readl(&i2c_regs_p->ic_enable);
162 enbl &= ~IC_ENABLE_0B;
163 writel(enbl, &i2c_regs_p->ic_enable);
165 writel(i2c_addr, &i2c_regs_p->ic_tar);
168 enbl = readl(&i2c_regs_p->ic_enable);
169 enbl |= IC_ENABLE_0B;
170 writel(enbl, &i2c_regs_p->ic_enable);
174 * i2c_flush_rxfifo - Flushes the i2c RX FIFO
176 * Flushes the i2c RX FIFO
178 static void i2c_flush_rxfifo(void)
180 while (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE)
181 readl(&i2c_regs_p->ic_cmd_data);
185 * i2c_wait_for_bb - Waits for bus busy
189 static int i2c_wait_for_bb(void)
191 unsigned long start_time_bb = get_timer(0);
193 while ((readl(&i2c_regs_p->ic_status) & IC_STATUS_MA) ||
194 !(readl(&i2c_regs_p->ic_status) & IC_STATUS_TFE)) {
196 /* Evaluate timeout */
197 if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB))
204 static int i2c_xfer_init(uchar chip, uint addr, int alen)
206 if (i2c_wait_for_bb())
209 i2c_setaddress(chip);
212 /* high byte address going out first */
213 writel((addr >> (alen * 8)) & 0xff,
214 &i2c_regs_p->ic_cmd_data);
219 static int i2c_xfer_finish(void)
221 ulong start_stop_det = get_timer(0);
224 if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) {
225 readl(&i2c_regs_p->ic_clr_stop_det);
227 } else if (get_timer(start_stop_det) > I2C_STOPDET_TO) {
232 if (i2c_wait_for_bb()) {
233 printf("Timed out waiting for bus\n");
243 * i2c_read - Read from i2c memory
244 * @chip: target i2c address
245 * @addr: address to read from
247 * @buffer: buffer for read data
248 * @len: no of bytes to be read
250 * Read from i2c memory.
252 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
254 unsigned long start_time_rx;
256 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
258 * EEPROM chips that implement "address overflow" are ones
259 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
260 * address and the extra bits end up in the "chip address"
261 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
262 * four 256 byte chips.
264 * Note that we consider the length of the address field to
265 * still be one byte because the extra address bits are
266 * hidden in the chip address.
268 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
269 addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8));
271 debug("%s: fix addr_overflow: chip %02x addr %02x\n", __func__, chip,
275 if (i2c_xfer_init(chip, addr, alen))
278 start_time_rx = get_timer(0);
281 writel(IC_CMD | IC_STOP, &i2c_regs_p->ic_cmd_data);
283 writel(IC_CMD, &i2c_regs_p->ic_cmd_data);
285 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) {
286 *buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data);
288 start_time_rx = get_timer(0);
290 } else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
295 return i2c_xfer_finish();
299 * i2c_write - Write to i2c memory
300 * @chip: target i2c address
301 * @addr: address to read from
303 * @buffer: buffer for read data
304 * @len: no of bytes to be read
306 * Write to i2c memory.
308 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
311 unsigned long start_time_tx;
313 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
315 * EEPROM chips that implement "address overflow" are ones
316 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
317 * address and the extra bits end up in the "chip address"
318 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
319 * four 256 byte chips.
321 * Note that we consider the length of the address field to
322 * still be one byte because the extra address bits are
323 * hidden in the chip address.
325 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
326 addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8));
328 debug("%s: fix addr_overflow: chip %02x addr %02x\n", __func__, chip,
332 if (i2c_xfer_init(chip, addr, alen))
335 start_time_tx = get_timer(0);
337 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) {
339 writel(*buffer | IC_STOP, &i2c_regs_p->ic_cmd_data);
341 writel(*buffer, &i2c_regs_p->ic_cmd_data);
343 start_time_tx = get_timer(0);
345 } else if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) {
346 printf("Timed out. i2c write Failed\n");
351 return i2c_xfer_finish();
355 * i2c_probe - Probe the i2c chip
357 int i2c_probe(uchar chip)
363 * Try to read the first location of the chip.
365 ret = i2c_read(chip, 0, 1, (uchar *)&tmp, 1);
367 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
372 #ifdef CONFIG_I2C_MULTI_BUS
373 int i2c_set_bus_num(unsigned int bus)
377 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE;
379 #ifdef CONFIG_SYS_I2C_BASE1
381 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE1;
384 #ifdef CONFIG_SYS_I2C_BASE2
386 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE2;
389 #ifdef CONFIG_SYS_I2C_BASE3
391 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE3;
394 #ifdef CONFIG_SYS_I2C_BASE4
396 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE4;
399 #ifdef CONFIG_SYS_I2C_BASE5
401 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE5;
404 #ifdef CONFIG_SYS_I2C_BASE6
406 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE6;
409 #ifdef CONFIG_SYS_I2C_BASE7
411 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE7;
414 #ifdef CONFIG_SYS_I2C_BASE8
416 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE8;
419 #ifdef CONFIG_SYS_I2C_BASE9
421 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE9;
425 printf("Bad bus: %d\n", bus);
431 if (!bus_initialized[current_bus])
432 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
437 unsigned int i2c_get_bus_num(void)