2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (C) 1995-1998 Mark Lord
4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
6 * May be copied or modified under the terms of the GNU General Public License
9 #include <linux/module.h>
10 #include <linux/types.h>
11 #include <linux/kernel.h>
12 #include <linux/pci.h>
13 #include <linux/init.h>
14 #include <linux/timer.h>
16 #include <linux/interrupt.h>
17 #include <linux/ide.h>
18 #include <linux/dma-mapping.h>
24 * ide_setup_pci_baseregs - place a PCI IDE controller native
25 * @dev: PCI device of interface to switch native
26 * @name: Name of interface
28 * We attempt to place the PCI interface into PCI native mode. If
29 * we succeed the BARs are ok and the controller is in PCI mode.
30 * Returns 0 on success or an errno code.
32 * FIXME: if we program the interface and then fail to set the BARS
33 * we don't switch it back to legacy mode. Do we actually care ??
36 static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name)
41 * Place both IDE interfaces into PCI "native" mode:
43 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
45 if ((progif & 0xa) != 0xa) {
46 printk(KERN_INFO "%s: device not capable of full "
47 "native PCI mode\n", name);
50 printk("%s: placing both ports into native PCI mode\n", name);
51 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
52 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
54 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
55 "0x%04x, got 0x%04x\n",
56 name, progif|5, progif);
63 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
64 static void ide_pci_clear_simplex(unsigned long dma_base, const char *name)
66 u8 dma_stat = inb(dma_base + 2);
68 outb(dma_stat & 0x60, dma_base + 2);
69 dma_stat = inb(dma_base + 2);
71 printk(KERN_INFO "%s: simplex device: DMA forced\n", name);
75 * ide_get_or_set_dma_base - setup BMIBA
77 * @hwif: IDE interface
79 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
80 * Where a device has a partner that is already in DMA mode we check
81 * and enforce IDE simplex rules.
84 static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif)
86 struct pci_dev *dev = to_pci_dev(hwif->dev);
87 unsigned long dma_base = 0;
91 return hwif->dma_base;
93 if (hwif->mate && hwif->mate->dma_base) {
94 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
96 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
98 dma_base = pci_resource_start(dev, baridx);
101 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
109 if (d->host_flags & IDE_HFLAG_CS5520)
112 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) {
113 ide_pci_clear_simplex(dma_base, d->name);
118 * If the device claims "simplex" DMA, this means that only one of
119 * the two interfaces can be trusted with DMA at any point in time
120 * (so we should enable DMA only on one of the two interfaces).
122 * FIXME: At this point we haven't probed the drives so we can't make
123 * the appropriate decision. Really we should defer this problem until
124 * we tune the drive then try to grab DMA ownership if we want to be
125 * the DMA end. This has to be become dynamic to handle hot-plug.
127 dma_stat = hwif->INB(dma_base + 2);
128 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) {
129 printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name);
137 * Set up BM-DMA capability (PnP BIOS should have done this)
139 static int ide_pci_set_master(struct pci_dev *dev, const char *name)
143 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
145 if ((pcicmd & PCI_COMMAND_MASTER) == 0) {
148 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) ||
149 (pcicmd & PCI_COMMAND_MASTER) == 0) {
150 printk(KERN_ERR "%s: error updating PCICMD on %s\n",
151 name, pci_name(dev));
158 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
160 void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
162 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
163 " PCI slot %s\n", d->name, dev->vendor, dev->device,
164 dev->revision, pci_name(dev));
166 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
170 * ide_pci_enable - do PCI enables
174 * Enable the IDE PCI device. We attempt to enable the device in full
175 * but if that fails then we only need IO space. The PCI code should
176 * have setup the proper resources for us already for controllers in
179 * Returns zero on success or an error code
182 static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
186 if (pci_enable_device(dev)) {
187 ret = pci_enable_device_io(dev);
189 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
190 "Could not enable device.\n", d->name);
193 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
197 * assume all devices can do 32-bit DMA for now, we can add
198 * a DMA mask field to the struct ide_port_info if we need it
199 * (or let lower level driver set the DMA mask)
201 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
203 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
207 if (d->host_flags & IDE_HFLAG_SINGLE)
212 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) {
213 if (d->host_flags & IDE_HFLAG_CS5520)
219 ret = pci_request_selected_regions(dev, bars, d->name);
221 printk(KERN_ERR "%s: can't reserve resources\n", d->name);
227 * ide_pci_configure - configure an unconfigured device
231 * Enable and configure the PCI device we have been passed.
232 * Returns zero on success or an error code.
235 static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
239 * PnP BIOS was *supposed* to have setup this device, but we
240 * can do it ourselves, so long as the BIOS has assigned an IRQ
241 * (or possibly the device is using a "legacy header" for IRQs).
242 * Maybe the user deliberately *disabled* the device,
243 * but we'll eventually ignore it again if no drives respond.
245 if (ide_setup_pci_baseregs(dev, d->name) ||
246 pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) {
247 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
250 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
251 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
254 if (!(pcicmd & PCI_COMMAND_IO)) {
255 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
262 * ide_pci_check_iomem - check a register is I/O
267 * Checks if a BAR is configured and points to MMIO space. If so,
268 * return an error code. Otherwise return 0
271 static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d,
274 ulong flags = pci_resource_flags(dev, bar);
277 if (!flags || pci_resource_len(dev, bar) == 0)
281 if (flags & IORESOURCE_IO)
289 * ide_hwif_configure - configure an IDE interface
290 * @dev: PCI device holding interface
295 * Perform the initial set up for the hardware interface structure. This
296 * is done per interface port rather than per PCI device. There may be
297 * more than one port per device.
299 * Returns the new hardware interface structure, or NULL on a failure
302 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev,
303 const struct ide_port_info *d,
304 unsigned int port, int irq)
306 unsigned long ctl = 0, base = 0;
310 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
311 if (ide_pci_check_iomem(dev, d, 2 * port) ||
312 ide_pci_check_iomem(dev, d, 2 * port + 1)) {
313 printk(KERN_ERR "%s: I/O baseregs (BIOS) are reported "
314 "as MEM for port %d!\n", d->name, port);
318 ctl = pci_resource_start(dev, 2*port+1);
319 base = pci_resource_start(dev, 2*port);
320 if ((ctl && !base) || (base && !ctl)) {
321 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
322 "for port %d, skipping\n", d->name, port);
327 /* Use default values */
328 ctl = port ? 0x374 : 0x3f4;
329 base = port ? 0x170 : 0x1f0;
332 hwif = ide_find_port_slot(d);
334 printk(KERN_ERR "%s: too many IDE interfaces, no room in "
339 memset(&hw, 0, sizeof(hw));
342 hw.chipset = d->chipset ? d->chipset : ide_pci;
343 ide_std_init_ports(&hw, base, ctl | 2);
345 ide_init_port_hw(hwif, &hw);
347 hwif->dev = &dev->dev;
352 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
354 * ide_hwif_setup_dma - configure DMA interface
355 * @hwif: IDE interface
358 * Set up the DMA base for the interface. Enable the master bits as
359 * necessary and attempt to bring the device DMA into a ready to use
363 void ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
365 struct pci_dev *dev = to_pci_dev(hwif->dev);
367 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
368 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
369 (dev->class & 0x80))) {
370 unsigned long base = ide_get_or_set_dma_base(d, hwif);
372 if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
376 d->init_dma(hwif, base);
379 printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
381 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
382 hwif->name, base, base + 7);
384 hwif->extra_base = base + (hwif->channel ? 8 : 16);
386 if (ide_allocate_dma_engine(hwif) == 0)
387 ide_setup_dma(hwif, base);
393 printk(KERN_INFO "%s: Bus-Master DMA disabled (BIOS) on %s\n",
394 d->name, pci_name(dev));
396 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
399 * ide_setup_pci_controller - set up IDE PCI
402 * @noisy: verbose flag
403 * @config: returned as 1 if we configured the hardware
405 * Set up the PCI and controller side of the IDE interface. This brings
406 * up the PCI side of the device, checks that the device is enabled
407 * and enables it if need be
410 static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config)
416 ide_setup_pci_noise(dev, d);
418 ret = ide_pci_enable(dev, d);
422 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
424 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
427 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
428 ret = ide_pci_configure(dev, d);
432 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
440 * ide_pci_setup_ports - configure ports/devices on PCI IDE
444 * @idx: ATA index table to update
446 * Scan the interfaces attached to this device and do any
447 * necessary per port setup. Attach the devices and ask the
448 * generic DMA layer to do its work for us.
450 * Normally called automaticall from do_ide_pci_setup_device,
451 * but is also used directly as a helper function by some controllers
452 * where the chipset setup is not the default PCI IDE one.
455 void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx)
457 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
462 * Set up the IDE ports
465 for (port = 0; port < channels; ++port) {
466 const ide_pci_enablebit_t *e = &(d->enablebits[port]);
468 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
469 (tmp & e->mask) != e->val)) {
470 printk(KERN_INFO "%s: IDE port disabled\n", d->name);
471 continue; /* port not enabled */
474 hwif = ide_hwif_configure(dev, d, port, pciirq);
478 *(idx + port) = hwif->index;
481 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
484 * ide_setup_pci_device() looks at the primary/secondary interfaces
485 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
486 * for use with them. This generic code works for most PCI chipsets.
488 * One thing that is not standardized is the location of the
489 * primary/secondary interface "enable/disable" bits. For chipsets that
490 * we "know" about, this information is in the struct ide_port_info;
491 * for all other chipsets, we just assume both interfaces are enabled.
493 static int do_ide_setup_pci_device(struct pci_dev *dev,
494 const struct ide_port_info *d,
497 int tried_config = 0;
500 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
505 * Can we trust the reported IRQ?
509 /* Is it an "IDE storage" device in non-PCI mode? */
510 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
512 printk(KERN_INFO "%s: not 100%% native mode: "
513 "will probe irqs later\n", d->name);
515 * This allows offboard ide-pci cards the enable a BIOS,
516 * verify interrupt settings of split-mirror pci-config
517 * space, place chipset into init-mode, and/or preserve
518 * an interrupt if the card is not native ide support.
520 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
524 } else if (tried_config) {
526 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
528 } else if (!pciirq) {
530 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
534 if (d->init_chipset) {
535 ret = d->init_chipset(dev, d->name);
540 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
544 /* FIXME: silent failure can happen */
546 ide_pci_setup_ports(dev, d, pciirq, idx);
551 int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
553 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
556 ret = do_ide_setup_pci_device(dev, d, &idx[0], 1);
559 ide_device_add(idx, d);
563 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
565 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
566 const struct ide_port_info *d)
568 struct pci_dev *pdev[] = { dev1, dev2 };
570 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
572 for (i = 0; i < 2; i++) {
573 ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i);
575 * FIXME: Mom, mom, they stole me the helper function to undo
576 * do_ide_setup_pci_device() on the first device!
582 ide_device_add(idx, d);
586 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);