2 * VIA IDE driver for Linux. Supported southbridges:
4 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
5 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
6 * vt8235, vt8237, vt8237a
8 * Copyright (c) 2000-2002 Vojtech Pavlik
9 * Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
11 * Based on the work of:
17 * Obsolete device documentation publically available from via.com.tw
18 * Current device documentation available under NDA only
22 * This program is free software; you can redistribute it and/or modify it
23 * under the terms of the GNU General Public License version 2 as published by
24 * the Free Software Foundation.
27 #include <linux/module.h>
28 #include <linux/kernel.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/ide.h>
32 #include <linux/dmi.h>
34 #ifdef CONFIG_PPC_CHRP
35 #include <asm/processor.h>
38 #define DRV_NAME "via82cxxx"
40 #define VIA_IDE_ENABLE 0x40
41 #define VIA_IDE_CONFIG 0x41
42 #define VIA_FIFO_CONFIG 0x43
43 #define VIA_MISC_1 0x44
44 #define VIA_MISC_2 0x45
45 #define VIA_MISC_3 0x46
46 #define VIA_DRIVE_TIMING 0x48
47 #define VIA_8BIT_TIMING 0x4e
48 #define VIA_ADDRESS_SETUP 0x4c
49 #define VIA_UDMA_TIMING 0x50
51 #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
52 #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
53 #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
54 #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
55 #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
56 #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
57 #define VIA_SATA_PATA 0x80 /* SATA/PATA combined configuration */
60 VIA_IDFLAG_SINGLE = (1 << 1), /* single channel controller */
64 * VIA SouthBridge chips.
67 static struct via_isa_bridge {
74 } via_isa_bridges[] = {
75 { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
76 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
77 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
78 { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
79 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
80 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
81 { "vt6415", PCI_DEVICE_ID_VIA_6410, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST },
82 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
83 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
84 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
85 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
86 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
87 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
88 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
89 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
90 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
91 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
92 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
93 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
94 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
95 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
96 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
97 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
98 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
99 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
100 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
101 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
102 { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
106 static unsigned int via_clock;
107 static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
111 struct via_isa_bridge *via_config;
112 unsigned int via_80w;
117 * via_set_speed - write timing registers
120 * @timing: IDE timing data to use
122 * via_set_speed writes timing values to the chipset registers
125 static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
127 struct pci_dev *dev = to_pci_dev(hwif->dev);
128 struct ide_host *host = pci_get_drvdata(dev);
129 struct via82cxxx_dev *vdev = host->host_priv;
132 if (~vdev->via_config->flags & VIA_BAD_AST) {
133 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
134 t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
135 pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
138 pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
139 ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
141 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
142 ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
144 switch (vdev->via_config->udma_mask) {
145 case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
146 case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
147 case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
148 case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
152 pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
156 * via_set_drive - configure transfer mode
157 * @drive: Drive to set up
158 * @speed: desired speed
160 * via_set_drive() computes timing values configures the chipset to
161 * a desired transfer mode. It also can be called by upper layers.
164 static void via_set_drive(ide_drive_t *drive, const u8 speed)
166 ide_hwif_t *hwif = drive->hwif;
167 ide_drive_t *peer = ide_get_pair_dev(drive);
168 struct pci_dev *dev = to_pci_dev(hwif->dev);
169 struct ide_host *host = pci_get_drvdata(dev);
170 struct via82cxxx_dev *vdev = host->host_priv;
171 struct ide_timing t, p;
174 T = 1000000000 / via_clock;
176 switch (vdev->via_config->udma_mask) {
177 case ATA_UDMA2: UT = T; break;
178 case ATA_UDMA4: UT = T/2; break;
179 case ATA_UDMA5: UT = T/3; break;
180 case ATA_UDMA6: UT = T/4; break;
184 ide_timing_compute(drive, speed, &t, T, UT);
187 ide_timing_compute(peer, peer->current_speed, &p, T, UT);
188 ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
191 via_set_speed(hwif, drive->dn, &t);
195 * via_set_pio_mode - set host controller for PIO mode
197 * @pio: PIO mode number
199 * A callback from the upper layers for PIO-only tuning.
202 static void via_set_pio_mode(ide_drive_t *drive, const u8 pio)
204 via_set_drive(drive, XFER_PIO_0 + pio);
207 static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
209 struct via_isa_bridge *via_config;
211 for (via_config = via_isa_bridges;
212 via_config->id != PCI_DEVICE_ID_VIA_ANON; via_config++)
213 if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
214 !!(via_config->flags & VIA_BAD_ID),
215 via_config->id, NULL))) {
217 if ((*isa)->revision >= via_config->rev_min &&
218 (*isa)->revision <= via_config->rev_max)
227 * Check and handle 80-wire cable presence
229 static void via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
233 switch (vdev->via_config->udma_mask) {
235 for (i = 24; i >= 0; i -= 8)
236 if (((u >> (i & 16)) & 8) &&
238 (((u >> i) & 7) < 2)) {
243 vdev->via_80w |= (1 << (1 - (i >> 4)));
248 for (i = 24; i >= 0; i -= 8)
249 if (((u >> i) & 0x10) ||
250 (((u >> i) & 0x20) &&
251 (((u >> i) & 7) < 4))) {
252 /* BIOS 80-wire bit or
253 * UDMA w/ < 60ns/cycle
255 vdev->via_80w |= (1 << (1 - (i >> 4)));
260 for (i = 24; i >= 0; i -= 8)
261 if (((u >> i) & 0x10) ||
262 (((u >> i) & 0x20) &&
263 (((u >> i) & 7) < 6))) {
264 /* BIOS 80-wire bit or
265 * UDMA w/ < 60ns/cycle
267 vdev->via_80w |= (1 << (1 - (i >> 4)));
274 * init_chipset_via82cxxx - initialization handler
277 * The initialization callback. Here we determine the IDE chip type
278 * and initialize its drive independent registers.
281 static int init_chipset_via82cxxx(struct pci_dev *dev)
283 struct ide_host *host = pci_get_drvdata(dev);
284 struct via82cxxx_dev *vdev = host->host_priv;
285 struct via_isa_bridge *via_config = vdev->via_config;
290 * Detect cable and configure Clk66
292 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
294 via_cable_detect(vdev, u);
296 if (via_config->udma_mask == ATA_UDMA4) {
298 pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
299 } else if (via_config->flags & VIA_BAD_CLK66) {
300 /* Would cause trouble on 596a and 686 */
301 pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
305 * Check whether interfaces are enabled.
308 pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
311 * Set up FIFO sizes and thresholds.
314 pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
316 /* Disable PREQ# till DDACK# */
317 if (via_config->flags & VIA_BAD_PREQ) {
318 /* Would crash on 586b rev 41 */
322 /* Fix FIFO split between channels */
323 if (via_config->flags & VIA_SET_FIFO) {
326 case 2: t |= 0x00; break; /* 16 on primary */
327 case 1: t |= 0x60; break; /* 16 on secondary */
328 case 3: t |= 0x20; break; /* 8 pri 8 sec */
332 pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
338 * Cable special cases
341 static const struct dmi_system_id cable_dmi_table[] = {
343 .ident = "Acer Ferrari 3400",
345 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
346 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
352 static int via_cable_override(struct pci_dev *pdev)
355 if (dmi_check_system(cable_dmi_table))
358 /* Arima W730-K8/Targa Visionary 811/... */
359 if (pdev->subsystem_vendor == 0x161F &&
360 pdev->subsystem_device == 0x2032)
366 static u8 via82cxxx_cable_detect(ide_hwif_t *hwif)
368 struct pci_dev *pdev = to_pci_dev(hwif->dev);
369 struct ide_host *host = pci_get_drvdata(pdev);
370 struct via82cxxx_dev *vdev = host->host_priv;
372 if (via_cable_override(pdev))
373 return ATA_CBL_PATA40_SHORT;
375 if ((vdev->via_config->flags & VIA_SATA_PATA) && hwif->channel == 0)
378 if ((vdev->via_80w >> hwif->channel) & 1)
379 return ATA_CBL_PATA80;
381 return ATA_CBL_PATA40;
384 static const struct ide_port_ops via_port_ops = {
385 .set_pio_mode = via_set_pio_mode,
386 .set_dma_mode = via_set_drive,
387 .cable_detect = via82cxxx_cable_detect,
390 static void via_write_devctl(ide_hwif_t *hwif, u8 ctl)
392 struct via82cxxx_dev *vdev = hwif->host->host_priv;
394 outb(ctl, hwif->io_ports.ctl_addr);
395 outb(vdev->cached_device[hwif->channel], hwif->io_ports.device_addr);
398 static void __via_dev_select(ide_drive_t *drive, u8 select)
400 ide_hwif_t *hwif = drive->hwif;
401 struct via82cxxx_dev *vdev = hwif->host->host_priv;
403 outb(select, hwif->io_ports.device_addr);
404 vdev->cached_device[hwif->channel] = select;
407 static void via_dev_select(ide_drive_t *drive)
409 __via_dev_select(drive, drive->select | ATA_DEVICE_OBS);
412 static void via_tf_load(ide_drive_t *drive, struct ide_taskfile *tf, u8 valid)
414 ide_hwif_t *hwif = drive->hwif;
415 struct ide_io_ports *io_ports = &hwif->io_ports;
417 if (valid & IDE_VALID_FEATURE)
418 outb(tf->feature, io_ports->feature_addr);
419 if (valid & IDE_VALID_NSECT)
420 outb(tf->nsect, io_ports->nsect_addr);
421 if (valid & IDE_VALID_LBAL)
422 outb(tf->lbal, io_ports->lbal_addr);
423 if (valid & IDE_VALID_LBAM)
424 outb(tf->lbam, io_ports->lbam_addr);
425 if (valid & IDE_VALID_LBAH)
426 outb(tf->lbah, io_ports->lbah_addr);
427 if (valid & IDE_VALID_DEVICE)
428 __via_dev_select(drive, tf->device);
431 const struct ide_tp_ops via_tp_ops = {
432 .exec_command = ide_exec_command,
433 .read_status = ide_read_status,
434 .read_altstatus = ide_read_altstatus,
435 .write_devctl = via_write_devctl,
437 .dev_select = via_dev_select,
438 .tf_load = via_tf_load,
439 .tf_read = ide_tf_read,
441 .input_data = ide_input_data,
442 .output_data = ide_output_data,
445 static const struct ide_port_info via82cxxx_chipset __devinitdata = {
447 .init_chipset = init_chipset_via82cxxx,
448 .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
449 .tp_ops = &via_tp_ops,
450 .port_ops = &via_port_ops,
451 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
452 IDE_HFLAG_POST_SET_MODE |
454 .pio_mask = ATA_PIO5,
455 .swdma_mask = ATA_SWDMA2,
456 .mwdma_mask = ATA_MWDMA2,
459 static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
461 struct pci_dev *isa = NULL;
462 struct via_isa_bridge *via_config;
463 struct via82cxxx_dev *vdev;
465 u8 idx = id->driver_data;
466 struct ide_port_info d;
468 d = via82cxxx_chipset;
471 * Find the ISA bridge and check we know what it is.
473 via_config = via_config_find(&isa);
476 * Print the boot message.
478 printk(KERN_INFO DRV_NAME " %s: VIA %s (rev %02x) IDE %sDMA%s\n",
479 pci_name(dev), via_config->name, isa->revision,
480 via_config->udma_mask ? "U" : "MW",
481 via_dma[via_config->udma_mask ?
482 (fls(via_config->udma_mask) - 1) : 0]);
487 * Determine system bus clock.
489 via_clock = (ide_pci_clk ? ide_pci_clk : 33) * 1000;
492 case 33000: via_clock = 33333; break;
493 case 37000: via_clock = 37500; break;
494 case 41000: via_clock = 41666; break;
497 if (via_clock < 20000 || via_clock > 50000) {
498 printk(KERN_WARNING DRV_NAME ": User given PCI clock speed "
499 "impossible (%d), using 33 MHz instead.\n", via_clock);
504 d.enablebits[1].reg = d.enablebits[0].reg = 0;
506 d.host_flags |= IDE_HFLAG_NO_AUTODMA;
508 if (idx == VIA_IDFLAG_SINGLE)
509 d.host_flags |= IDE_HFLAG_SINGLE;
511 if ((via_config->flags & VIA_NO_UNMASK) == 0)
512 d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
514 d.udma_mask = via_config->udma_mask;
516 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
518 printk(KERN_ERR DRV_NAME " %s: out of memory :(\n",
523 vdev->via_config = via_config;
525 rc = ide_pci_init_one(dev, &d, vdev);
532 static void __devexit via_remove(struct pci_dev *dev)
534 struct ide_host *host = pci_get_drvdata(dev);
535 struct via82cxxx_dev *vdev = host->host_priv;
541 static const struct pci_device_id via_pci_tbl[] = {
542 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), 0 },
543 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), 0 },
544 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
545 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_VX855_IDE), VIA_IDFLAG_SINGLE },
546 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), 1 },
547 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6415), 1 },
548 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
551 MODULE_DEVICE_TABLE(pci, via_pci_tbl);
553 static struct pci_driver via_pci_driver = {
555 .id_table = via_pci_tbl,
556 .probe = via_init_one,
557 .remove = __devexit_p(via_remove),
558 .suspend = ide_pci_suspend,
559 .resume = ide_pci_resume,
562 static int __init via_ide_init(void)
564 return ide_pci_register_driver(&via_pci_driver);
567 static void __exit via_ide_exit(void)
569 pci_unregister_driver(&via_pci_driver);
572 module_init(via_ide_init);
573 module_exit(via_ide_exit);
575 MODULE_AUTHOR("Vojtech Pavlik, Bartlomiej Zolnierkiewicz, Michel Aubry, Jeff Garzik, Andre Hedrick");
576 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
577 MODULE_LICENSE("GPL");