2 * STMicroelectronics accelerometers driver
4 * Copyright 2012-2013 STMicroelectronics Inc.
6 * Denis Ciocca <denis.ciocca@st.com>
8 * Licensed under the GPL-2.
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/errno.h>
15 #include <linux/types.h>
16 #include <linux/mutex.h>
17 #include <linux/interrupt.h>
18 #include <linux/i2c.h>
19 #include <linux/gpio.h>
20 #include <linux/irq.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/trigger.h>
24 #include <linux/iio/buffer.h>
26 #include <linux/iio/common/st_sensors.h>
29 #define ST_ACCEL_NUMBER_DATA_CHANNELS 3
31 /* DEFAULT VALUE FOR SENSORS */
32 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28
33 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a
34 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c
37 #define ST_ACCEL_FS_AVL_2G 2
38 #define ST_ACCEL_FS_AVL_4G 4
39 #define ST_ACCEL_FS_AVL_6G 6
40 #define ST_ACCEL_FS_AVL_8G 8
41 #define ST_ACCEL_FS_AVL_16G 16
43 /* CUSTOM VALUES FOR SENSOR 1 */
44 #define ST_ACCEL_1_WAI_EXP 0x33
45 #define ST_ACCEL_1_ODR_ADDR 0x20
46 #define ST_ACCEL_1_ODR_MASK 0xf0
47 #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01
48 #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02
49 #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03
50 #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04
51 #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05
52 #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06
53 #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07
54 #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08
55 #define ST_ACCEL_1_FS_ADDR 0x23
56 #define ST_ACCEL_1_FS_MASK 0x30
57 #define ST_ACCEL_1_FS_AVL_2_VAL 0x00
58 #define ST_ACCEL_1_FS_AVL_4_VAL 0x01
59 #define ST_ACCEL_1_FS_AVL_8_VAL 0x02
60 #define ST_ACCEL_1_FS_AVL_16_VAL 0x03
61 #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
62 #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
63 #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000)
64 #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000)
65 #define ST_ACCEL_1_BDU_ADDR 0x23
66 #define ST_ACCEL_1_BDU_MASK 0x80
67 #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22
68 #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10
69 #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08
70 #define ST_ACCEL_1_MULTIREAD_BIT true
72 /* CUSTOM VALUES FOR SENSOR 2 */
73 #define ST_ACCEL_2_WAI_EXP 0x32
74 #define ST_ACCEL_2_ODR_ADDR 0x20
75 #define ST_ACCEL_2_ODR_MASK 0x18
76 #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00
77 #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01
78 #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02
79 #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03
80 #define ST_ACCEL_2_PW_ADDR 0x20
81 #define ST_ACCEL_2_PW_MASK 0xe0
82 #define ST_ACCEL_2_FS_ADDR 0x23
83 #define ST_ACCEL_2_FS_MASK 0x30
84 #define ST_ACCEL_2_FS_AVL_2_VAL 0X00
85 #define ST_ACCEL_2_FS_AVL_4_VAL 0X01
86 #define ST_ACCEL_2_FS_AVL_8_VAL 0x03
87 #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
88 #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
89 #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900)
90 #define ST_ACCEL_2_BDU_ADDR 0x23
91 #define ST_ACCEL_2_BDU_MASK 0x80
92 #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22
93 #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02
94 #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10
95 #define ST_ACCEL_2_MULTIREAD_BIT true
97 /* CUSTOM VALUES FOR SENSOR 3 */
98 #define ST_ACCEL_3_WAI_EXP 0x40
99 #define ST_ACCEL_3_ODR_ADDR 0x20
100 #define ST_ACCEL_3_ODR_MASK 0xf0
101 #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01
102 #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02
103 #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03
104 #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04
105 #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05
106 #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06
107 #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07
108 #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08
109 #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09
110 #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a
111 #define ST_ACCEL_3_FS_ADDR 0x24
112 #define ST_ACCEL_3_FS_MASK 0x38
113 #define ST_ACCEL_3_FS_AVL_2_VAL 0X00
114 #define ST_ACCEL_3_FS_AVL_4_VAL 0X01
115 #define ST_ACCEL_3_FS_AVL_6_VAL 0x02
116 #define ST_ACCEL_3_FS_AVL_8_VAL 0x03
117 #define ST_ACCEL_3_FS_AVL_16_VAL 0x04
118 #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61)
119 #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122)
120 #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183)
121 #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244)
122 #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732)
123 #define ST_ACCEL_3_BDU_ADDR 0x20
124 #define ST_ACCEL_3_BDU_MASK 0x08
125 #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23
126 #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80
127 #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00
128 #define ST_ACCEL_3_IG1_EN_ADDR 0x23
129 #define ST_ACCEL_3_IG1_EN_MASK 0x08
130 #define ST_ACCEL_3_MULTIREAD_BIT false
132 /* CUSTOM VALUES FOR SENSOR 4 */
133 #define ST_ACCEL_4_WAI_EXP 0x3a
134 #define ST_ACCEL_4_ODR_ADDR 0x20
135 #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */
136 #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00
137 #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01
138 #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02
139 #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03
140 #define ST_ACCEL_4_PW_ADDR 0x20
141 #define ST_ACCEL_4_PW_MASK 0xc0
142 #define ST_ACCEL_4_FS_ADDR 0x21
143 #define ST_ACCEL_4_FS_MASK 0x80
144 #define ST_ACCEL_4_FS_AVL_2_VAL 0X00
145 #define ST_ACCEL_4_FS_AVL_6_VAL 0X01
146 #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024)
147 #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340)
148 #define ST_ACCEL_4_BDU_ADDR 0x21
149 #define ST_ACCEL_4_BDU_MASK 0x40
150 #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21
151 #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04
152 #define ST_ACCEL_4_MULTIREAD_BIT true
154 /* CUSTOM VALUES FOR SENSOR 5 */
155 #define ST_ACCEL_5_WAI_EXP 0x3b
156 #define ST_ACCEL_5_ODR_ADDR 0x20
157 #define ST_ACCEL_5_ODR_MASK 0x80
158 #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00
159 #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01
160 #define ST_ACCEL_5_PW_ADDR 0x20
161 #define ST_ACCEL_5_PW_MASK 0x40
162 #define ST_ACCEL_5_FS_ADDR 0x20
163 #define ST_ACCEL_5_FS_MASK 0x20
164 #define ST_ACCEL_5_FS_AVL_2_VAL 0X00
165 #define ST_ACCEL_5_FS_AVL_8_VAL 0X01
166 /* TODO: check these resulting gain settings, these are not in the datsheet */
167 #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000)
168 #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000)
169 #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22
170 #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04
171 #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20
172 #define ST_ACCEL_5_IG1_EN_ADDR 0x21
173 #define ST_ACCEL_5_IG1_EN_MASK 0x08
174 #define ST_ACCEL_5_MULTIREAD_BIT false
176 static const struct iio_chan_spec st_accel_8bit_channels[] = {
177 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
178 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
179 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8,
180 ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1),
181 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
182 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
183 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8,
184 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1),
185 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
186 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
187 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8,
188 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1),
189 IIO_CHAN_SOFT_TIMESTAMP(3)
192 static const struct iio_chan_spec st_accel_12bit_channels[] = {
193 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
194 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
195 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16,
196 ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
197 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
198 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
199 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16,
200 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
201 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
202 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
203 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16,
204 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
205 IIO_CHAN_SOFT_TIMESTAMP(3)
208 static const struct iio_chan_spec st_accel_16bit_channels[] = {
209 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
210 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
211 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
212 ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
213 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
214 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
215 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
216 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
217 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
218 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
219 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
220 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
221 IIO_CHAN_SOFT_TIMESTAMP(3)
224 static const struct st_sensor_settings st_accel_sensors_settings[] = {
226 .wai = ST_ACCEL_1_WAI_EXP,
227 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
228 .sensors_supported = {
229 [0] = LIS3DH_ACCEL_DEV_NAME,
230 [1] = LSM303DLHC_ACCEL_DEV_NAME,
231 [2] = LSM330D_ACCEL_DEV_NAME,
232 [3] = LSM330DL_ACCEL_DEV_NAME,
233 [4] = LSM330DLC_ACCEL_DEV_NAME,
234 [5] = LSM303AGR_ACCEL_DEV_NAME,
235 [6] = LIS2DH12_ACCEL_DEV_NAME,
237 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
239 .addr = ST_ACCEL_1_ODR_ADDR,
240 .mask = ST_ACCEL_1_ODR_MASK,
242 { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, },
243 { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, },
244 { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, },
245 { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, },
246 { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, },
247 { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, },
248 { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, },
249 { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, },
253 .addr = ST_ACCEL_1_ODR_ADDR,
254 .mask = ST_ACCEL_1_ODR_MASK,
255 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
258 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
259 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
262 .addr = ST_ACCEL_1_FS_ADDR,
263 .mask = ST_ACCEL_1_FS_MASK,
266 .num = ST_ACCEL_FS_AVL_2G,
267 .value = ST_ACCEL_1_FS_AVL_2_VAL,
268 .gain = ST_ACCEL_1_FS_AVL_2_GAIN,
271 .num = ST_ACCEL_FS_AVL_4G,
272 .value = ST_ACCEL_1_FS_AVL_4_VAL,
273 .gain = ST_ACCEL_1_FS_AVL_4_GAIN,
276 .num = ST_ACCEL_FS_AVL_8G,
277 .value = ST_ACCEL_1_FS_AVL_8_VAL,
278 .gain = ST_ACCEL_1_FS_AVL_8_GAIN,
281 .num = ST_ACCEL_FS_AVL_16G,
282 .value = ST_ACCEL_1_FS_AVL_16_VAL,
283 .gain = ST_ACCEL_1_FS_AVL_16_GAIN,
288 .addr = ST_ACCEL_1_BDU_ADDR,
289 .mask = ST_ACCEL_1_BDU_MASK,
292 .addr = ST_ACCEL_1_DRDY_IRQ_ADDR,
293 .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK,
294 .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK,
296 .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT,
300 .wai = ST_ACCEL_2_WAI_EXP,
301 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
302 .sensors_supported = {
303 [0] = LIS331DLH_ACCEL_DEV_NAME,
304 [1] = LSM303DL_ACCEL_DEV_NAME,
305 [2] = LSM303DLH_ACCEL_DEV_NAME,
306 [3] = LSM303DLM_ACCEL_DEV_NAME,
308 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
310 .addr = ST_ACCEL_2_ODR_ADDR,
311 .mask = ST_ACCEL_2_ODR_MASK,
313 { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, },
314 { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, },
315 { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, },
316 { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, },
320 .addr = ST_ACCEL_2_PW_ADDR,
321 .mask = ST_ACCEL_2_PW_MASK,
322 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
323 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
326 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
327 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
330 .addr = ST_ACCEL_2_FS_ADDR,
331 .mask = ST_ACCEL_2_FS_MASK,
334 .num = ST_ACCEL_FS_AVL_2G,
335 .value = ST_ACCEL_2_FS_AVL_2_VAL,
336 .gain = ST_ACCEL_2_FS_AVL_2_GAIN,
339 .num = ST_ACCEL_FS_AVL_4G,
340 .value = ST_ACCEL_2_FS_AVL_4_VAL,
341 .gain = ST_ACCEL_2_FS_AVL_4_GAIN,
344 .num = ST_ACCEL_FS_AVL_8G,
345 .value = ST_ACCEL_2_FS_AVL_8_VAL,
346 .gain = ST_ACCEL_2_FS_AVL_8_GAIN,
351 .addr = ST_ACCEL_2_BDU_ADDR,
352 .mask = ST_ACCEL_2_BDU_MASK,
355 .addr = ST_ACCEL_2_DRDY_IRQ_ADDR,
356 .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK,
357 .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK,
359 .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT,
363 .wai = ST_ACCEL_3_WAI_EXP,
364 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
365 .sensors_supported = {
366 [0] = LSM330_ACCEL_DEV_NAME,
368 .ch = (struct iio_chan_spec *)st_accel_16bit_channels,
370 .addr = ST_ACCEL_3_ODR_ADDR,
371 .mask = ST_ACCEL_3_ODR_MASK,
373 { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL },
374 { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, },
375 { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, },
376 { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, },
377 { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, },
378 { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, },
379 { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, },
380 { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, },
381 { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, },
382 { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, },
386 .addr = ST_ACCEL_3_ODR_ADDR,
387 .mask = ST_ACCEL_3_ODR_MASK,
388 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
391 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
392 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
395 .addr = ST_ACCEL_3_FS_ADDR,
396 .mask = ST_ACCEL_3_FS_MASK,
399 .num = ST_ACCEL_FS_AVL_2G,
400 .value = ST_ACCEL_3_FS_AVL_2_VAL,
401 .gain = ST_ACCEL_3_FS_AVL_2_GAIN,
404 .num = ST_ACCEL_FS_AVL_4G,
405 .value = ST_ACCEL_3_FS_AVL_4_VAL,
406 .gain = ST_ACCEL_3_FS_AVL_4_GAIN,
409 .num = ST_ACCEL_FS_AVL_6G,
410 .value = ST_ACCEL_3_FS_AVL_6_VAL,
411 .gain = ST_ACCEL_3_FS_AVL_6_GAIN,
414 .num = ST_ACCEL_FS_AVL_8G,
415 .value = ST_ACCEL_3_FS_AVL_8_VAL,
416 .gain = ST_ACCEL_3_FS_AVL_8_GAIN,
419 .num = ST_ACCEL_FS_AVL_16G,
420 .value = ST_ACCEL_3_FS_AVL_16_VAL,
421 .gain = ST_ACCEL_3_FS_AVL_16_GAIN,
426 .addr = ST_ACCEL_3_BDU_ADDR,
427 .mask = ST_ACCEL_3_BDU_MASK,
430 .addr = ST_ACCEL_3_DRDY_IRQ_ADDR,
431 .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK,
432 .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK,
434 .en_addr = ST_ACCEL_3_IG1_EN_ADDR,
435 .en_mask = ST_ACCEL_3_IG1_EN_MASK,
438 .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
442 .wai = ST_ACCEL_4_WAI_EXP,
443 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
444 .sensors_supported = {
445 [0] = LIS3LV02DL_ACCEL_DEV_NAME,
447 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
449 .addr = ST_ACCEL_4_ODR_ADDR,
450 .mask = ST_ACCEL_4_ODR_MASK,
452 { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
453 { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
454 { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
455 { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
459 .addr = ST_ACCEL_4_PW_ADDR,
460 .mask = ST_ACCEL_4_PW_MASK,
461 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
462 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
465 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
466 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
469 .addr = ST_ACCEL_4_FS_ADDR,
470 .mask = ST_ACCEL_4_FS_MASK,
473 .num = ST_ACCEL_FS_AVL_2G,
474 .value = ST_ACCEL_4_FS_AVL_2_VAL,
475 .gain = ST_ACCEL_4_FS_AVL_2_GAIN,
478 .num = ST_ACCEL_FS_AVL_6G,
479 .value = ST_ACCEL_4_FS_AVL_6_VAL,
480 .gain = ST_ACCEL_4_FS_AVL_6_GAIN,
485 .addr = ST_ACCEL_4_BDU_ADDR,
486 .mask = ST_ACCEL_4_BDU_MASK,
489 .addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
490 .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
492 .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
493 .bootime = 2, /* guess */
496 .wai = ST_ACCEL_5_WAI_EXP,
497 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
498 .sensors_supported = {
499 [0] = LIS331DL_ACCEL_DEV_NAME,
501 .ch = (struct iio_chan_spec *)st_accel_8bit_channels,
503 .addr = ST_ACCEL_5_ODR_ADDR,
504 .mask = ST_ACCEL_5_ODR_MASK,
506 { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL },
507 { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, },
511 .addr = ST_ACCEL_5_PW_ADDR,
512 .mask = ST_ACCEL_5_PW_MASK,
513 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
514 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
517 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
518 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
521 .addr = ST_ACCEL_5_FS_ADDR,
522 .mask = ST_ACCEL_5_FS_MASK,
525 .num = ST_ACCEL_FS_AVL_2G,
526 .value = ST_ACCEL_5_FS_AVL_2_VAL,
527 .gain = ST_ACCEL_5_FS_AVL_2_GAIN,
530 .num = ST_ACCEL_FS_AVL_8G,
531 .value = ST_ACCEL_5_FS_AVL_8_VAL,
532 .gain = ST_ACCEL_5_FS_AVL_8_GAIN,
537 .addr = ST_ACCEL_5_DRDY_IRQ_ADDR,
538 .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK,
539 .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK,
541 .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT,
542 .bootime = 2, /* guess */
546 static int st_accel_read_raw(struct iio_dev *indio_dev,
547 struct iio_chan_spec const *ch, int *val,
548 int *val2, long mask)
551 struct st_sensor_data *adata = iio_priv(indio_dev);
554 case IIO_CHAN_INFO_RAW:
555 err = st_sensors_read_info_raw(indio_dev, ch, val);
560 case IIO_CHAN_INFO_SCALE:
562 *val2 = adata->current_fullscale->gain;
563 return IIO_VAL_INT_PLUS_MICRO;
564 case IIO_CHAN_INFO_SAMP_FREQ:
575 static int st_accel_write_raw(struct iio_dev *indio_dev,
576 struct iio_chan_spec const *chan, int val, int val2, long mask)
581 case IIO_CHAN_INFO_SCALE:
582 err = st_sensors_set_fullscale_by_gain(indio_dev, val2);
584 case IIO_CHAN_INFO_SAMP_FREQ:
587 mutex_lock(&indio_dev->mlock);
588 err = st_sensors_set_odr(indio_dev, val);
589 mutex_unlock(&indio_dev->mlock);
598 static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
599 static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available);
601 static struct attribute *st_accel_attributes[] = {
602 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
603 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
607 static const struct attribute_group st_accel_attribute_group = {
608 .attrs = st_accel_attributes,
611 static const struct iio_info accel_info = {
612 .driver_module = THIS_MODULE,
613 .attrs = &st_accel_attribute_group,
614 .read_raw = &st_accel_read_raw,
615 .write_raw = &st_accel_write_raw,
616 .debugfs_reg_access = &st_sensors_debugfs_reg_access,
619 #ifdef CONFIG_IIO_TRIGGER
620 static const struct iio_trigger_ops st_accel_trigger_ops = {
621 .owner = THIS_MODULE,
622 .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
624 #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
626 #define ST_ACCEL_TRIGGER_OPS NULL
629 int st_accel_common_probe(struct iio_dev *indio_dev)
631 struct st_sensor_data *adata = iio_priv(indio_dev);
632 int irq = adata->get_irq_data_ready(indio_dev);
635 indio_dev->modes = INDIO_DIRECT_MODE;
636 indio_dev->info = &accel_info;
637 mutex_init(&adata->tb.buf_lock);
639 st_sensors_power_enable(indio_dev);
641 err = st_sensors_check_device_support(indio_dev,
642 ARRAY_SIZE(st_accel_sensors_settings),
643 st_accel_sensors_settings);
647 adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS;
648 adata->multiread_bit = adata->sensor_settings->multi_read_bit;
649 indio_dev->channels = adata->sensor_settings->ch;
650 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
652 adata->current_fullscale = (struct st_sensor_fullscale_avl *)
653 &adata->sensor_settings->fs.fs_avl[0];
654 adata->odr = adata->sensor_settings->odr.odr_avl[0].hz;
656 if (!adata->dev->platform_data)
657 adata->dev->platform_data =
658 (struct st_sensors_platform_data *)&default_accel_pdata;
660 err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data);
664 err = st_accel_allocate_ring(indio_dev);
669 err = st_sensors_allocate_trigger(indio_dev,
670 ST_ACCEL_TRIGGER_OPS);
672 goto st_accel_probe_trigger_error;
675 err = iio_device_register(indio_dev);
677 goto st_accel_device_register_error;
679 dev_info(&indio_dev->dev, "registered accelerometer %s\n",
684 st_accel_device_register_error:
686 st_sensors_deallocate_trigger(indio_dev);
687 st_accel_probe_trigger_error:
688 st_accel_deallocate_ring(indio_dev);
692 EXPORT_SYMBOL(st_accel_common_probe);
694 void st_accel_common_remove(struct iio_dev *indio_dev)
696 struct st_sensor_data *adata = iio_priv(indio_dev);
698 st_sensors_power_disable(indio_dev);
700 iio_device_unregister(indio_dev);
701 if (adata->get_irq_data_ready(indio_dev) > 0)
702 st_sensors_deallocate_trigger(indio_dev);
704 st_accel_deallocate_ring(indio_dev);
706 EXPORT_SYMBOL(st_accel_common_remove);
708 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
709 MODULE_DESCRIPTION("STMicroelectronics accelerometers driver");
710 MODULE_LICENSE("GPL v2");