2 * Aspeed AST2400/2500 ADC
4 * Copyright (C) 2017 Google, Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
12 #include <linux/clk.h>
13 #include <linux/clk-provider.h>
14 #include <linux/err.h>
15 #include <linux/errno.h>
17 #include <linux/module.h>
18 #include <linux/of_platform.h>
19 #include <linux/platform_device.h>
20 #include <linux/spinlock.h>
21 #include <linux/types.h>
23 #include <linux/iio/iio.h>
24 #include <linux/iio/driver.h>
26 #define ASPEED_RESOLUTION_BITS 10
27 #define ASPEED_CLOCKS_PER_SAMPLE 12
29 #define ASPEED_REG_ENGINE_CONTROL 0x00
30 #define ASPEED_REG_INTERRUPT_CONTROL 0x04
31 #define ASPEED_REG_VGA_DETECT_CONTROL 0x08
32 #define ASPEED_REG_CLOCK_CONTROL 0x0C
33 #define ASPEED_REG_MAX 0xC0
35 #define ASPEED_OPERATION_MODE_POWER_DOWN (0x0 << 1)
36 #define ASPEED_OPERATION_MODE_STANDBY (0x1 << 1)
37 #define ASPEED_OPERATION_MODE_NORMAL (0x7 << 1)
39 #define ASPEED_ENGINE_ENABLE BIT(0)
41 struct aspeed_adc_model_data {
42 const char *model_name;
43 unsigned int min_sampling_rate; // Hz
44 unsigned int max_sampling_rate; // Hz
45 unsigned int vref_voltage; // mV
48 struct aspeed_adc_data {
52 struct clk_hw *clk_prescaler;
53 struct clk_hw *clk_scaler;
56 #define ASPEED_CHAN(_idx, _data_reg_addr) { \
57 .type = IIO_VOLTAGE, \
60 .address = (_data_reg_addr), \
61 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
62 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
63 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
66 static const struct iio_chan_spec aspeed_adc_iio_channels[] = {
77 ASPEED_CHAN(10, 0x24),
78 ASPEED_CHAN(11, 0x26),
79 ASPEED_CHAN(12, 0x28),
80 ASPEED_CHAN(13, 0x2A),
81 ASPEED_CHAN(14, 0x2C),
82 ASPEED_CHAN(15, 0x2E),
85 static int aspeed_adc_read_raw(struct iio_dev *indio_dev,
86 struct iio_chan_spec const *chan,
87 int *val, int *val2, long mask)
89 struct aspeed_adc_data *data = iio_priv(indio_dev);
90 const struct aspeed_adc_model_data *model_data =
91 of_device_get_match_data(data->dev);
94 case IIO_CHAN_INFO_RAW:
95 *val = readw(data->base + chan->address);
98 case IIO_CHAN_INFO_SCALE:
99 *val = model_data->vref_voltage;
100 *val2 = ASPEED_RESOLUTION_BITS;
101 return IIO_VAL_FRACTIONAL_LOG2;
103 case IIO_CHAN_INFO_SAMP_FREQ:
104 *val = clk_get_rate(data->clk_scaler->clk) /
105 ASPEED_CLOCKS_PER_SAMPLE;
113 static int aspeed_adc_write_raw(struct iio_dev *indio_dev,
114 struct iio_chan_spec const *chan,
115 int val, int val2, long mask)
117 struct aspeed_adc_data *data = iio_priv(indio_dev);
118 const struct aspeed_adc_model_data *model_data =
119 of_device_get_match_data(data->dev);
122 case IIO_CHAN_INFO_SAMP_FREQ:
123 if (val < model_data->min_sampling_rate ||
124 val > model_data->max_sampling_rate)
127 clk_set_rate(data->clk_scaler->clk,
128 val * ASPEED_CLOCKS_PER_SAMPLE);
131 case IIO_CHAN_INFO_SCALE:
132 case IIO_CHAN_INFO_RAW:
134 * Technically, these could be written but the only reasons
135 * for doing so seem better handled in userspace. EPERM is
136 * returned to signal this is a policy choice rather than a
137 * hardware limitation.
146 static int aspeed_adc_reg_access(struct iio_dev *indio_dev,
147 unsigned int reg, unsigned int writeval,
148 unsigned int *readval)
150 struct aspeed_adc_data *data = iio_priv(indio_dev);
152 if (!readval || reg % 4 || reg > ASPEED_REG_MAX)
155 *readval = readl(data->base + reg);
160 static const struct iio_info aspeed_adc_iio_info = {
161 .driver_module = THIS_MODULE,
162 .read_raw = aspeed_adc_read_raw,
163 .write_raw = aspeed_adc_write_raw,
164 .debugfs_reg_access = aspeed_adc_reg_access,
167 static int aspeed_adc_probe(struct platform_device *pdev)
169 struct iio_dev *indio_dev;
170 struct aspeed_adc_data *data;
171 const struct aspeed_adc_model_data *model_data;
172 struct resource *res;
173 const char *clk_parent_name;
175 u32 adc_engine_control_reg_val;
177 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*data));
181 data = iio_priv(indio_dev);
182 data->dev = &pdev->dev;
184 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
185 data->base = devm_ioremap_resource(&pdev->dev, res);
186 if (IS_ERR(data->base))
187 return PTR_ERR(data->base);
189 /* Register ADC clock prescaler with source specified by device tree. */
190 spin_lock_init(&data->clk_lock);
191 clk_parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
193 data->clk_prescaler = clk_hw_register_divider(
194 &pdev->dev, "prescaler", clk_parent_name, 0,
195 data->base + ASPEED_REG_CLOCK_CONTROL,
196 17, 15, 0, &data->clk_lock);
197 if (IS_ERR(data->clk_prescaler))
198 return PTR_ERR(data->clk_prescaler);
201 * Register ADC clock scaler downstream from the prescaler. Allow rate
202 * setting to adjust the prescaler as well.
204 data->clk_scaler = clk_hw_register_divider(
205 &pdev->dev, "scaler", "prescaler",
207 data->base + ASPEED_REG_CLOCK_CONTROL,
208 0, 10, 0, &data->clk_lock);
209 if (IS_ERR(data->clk_scaler)) {
210 ret = PTR_ERR(data->clk_scaler);
214 /* Start all channels in normal mode. */
215 ret = clk_prepare_enable(data->clk_scaler->clk);
217 goto clk_enable_error;
219 adc_engine_control_reg_val = GENMASK(31, 16) |
220 ASPEED_OPERATION_MODE_NORMAL | ASPEED_ENGINE_ENABLE;
221 writel(adc_engine_control_reg_val,
222 data->base + ASPEED_REG_ENGINE_CONTROL);
224 model_data = of_device_get_match_data(&pdev->dev);
225 indio_dev->name = model_data->model_name;
226 indio_dev->dev.parent = &pdev->dev;
227 indio_dev->info = &aspeed_adc_iio_info;
228 indio_dev->modes = INDIO_DIRECT_MODE;
229 indio_dev->channels = aspeed_adc_iio_channels;
230 indio_dev->num_channels = ARRAY_SIZE(aspeed_adc_iio_channels);
232 ret = iio_device_register(indio_dev);
234 goto iio_register_error;
239 writel(ASPEED_OPERATION_MODE_POWER_DOWN,
240 data->base + ASPEED_REG_ENGINE_CONTROL);
241 clk_disable_unprepare(data->clk_scaler->clk);
243 clk_hw_unregister_divider(data->clk_scaler);
246 clk_hw_unregister_divider(data->clk_prescaler);
250 static int aspeed_adc_remove(struct platform_device *pdev)
252 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
253 struct aspeed_adc_data *data = iio_priv(indio_dev);
255 iio_device_unregister(indio_dev);
256 writel(ASPEED_OPERATION_MODE_POWER_DOWN,
257 data->base + ASPEED_REG_ENGINE_CONTROL);
258 clk_disable_unprepare(data->clk_scaler->clk);
259 clk_hw_unregister_divider(data->clk_scaler);
260 clk_hw_unregister_divider(data->clk_prescaler);
265 static const struct aspeed_adc_model_data ast2400_model_data = {
266 .model_name = "ast2400-adc",
267 .vref_voltage = 2500, // mV
268 .min_sampling_rate = 10000,
269 .max_sampling_rate = 500000,
272 static const struct aspeed_adc_model_data ast2500_model_data = {
273 .model_name = "ast2500-adc",
274 .vref_voltage = 1800, // mV
275 .min_sampling_rate = 1,
276 .max_sampling_rate = 1000000,
279 static const struct of_device_id aspeed_adc_matches[] = {
280 { .compatible = "aspeed,ast2400-adc", .data = &ast2400_model_data },
281 { .compatible = "aspeed,ast2500-adc", .data = &ast2500_model_data },
284 MODULE_DEVICE_TABLE(of, aspeed_adc_matches);
286 static struct platform_driver aspeed_adc_driver = {
287 .probe = aspeed_adc_probe,
288 .remove = aspeed_adc_remove,
290 .name = KBUILD_MODNAME,
291 .of_match_table = aspeed_adc_matches,
295 module_platform_driver(aspeed_adc_driver);
297 MODULE_AUTHOR("Rick Altherr <raltherr@google.com>");
298 MODULE_DESCRIPTION("Aspeed AST2400/2500 ADC Driver");
299 MODULE_LICENSE("GPL");