drivers/iio/adc/at91_adc.c

   1 /*
   2  * Driver for the ADC present in the Atmel AT91 evaluation boards.
   3  *
   4  * Copyright 2011 Free Electrons
   5  *
   6  * Licensed under the GPLv2 or later.
   7  */
   8
   9 #include <linux/bitmap.h>
  10 #include <linux/bitops.h>
  11 #include <linux/clk.h>
  12 #include <linux/err.h>
  13 #include <linux/io.h>
  14 #include <linux/input.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/jiffies.h>
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/of.h>
  20 #include <linux/of_device.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/sched.h>
  23 #include <linux/slab.h>
  24 #include <linux/wait.h>
  25
  26 #include <linux/platform_data/at91_adc.h>
  27
  28 #include <linux/iio/iio.h>
  29 #include <linux/iio/buffer.h>
  30 #include <linux/iio/trigger.h>
  31 #include <linux/iio/trigger_consumer.h>
  32 #include <linux/iio/triggered_buffer.h>
  33
  34 #include <mach/at91_adc.h>
  35
  36 #define AT91_ADC_CHAN(st, ch) \
  37         (st->registers->channel_base + (ch * 4))
  38 #define at91_adc_readl(st, reg) \
  39         (readl_relaxed(st->reg_base + reg))
  40 #define at91_adc_writel(st, reg, val) \
  41         (writel_relaxed(val, st->reg_base + reg))
  42
  43 #define DRIVER_NAME             "at91_adc"
  44 #define MAX_POS_BITS            12
  45
  46 #define TOUCH_SAMPLE_PERIOD_US          2000    /* 2ms */
  47 #define TOUCH_PEN_DETECT_DEBOUNCE_US    200
  48
  49 /**
  50  * struct at91_adc_reg_desc - Various informations relative to registers
  51  * @channel_base:       Base offset for the channel data registers
  52  * @drdy_mask:          Mask of the DRDY field in the relevant registers
  53                         (Interruptions registers mostly)
  54  * @status_register:    Offset of the Interrupt Status Register
  55  * @trigger_register:   Offset of the Trigger setup register
  56  * @mr_prescal_mask:    Mask of the PRESCAL field in the adc MR register
  57  * @mr_startup_mask:    Mask of the STARTUP field in the adc MR register
  58  */
  59 struct at91_adc_reg_desc {
  60         u8      channel_base;
  61         u32     drdy_mask;
  62         u8      status_register;
  63         u8      trigger_register;
  64         u32     mr_prescal_mask;
  65         u32     mr_startup_mask;
  66 };
  67
  68 struct at91_adc_caps {
  69         bool    has_ts;         /* Support touch screen */
  70         bool    has_tsmr;       /* only at91sam9x5, sama5d3 have TSMR reg */
  71         /*
  72          * Numbers of sampling data will be averaged. Can be 0~3.
  73          * Hardware can average (2 ^ ts_filter_average) sample data.
  74          */
  75         u8      ts_filter_average;
  76         /* Pen Detection input pull-up resistor, can be 0~3 */
  77         u8      ts_pen_detect_sensitivity;
  78
  79         /* startup time calculate function */
  80         u32 (*calc_startup_ticks)(u8 startup_time, u32 adc_clk_khz);
  81
  82         u8      num_channels;
  83         struct at91_adc_reg_desc registers;
  84 };
  85
  86 enum atmel_adc_ts_type {
  87         ATMEL_ADC_TOUCHSCREEN_NONE = 0,
  88         ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
  89         ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
  90 };
  91
  92 struct at91_adc_state {
  93         struct clk              *adc_clk;
  94         u16                     *buffer;
  95         unsigned long           channels_mask;
  96         struct clk              *clk;
  97         bool                    done;
  98         int                     irq;
  99         u16                     last_value;
 100         struct mutex            lock;
 101         u8                      num_channels;
 102         void __iomem            *reg_base;
 103         struct at91_adc_reg_desc *registers;
 104         u8                      startup_time;
 105         u8                      sample_hold_time;
 106         bool                    sleep_mode;
 107         struct iio_trigger      **trig;
 108         struct at91_adc_trigger *trigger_list;
 109         u32                     trigger_number;
 110         bool                    use_external;
 111         u32                     vref_mv;
 112         u32                     res;            /* resolution used for convertions */
 113         bool                    low_res;        /* the resolution corresponds to the lowest one */
 114         wait_queue_head_t       wq_data_avail;
 115         struct at91_adc_caps    *caps;
 116
 117         /*
 118          * Following ADC channels are shared by touchscreen:
 119          *
 120          * CH0 -- Touch screen XP/UL
 121          * CH1 -- Touch screen XM/UR
 122          * CH2 -- Touch screen YP/LL
 123          * CH3 -- Touch screen YM/Sense
 124          * CH4 -- Touch screen LR(5-wire only)
 125          *
 126          * The bitfields below represents the reserved channel in the
 127          * touchscreen mode.
 128          */
 129 #define CHAN_MASK_TOUCHSCREEN_4WIRE     (0xf << 0)
 130 #define CHAN_MASK_TOUCHSCREEN_5WIRE     (0x1f << 0)
 131         enum atmel_adc_ts_type  touchscreen_type;
 132         struct input_dev        *ts_input;
 133
 134         u16                     ts_sample_period_val;
 135         u32                     ts_pressure_threshold;
 136 };
 137
 138 static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
 139 {
 140         struct iio_poll_func *pf = p;
 141         struct iio_dev *idev = pf->indio_dev;
 142         struct at91_adc_state *st = iio_priv(idev);
 143         int i, j = 0;
 144
 145         for (i = 0; i < idev->masklength; i++) {
 146                 if (!test_bit(i, idev->active_scan_mask))
 147                         continue;
 148                 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i));
 149                 j++;
 150         }
 151
 152         iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp);
 153
 154         iio_trigger_notify_done(idev->trig);
 155
 156         /* Needed to ACK the DRDY interruption */
 157         at91_adc_readl(st, AT91_ADC_LCDR);
 158
 159         enable_irq(st->irq);
 160
 161         return IRQ_HANDLED;
 162 }
 163
 164 /* Handler for classic adc channel eoc trigger */
 165 void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)
 166 {
 167         struct at91_adc_state *st = iio_priv(idev);
 168
 169         if (iio_buffer_enabled(idev)) {
 170                 disable_irq_nosync(irq);
 171                 iio_trigger_poll(idev->trig, iio_get_time_ns());
 172         } else {
 173                 st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
 174                 st->done = true;
 175                 wake_up_interruptible(&st->wq_data_avail);
 176         }
 177 }
 178
 179 static int at91_ts_sample(struct at91_adc_state *st)
 180 {
 181         unsigned int xscale, yscale, reg, z1, z2;
 182         unsigned int x, y, pres, xpos, ypos;
 183         unsigned int rxp = 1;
 184         unsigned int factor = 1000;
 185         struct iio_dev *idev = iio_priv_to_dev(st);
 186
 187         unsigned int xyz_mask_bits = st->res;
 188         unsigned int xyz_mask = (1 << xyz_mask_bits) - 1;
 189
 190         /* calculate position */
 191         /* x position = (x / xscale) * max, max = 2^MAX_POS_BITS - 1 */
 192         reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);
 193         xpos = reg & xyz_mask;
 194         x = (xpos << MAX_POS_BITS) - xpos;
 195         xscale = (reg >> 16) & xyz_mask;
 196         if (xscale == 0) {
 197                 dev_err(&idev->dev, "Error: xscale == 0!\n");
 198                 return -1;
 199         }
 200         x /= xscale;
 201
 202         /* y position = (y / yscale) * max, max = 2^MAX_POS_BITS - 1 */
 203         reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);
 204         ypos = reg & xyz_mask;
 205         y = (ypos << MAX_POS_BITS) - ypos;
 206         yscale = (reg >> 16) & xyz_mask;
 207         if (yscale == 0) {
 208                 dev_err(&idev->dev, "Error: yscale == 0!\n");
 209                 return -1;
 210         }
 211         y /= yscale;
 212
 213         /* calculate the pressure */
 214         reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);
 215         z1 = reg & xyz_mask;
 216         z2 = (reg >> 16) & xyz_mask;
 217
 218         if (z1 != 0)
 219                 pres = rxp * (x * factor / 1024) * (z2 * factor / z1 - factor)
 220                         / factor;
 221         else
 222                 pres = st->ts_pressure_threshold;       /* no pen contacted */
 223
 224         dev_dbg(&idev->dev, "xpos = %d, xscale = %d, ypos = %d, yscale = %d, z1 = %d, z2 = %d, press = %d\n",
 225                                 xpos, xscale, ypos, yscale, z1, z2, pres);
 226
 227         if (pres < st->ts_pressure_threshold) {
 228                 dev_dbg(&idev->dev, "x = %d, y = %d, pressure = %d\n",
 229                                         x, y, pres / factor);
 230                 input_report_abs(st->ts_input, ABS_X, x);
 231                 input_report_abs(st->ts_input, ABS_Y, y);
 232                 input_report_abs(st->ts_input, ABS_PRESSURE, pres);
 233                 input_report_key(st->ts_input, BTN_TOUCH, 1);
 234                 input_sync(st->ts_input);
 235         } else {
 236                 dev_dbg(&idev->dev, "pressure too low: not reporting\n");
 237         }
 238
 239         return 0;
 240 }
 241
 242 static irqreturn_t at91_adc_interrupt(int irq, void *private)
 243 {
 244         struct iio_dev *idev = private;
 245         struct at91_adc_state *st = iio_priv(idev);
 246         u32 status = at91_adc_readl(st, st->registers->status_register);
 247         const uint32_t ts_data_irq_mask =
 248                 AT91_ADC_IER_XRDY |
 249                 AT91_ADC_IER_YRDY |
 250                 AT91_ADC_IER_PRDY;
 251
 252         if (status & st->registers->drdy_mask)
 253                 handle_adc_eoc_trigger(irq, idev);
 254
 255         if (status & AT91_ADC_IER_PEN) {
 256                 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
 257                 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_NOPEN |
 258                         ts_data_irq_mask);
 259                 /* Set up period trigger for sampling */
 260                 at91_adc_writel(st, st->registers->trigger_register,
 261                         AT91_ADC_TRGR_MOD_PERIOD_TRIG |
 262                         AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
 263         } else if (status & AT91_ADC_IER_NOPEN) {
 264                 at91_adc_writel(st, st->registers->trigger_register, 0);
 265                 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_NOPEN |
 266                         ts_data_irq_mask);
 267                 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
 268
 269                 input_report_key(st->ts_input, BTN_TOUCH, 0);
 270                 input_sync(st->ts_input);
 271         } else if ((status & ts_data_irq_mask) == ts_data_irq_mask) {
 272                 /* Now all touchscreen data is ready */
 273
 274                 if (status & AT91_ADC_ISR_PENS) {
 275                         /* validate data by pen contact */
 276                         at91_ts_sample(st);
 277                 } else {
 278                         /* triggered by event that is no pen contact, just read
 279                          * them to clean the interrupt and discard all.
 280                          */
 281                         at91_adc_readl(st, AT91_ADC_TSXPOSR);
 282                         at91_adc_readl(st, AT91_ADC_TSYPOSR);
 283                         at91_adc_readl(st, AT91_ADC_TSPRESSR);
 284                 }
 285         }
 286
 287         return IRQ_HANDLED;
 288 }
 289
 290 static int at91_adc_channel_init(struct iio_dev *idev)
 291 {
 292         struct at91_adc_state *st = iio_priv(idev);
 293         struct iio_chan_spec *chan_array, *timestamp;
 294         int bit, idx = 0;
 295         unsigned long rsvd_mask = 0;
 296
 297         /* If touchscreen is enable, then reserve the adc channels */
 298         if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
 299                 rsvd_mask = CHAN_MASK_TOUCHSCREEN_4WIRE;
 300         else if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_5WIRE)
 301                 rsvd_mask = CHAN_MASK_TOUCHSCREEN_5WIRE;
 302
 303         /* set up the channel mask to reserve touchscreen channels */
 304         st->channels_mask &= ~rsvd_mask;
 305
 306         idev->num_channels = bitmap_weight(&st->channels_mask,
 307                                            st->num_channels) + 1;
 308
 309         chan_array = devm_kzalloc(&idev->dev,
 310                                   ((idev->num_channels + 1) *
 311                                         sizeof(struct iio_chan_spec)),
 312                                   GFP_KERNEL);
 313
 314         if (!chan_array)
 315                 return -ENOMEM;
 316
 317         for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
 318                 struct iio_chan_spec *chan = chan_array + idx;
 319
 320                 chan->type = IIO_VOLTAGE;
 321                 chan->indexed = 1;
 322                 chan->channel = bit;
 323                 chan->scan_index = idx;
 324                 chan->scan_type.sign = 'u';
 325                 chan->scan_type.realbits = st->res;
 326                 chan->scan_type.storagebits = 16;
 327                 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 328                 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 329                 idx++;
 330         }
 331         timestamp = chan_array + idx;
 332
 333         timestamp->type = IIO_TIMESTAMP;
 334         timestamp->channel = -1;
 335         timestamp->scan_index = idx;
 336         timestamp->scan_type.sign = 's';
 337         timestamp->scan_type.realbits = 64;
 338         timestamp->scan_type.storagebits = 64;
 339
 340         idev->channels = chan_array;
 341         return idev->num_channels;
 342 }
 343
 344 static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
 345                                              struct at91_adc_trigger *triggers,
 346                                              const char *trigger_name)
 347 {
 348         struct at91_adc_state *st = iio_priv(idev);
 349         u8 value = 0;
 350         int i;
 351
 352         for (i = 0; i < st->trigger_number; i++) {
 353                 char *name = kasprintf(GFP_KERNEL,
 354                                 "%s-dev%d-%s",
 355                                 idev->name,
 356                                 idev->id,
 357                                 triggers[i].name);
 358                 if (!name)
 359                         return -ENOMEM;
 360
 361                 if (strcmp(trigger_name, name) == 0) {
 362                         value = triggers[i].value;
 363                         kfree(name);
 364                         break;
 365                 }
 366
 367                 kfree(name);
 368         }
 369
 370         return value;
 371 }
 372
 373 static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
 374 {
 375         struct iio_dev *idev = iio_trigger_get_drvdata(trig);
 376         struct at91_adc_state *st = iio_priv(idev);
 377         struct iio_buffer *buffer = idev->buffer;
 378         struct at91_adc_reg_desc *reg = st->registers;
 379         u32 status = at91_adc_readl(st, reg->trigger_register);
 380         u8 value;
 381         u8 bit;
 382
 383         value = at91_adc_get_trigger_value_by_name(idev,
 384                                                    st->trigger_list,
 385                                                    idev->trig->name);
 386         if (value == 0)
 387                 return -EINVAL;
 388
 389         if (state) {
 390                 st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
 391                 if (st->buffer == NULL)
 392                         return -ENOMEM;
 393
 394                 at91_adc_writel(st, reg->trigger_register,
 395                                 status | value);
 396
 397                 for_each_set_bit(bit, buffer->scan_mask,
 398                                  st->num_channels) {
 399                         struct iio_chan_spec const *chan = idev->channels + bit;
 400                         at91_adc_writel(st, AT91_ADC_CHER,
 401                                         AT91_ADC_CH(chan->channel));
 402                 }
 403
 404                 at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
 405
 406         } else {
 407                 at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
 408
 409                 at91_adc_writel(st, reg->trigger_register,
 410                                 status & ~value);
 411
 412                 for_each_set_bit(bit, buffer->scan_mask,
 413                                  st->num_channels) {
 414                         struct iio_chan_spec const *chan = idev->channels + bit;
 415                         at91_adc_writel(st, AT91_ADC_CHDR,
 416                                         AT91_ADC_CH(chan->channel));
 417                 }
 418                 kfree(st->buffer);
 419         }
 420
 421         return 0;
 422 }
 423
 424 static const struct iio_trigger_ops at91_adc_trigger_ops = {
 425         .owner = THIS_MODULE,
 426         .set_trigger_state = &at91_adc_configure_trigger,
 427 };
 428
 429 static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
 430                                                      struct at91_adc_trigger *trigger)
 431 {
 432         struct iio_trigger *trig;
 433         int ret;
 434
 435         trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
 436                                  idev->id, trigger->name);
 437         if (trig == NULL)
 438                 return NULL;
 439
 440         trig->dev.parent = idev->dev.parent;
 441         iio_trigger_set_drvdata(trig, idev);
 442         trig->ops = &at91_adc_trigger_ops;
 443
 444         ret = iio_trigger_register(trig);
 445         if (ret)
 446                 return NULL;
 447
 448         return trig;
 449 }
 450
 451 static int at91_adc_trigger_init(struct iio_dev *idev)
 452 {
 453         struct at91_adc_state *st = iio_priv(idev);
 454         int i, ret;
 455
 456         st->trig = devm_kzalloc(&idev->dev,
 457                                 st->trigger_number * sizeof(*st->trig),
 458                                 GFP_KERNEL);
 459
 460         if (st->trig == NULL) {
 461                 ret = -ENOMEM;
 462                 goto error_ret;
 463         }
 464
 465         for (i = 0; i < st->trigger_number; i++) {
 466                 if (st->trigger_list[i].is_external && !(st->use_external))
 467                         continue;
 468
 469                 st->trig[i] = at91_adc_allocate_trigger(idev,
 470                                                         st->trigger_list + i);
 471                 if (st->trig[i] == NULL) {
 472                         dev_err(&idev->dev,
 473                                 "Could not allocate trigger %d\n", i);
 474                         ret = -ENOMEM;
 475                         goto error_trigger;
 476                 }
 477         }
 478
 479         return 0;
 480
 481 error_trigger:
 482         for (i--; i >= 0; i--) {
 483                 iio_trigger_unregister(st->trig[i]);
 484                 iio_trigger_free(st->trig[i]);
 485         }
 486 error_ret:
 487         return ret;
 488 }
 489
 490 static void at91_adc_trigger_remove(struct iio_dev *idev)
 491 {
 492         struct at91_adc_state *st = iio_priv(idev);
 493         int i;
 494
 495         for (i = 0; i < st->trigger_number; i++) {
 496                 iio_trigger_unregister(st->trig[i]);
 497                 iio_trigger_free(st->trig[i]);
 498         }
 499 }
 500
 501 static int at91_adc_buffer_init(struct iio_dev *idev)
 502 {
 503         return iio_triggered_buffer_setup(idev, &iio_pollfunc_store_time,
 504                 &at91_adc_trigger_handler, NULL);
 505 }
 506
 507 static void at91_adc_buffer_remove(struct iio_dev *idev)
 508 {
 509         iio_triggered_buffer_cleanup(idev);
 510 }
 511
 512 static int at91_adc_read_raw(struct iio_dev *idev,
 513                              struct iio_chan_spec const *chan,
 514                              int *val, int *val2, long mask)
 515 {
 516         struct at91_adc_state *st = iio_priv(idev);
 517         int ret;
 518
 519         switch (mask) {
 520         case IIO_CHAN_INFO_RAW:
 521                 mutex_lock(&st->lock);
 522
 523                 at91_adc_writel(st, AT91_ADC_CHER,
 524                                 AT91_ADC_CH(chan->channel));
 525                 at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask);
 526                 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
 527
 528                 ret = wait_event_interruptible_timeout(st->wq_data_avail,
 529                                                        st->done,
 530                                                        msecs_to_jiffies(1000));
 531                 if (ret == 0)
 532                         ret = -ETIMEDOUT;
 533                 if (ret < 0) {
 534                         mutex_unlock(&st->lock);
 535                         return ret;
 536                 }
 537
 538                 *val = st->last_value;
 539
 540                 at91_adc_writel(st, AT91_ADC_CHDR,
 541                                 AT91_ADC_CH(chan->channel));
 542                 at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask);
 543
 544                 st->last_value = 0;
 545                 st->done = false;
 546                 mutex_unlock(&st->lock);
 547                 return IIO_VAL_INT;
 548
 549         case IIO_CHAN_INFO_SCALE:
 550                 *val = st->vref_mv;
 551                 *val2 = chan->scan_type.realbits;
 552                 return IIO_VAL_FRACTIONAL_LOG2;
 553         default:
 554                 break;
 555         }
 556         return -EINVAL;
 557 }
 558
 559 static int at91_adc_of_get_resolution(struct at91_adc_state *st,
 560                                       struct platform_device *pdev)
 561 {
 562         struct iio_dev *idev = iio_priv_to_dev(st);
 563         struct device_node *np = pdev->dev.of_node;
 564         int count, i, ret = 0;
 565         char *res_name, *s;
 566         u32 *resolutions;
 567
 568         count = of_property_count_strings(np, "atmel,adc-res-names");
 569         if (count < 2) {
 570                 dev_err(&idev->dev, "You must specified at least two resolution names for "
 571                                     "adc-res-names property in the DT\n");
 572                 return count;
 573         }
 574
 575         resolutions = kmalloc(count * sizeof(*resolutions), GFP_KERNEL);
 576         if (!resolutions)
 577                 return -ENOMEM;
 578
 579         if (of_property_read_u32_array(np, "atmel,adc-res", resolutions, count)) {
 580                 dev_err(&idev->dev, "Missing adc-res property in the DT.\n");
 581                 ret = -ENODEV;
 582                 goto ret;
 583         }
 584
 585         if (of_property_read_string(np, "atmel,adc-use-res", (const char **)&res_name))
 586                 res_name = "highres";
 587
 588         for (i = 0; i < count; i++) {
 589                 if (of_property_read_string_index(np, "atmel,adc-res-names", i, (const char **)&s))
 590                         continue;
 591
 592                 if (strcmp(res_name, s))
 593                         continue;
 594
 595                 st->res = resolutions[i];
 596                 if (!strcmp(res_name, "lowres"))
 597                         st->low_res = true;
 598                 else
 599                         st->low_res = false;
 600
 601                 dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);
 602                 goto ret;
 603         }
 604
 605         dev_err(&idev->dev, "There is no resolution for %s\n", res_name);
 606
 607 ret:
 608         kfree(resolutions);
 609         return ret;
 610 }
 611
 612 static u32 calc_startup_ticks_9260(u8 startup_time, u32 adc_clk_khz)
 613 {
 614         /*
 615          * Number of ticks needed to cover the startup time of the ADC
 616          * as defined in the electrical characteristics of the board,
 617          * divided by 8. The formula thus is :
 618          *   Startup Time = (ticks + 1) * 8 / ADC Clock
 619          */
 620         return round_up((startup_time * adc_clk_khz / 1000) - 1, 8) / 8;
 621 }
 622
 623 static u32 calc_startup_ticks_9x5(u8 startup_time, u32 adc_clk_khz)
 624 {
 625         /*
 626          * For sama5d3x and at91sam9x5, the formula changes to:
 627          * Startup Time = <lookup_table_value> / ADC Clock
 628          */
 629         const int startup_lookup[] = {
 630                 0  , 8  , 16 , 24 ,
 631                 64 , 80 , 96 , 112,
 632                 512, 576, 640, 704,
 633                 768, 832, 896, 960
 634                 };
 635         int i, size = ARRAY_SIZE(startup_lookup);
 636         unsigned int ticks;
 637
 638         ticks = startup_time * adc_clk_khz / 1000;
 639         for (i = 0; i < size; i++)
 640                 if (ticks < startup_lookup[i])
 641                         break;
 642
 643         ticks = i;
 644         if (ticks == size)
 645                 /* Reach the end of lookup table */
 646                 ticks = size - 1;
 647
 648         return ticks;
 649 }
 650
 651 static const struct of_device_id at91_adc_dt_ids[];
 652
 653 static int at91_adc_probe_dt_ts(struct device_node *node,
 654         struct at91_adc_state *st, struct device *dev)
 655 {
 656         int ret;
 657         u32 prop;
 658
 659         ret = of_property_read_u32(node, "atmel,adc-ts-wires", &prop);
 660         if (ret) {
 661                 dev_info(dev, "ADC Touch screen is disabled.\n");
 662                 return 0;
 663         }
 664
 665         switch (prop) {
 666         case 4:
 667         case 5:
 668                 st->touchscreen_type = prop;
 669                 break;
 670         default:
 671                 dev_err(dev, "Unsupported number of touchscreen wires (%d). Should be 4 or 5.\n", prop);
 672                 return -EINVAL;
 673         }
 674
 675         prop = 0;
 676         of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
 677         st->ts_pressure_threshold = prop;
 678         if (st->ts_pressure_threshold) {
 679                 return 0;
 680         } else {
 681                 dev_err(dev, "Invalid pressure threshold for the touchscreen\n");
 682                 return -EINVAL;
 683         }
 684 }
 685
 686 static int at91_adc_probe_dt(struct at91_adc_state *st,
 687                              struct platform_device *pdev)
 688 {
 689         struct iio_dev *idev = iio_priv_to_dev(st);
 690         struct device_node *node = pdev->dev.of_node;
 691         struct device_node *trig_node;
 692         int i = 0, ret;
 693         u32 prop;
 694
 695         if (!node)
 696                 return -EINVAL;
 697
 698         st->caps = (struct at91_adc_caps *)
 699                 of_match_device(at91_adc_dt_ids, &pdev->dev)->data;
 700
 701         st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
 702
 703         if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
 704                 dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
 705                 ret = -EINVAL;
 706                 goto error_ret;
 707         }
 708         st->channels_mask = prop;
 709
 710         st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");
 711
 712         if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
 713                 dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
 714                 ret = -EINVAL;
 715                 goto error_ret;
 716         }
 717         st->startup_time = prop;
 718
 719         prop = 0;
 720         of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop);
 721         st->sample_hold_time = prop;
 722
 723         if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
 724                 dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
 725                 ret = -EINVAL;
 726                 goto error_ret;
 727         }
 728         st->vref_mv = prop;
 729
 730         ret = at91_adc_of_get_resolution(st, pdev);
 731         if (ret)
 732                 goto error_ret;
 733
 734         st->registers = &st->caps->registers;
 735         st->num_channels = st->caps->num_channels;
 736         st->trigger_number = of_get_child_count(node);
 737         st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number *
 738                                         sizeof(struct at91_adc_trigger),
 739                                         GFP_KERNEL);
 740         if (!st->trigger_list) {
 741                 dev_err(&idev->dev, "Could not allocate trigger list memory.\n");
 742                 ret = -ENOMEM;
 743                 goto error_ret;
 744         }
 745
 746         for_each_child_of_node(node, trig_node) {
 747                 struct at91_adc_trigger *trig = st->trigger_list + i;
 748                 const char *name;
 749
 750                 if (of_property_read_string(trig_node, "trigger-name", &name)) {
 751                         dev_err(&idev->dev, "Missing trigger-name property in the DT.\n");
 752                         ret = -EINVAL;
 753                         goto error_ret;
 754                 }
 755                 trig->name = name;
 756
 757                 if (of_property_read_u32(trig_node, "trigger-value", &prop)) {
 758                         dev_err(&idev->dev, "Missing trigger-value property in the DT.\n");
 759                         ret = -EINVAL;
 760                         goto error_ret;
 761                 }
 762                 trig->value = prop;
 763                 trig->is_external = of_property_read_bool(trig_node, "trigger-external");
 764                 i++;
 765         }
 766
 767         /* Check if touchscreen is supported. */
 768         if (st->caps->has_ts)
 769                 return at91_adc_probe_dt_ts(node, st, &idev->dev);
 770         else
 771                 dev_info(&idev->dev, "not support touchscreen in the adc compatible string.\n");
 772
 773         return 0;
 774
 775 error_ret:
 776         return ret;
 777 }
 778
 779 static int at91_adc_probe_pdata(struct at91_adc_state *st,
 780                                 struct platform_device *pdev)
 781 {
 782         struct at91_adc_data *pdata = pdev->dev.platform_data;
 783
 784         if (!pdata)
 785                 return -EINVAL;
 786
 787         st->caps = (struct at91_adc_caps *)
 788                         platform_get_device_id(pdev)->driver_data;
 789
 790         st->use_external = pdata->use_external_triggers;
 791         st->vref_mv = pdata->vref;
 792         st->channels_mask = pdata->channels_used;
 793         st->num_channels = st->caps->num_channels;
 794         st->startup_time = pdata->startup_time;
 795         st->trigger_number = pdata->trigger_number;
 796         st->trigger_list = pdata->trigger_list;
 797         st->registers = &st->caps->registers;
 798
 799         return 0;
 800 }
 801
 802 static const struct iio_info at91_adc_info = {
 803         .driver_module = THIS_MODULE,
 804         .read_raw = &at91_adc_read_raw,
 805 };
 806
 807 /* Touchscreen related functions */
 808 static int atmel_ts_open(struct input_dev *dev)
 809 {
 810         struct at91_adc_state *st = input_get_drvdata(dev);
 811
 812         at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
 813         return 0;
 814 }
 815
 816 static void atmel_ts_close(struct input_dev *dev)
 817 {
 818         struct at91_adc_state *st = input_get_drvdata(dev);
 819
 820         at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
 821 }
 822
 823 static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
 824 {
 825         u32 reg = 0, pendbc;
 826         int i = 0;
 827
 828         if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
 829                 reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
 830         else
 831                 reg = AT91_ADC_TSMR_TSMODE_5WIRE;
 832
 833         /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
 834          * pen detect noise.
 835          * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock
 836          */
 837         pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / 1000, 1);
 838
 839         while (pendbc >> ++i)
 840                 ;       /* Empty! Find the shift offset */
 841         if (abs(pendbc - (1 << i)) < abs(pendbc - (1 << (i - 1))))
 842                 pendbc = i;
 843         else
 844                 pendbc = i - 1;
 845
 846         if (st->caps->has_tsmr) {
 847                 reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
 848                                 & AT91_ADC_TSMR_TSAV;
 849                 reg |= AT91_ADC_TSMR_PENDBC_(pendbc) & AT91_ADC_TSMR_PENDBC;
 850                 reg |= AT91_ADC_TSMR_NOTSDMA;
 851                 reg |= AT91_ADC_TSMR_PENDET_ENA;
 852                 reg |= 0x03 << 8;       /* TSFREQ, need bigger than TSAV */
 853
 854                 at91_adc_writel(st, AT91_ADC_TSMR, reg);
 855         } else {
 856                 /* TODO: for 9g45 which has no TSMR */
 857         }
 858
 859         /* Change adc internal resistor value for better pen detection,
 860          * default value is 100 kOhm.
 861          * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm
 862          * option only available on ES2 and higher
 863          */
 864         at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
 865                         & AT91_ADC_ACR_PENDETSENS);
 866
 867         /* Sample Peroid Time = (TRGPER + 1) / ADCClock */
 868         st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
 869                         adc_clk_khz / 1000) - 1, 1);
 870
 871         return 0;
 872 }
 873
 874 static int at91_ts_register(struct at91_adc_state *st,
 875                 struct platform_device *pdev)
 876 {
 877         struct input_dev *input;
 878         struct iio_dev *idev = iio_priv_to_dev(st);
 879         int ret;
 880
 881         input = input_allocate_device();
 882         if (!input) {
 883                 dev_err(&idev->dev, "Failed to allocate TS device!\n");
 884                 return -ENOMEM;
 885         }
 886
 887         input->name = DRIVER_NAME;
 888         input->id.bustype = BUS_HOST;
 889         input->dev.parent = &pdev->dev;
 890         input->open = atmel_ts_open;
 891         input->close = atmel_ts_close;
 892
 893         __set_bit(EV_ABS, input->evbit);
 894         __set_bit(EV_KEY, input->evbit);
 895         __set_bit(BTN_TOUCH, input->keybit);
 896         input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
 897         input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
 898         input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
 899
 900         st->ts_input = input;
 901         input_set_drvdata(input, st);
 902
 903         ret = input_register_device(input);
 904         if (ret)
 905                 input_free_device(st->ts_input);
 906
 907         return ret;
 908 }
 909
 910 static void at91_ts_unregister(struct at91_adc_state *st)
 911 {
 912         input_unregister_device(st->ts_input);
 913 }
 914
 915 static int at91_adc_probe(struct platform_device *pdev)
 916 {
 917         unsigned int prsc, mstrclk, ticks, adc_clk, adc_clk_khz, shtim;
 918         int ret;
 919         struct iio_dev *idev;
 920         struct at91_adc_state *st;
 921         struct resource *res;
 922         u32 reg;
 923
 924         idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state));
 925         if (!idev)
 926                 return -ENOMEM;
 927
 928         st = iio_priv(idev);
 929
 930         if (pdev->dev.of_node)
 931                 ret = at91_adc_probe_dt(st, pdev);
 932         else
 933                 ret = at91_adc_probe_pdata(st, pdev);
 934
 935         if (ret) {
 936                 dev_err(&pdev->dev, "No platform data available.\n");
 937                 return -EINVAL;
 938         }
 939
 940         platform_set_drvdata(pdev, idev);
 941
 942         idev->dev.parent = &pdev->dev;
 943         idev->name = dev_name(&pdev->dev);
 944         idev->modes = INDIO_DIRECT_MODE;
 945         idev->info = &at91_adc_info;
 946
 947         st->irq = platform_get_irq(pdev, 0);
 948         if (st->irq < 0) {
 949                 dev_err(&pdev->dev, "No IRQ ID is designated\n");
 950                 return -ENODEV;
 951         }
 952
 953         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 954
 955         st->reg_base = devm_ioremap_resource(&pdev->dev, res);
 956         if (IS_ERR(st->reg_base)) {
 957                 return PTR_ERR(st->reg_base);
 958         }
 959
 960         /*
 961          * Disable all IRQs before setting up the handler
 962          */
 963         at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
 964         at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
 965         ret = request_irq(st->irq,
 966                           at91_adc_interrupt,
 967                           0,
 968                           pdev->dev.driver->name,
 969                           idev);
 970         if (ret) {
 971                 dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
 972                 return ret;
 973         }
 974
 975         st->clk = devm_clk_get(&pdev->dev, "adc_clk");
 976         if (IS_ERR(st->clk)) {
 977                 dev_err(&pdev->dev, "Failed to get the clock.\n");
 978                 ret = PTR_ERR(st->clk);
 979                 goto error_free_irq;
 980         }
 981
 982         ret = clk_prepare_enable(st->clk);
 983         if (ret) {
 984                 dev_err(&pdev->dev,
 985                         "Could not prepare or enable the clock.\n");
 986                 goto error_free_irq;
 987         }
 988
 989         st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk");
 990         if (IS_ERR(st->adc_clk)) {
 991                 dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
 992                 ret = PTR_ERR(st->adc_clk);
 993                 goto error_disable_clk;
 994         }
 995
 996         ret = clk_prepare_enable(st->adc_clk);
 997         if (ret) {
 998                 dev_err(&pdev->dev,
 999                         "Could not prepare or enable the ADC clock.\n");
1000                 goto error_disable_clk;
1001         }
1002
1003         /*
1004          * Prescaler rate computation using the formula from the Atmel's
1005          * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
1006          * specified by the electrical characteristics of the board.
1007          */
1008         mstrclk = clk_get_rate(st->clk);
1009         adc_clk = clk_get_rate(st->adc_clk);
1010         adc_clk_khz = adc_clk / 1000;
1011
1012         dev_dbg(&pdev->dev, "Master clock is set as: %d Hz, adc_clk should set as: %d Hz\n",
1013                 mstrclk, adc_clk);
1014
1015         prsc = (mstrclk / (2 * adc_clk)) - 1;
1016
1017         if (!st->startup_time) {
1018                 dev_err(&pdev->dev, "No startup time available.\n");
1019                 ret = -EINVAL;
1020                 goto error_disable_adc_clk;
1021         }
1022         ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz);
1023
1024         /*
1025          * a minimal Sample and Hold Time is necessary for the ADC to guarantee
1026          * the best converted final value between two channels selection
1027          * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
1028          */
1029         if (st->sample_hold_time > 0)
1030                 shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000)
1031                                  - 1, 1);
1032         else
1033                 shtim = 0;
1034
1035         reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
1036         reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
1037         if (st->low_res)
1038                 reg |= AT91_ADC_LOWRES;
1039         if (st->sleep_mode)
1040                 reg |= AT91_ADC_SLEEP;
1041         reg |= AT91_ADC_SHTIM_(shtim) & AT91_ADC_SHTIM;
1042         at91_adc_writel(st, AT91_ADC_MR, reg);
1043
1044         /* Setup the ADC channels available on the board */
1045         ret = at91_adc_channel_init(idev);
1046         if (ret < 0) {
1047                 dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
1048                 goto error_disable_adc_clk;
1049         }
1050
1051         init_waitqueue_head(&st->wq_data_avail);
1052         mutex_init(&st->lock);
1053
1054         /*
1055          * Since touch screen will set trigger register as period trigger. So
1056          * when touch screen is enabled, then we have to disable hardware
1057          * trigger for classic adc.
1058          */
1059         if (!st->touchscreen_type) {
1060                 ret = at91_adc_buffer_init(idev);
1061                 if (ret < 0) {
1062                         dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
1063                         goto error_disable_adc_clk;
1064                 }
1065
1066                 ret = at91_adc_trigger_init(idev);
1067                 if (ret < 0) {
1068                         dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
1069                         at91_adc_buffer_remove(idev);
1070                         goto error_disable_adc_clk;
1071                 }
1072         } else {
1073                 if (!st->caps->has_tsmr) {
1074                         dev_err(&pdev->dev, "We don't support non-TSMR adc\n");
1075                         ret = -ENODEV;
1076                         goto error_disable_adc_clk;
1077                 }
1078
1079                 ret = at91_ts_register(st, pdev);
1080                 if (ret)
1081                         goto error_disable_adc_clk;
1082
1083                 at91_ts_hw_init(st, adc_clk_khz);
1084         }
1085
1086         ret = iio_device_register(idev);
1087         if (ret < 0) {
1088                 dev_err(&pdev->dev, "Couldn't register the device.\n");
1089                 goto error_iio_device_register;
1090         }
1091
1092         return 0;
1093
1094 error_iio_device_register:
1095         if (!st->touchscreen_type) {
1096                 at91_adc_trigger_remove(idev);
1097                 at91_adc_buffer_remove(idev);
1098         } else {
1099                 at91_ts_unregister(st);
1100         }
1101 error_disable_adc_clk:
1102         clk_disable_unprepare(st->adc_clk);
1103 error_disable_clk:
1104         clk_disable_unprepare(st->clk);
1105 error_free_irq:
1106         free_irq(st->irq, idev);
1107         return ret;
1108 }
1109
1110 static int at91_adc_remove(struct platform_device *pdev)
1111 {
1112         struct iio_dev *idev = platform_get_drvdata(pdev);
1113         struct at91_adc_state *st = iio_priv(idev);
1114
1115         iio_device_unregister(idev);
1116         if (!st->touchscreen_type) {
1117                 at91_adc_trigger_remove(idev);
1118                 at91_adc_buffer_remove(idev);
1119         } else {
1120                 at91_ts_unregister(st);
1121         }
1122         clk_disable_unprepare(st->adc_clk);
1123         clk_disable_unprepare(st->clk);
1124         free_irq(st->irq, idev);
1125
1126         return 0;
1127 }
1128
1129 static struct at91_adc_caps at91sam9260_caps = {
1130         .calc_startup_ticks = calc_startup_ticks_9260,
1131         .num_channels = 4,
1132         .registers = {
1133                 .channel_base = AT91_ADC_CHR(0),
1134                 .drdy_mask = AT91_ADC_DRDY,
1135                 .status_register = AT91_ADC_SR,
1136                 .trigger_register = AT91_ADC_TRGR_9260,
1137                 .mr_prescal_mask = AT91_ADC_PRESCAL_9260,
1138                 .mr_startup_mask = AT91_ADC_STARTUP_9260,
1139         },
1140 };
1141
1142 static struct at91_adc_caps at91sam9g45_caps = {
1143         .has_ts = true,
1144         .calc_startup_ticks = calc_startup_ticks_9260,  /* same as 9260 */
1145         .num_channels = 8,
1146         .registers = {
1147                 .channel_base = AT91_ADC_CHR(0),
1148                 .drdy_mask = AT91_ADC_DRDY,
1149                 .status_register = AT91_ADC_SR,
1150                 .trigger_register = AT91_ADC_TRGR_9G45,
1151                 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
1152                 .mr_startup_mask = AT91_ADC_STARTUP_9G45,
1153         },
1154 };
1155
1156 static struct at91_adc_caps at91sam9x5_caps = {
1157         .has_ts = true,
1158         .has_tsmr = true,
1159         .ts_filter_average = 3,
1160         .ts_pen_detect_sensitivity = 2,
1161         .calc_startup_ticks = calc_startup_ticks_9x5,
1162         .num_channels = 12,
1163         .registers = {
1164                 .channel_base = AT91_ADC_CDR0_9X5,
1165                 .drdy_mask = AT91_ADC_SR_DRDY_9X5,
1166                 .status_register = AT91_ADC_SR_9X5,
1167                 .trigger_register = AT91_ADC_TRGR_9X5,
1168                 /* prescal mask is same as 9G45 */
1169                 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
1170                 .mr_startup_mask = AT91_ADC_STARTUP_9X5,
1171         },
1172 };
1173
1174 static const struct of_device_id at91_adc_dt_ids[] = {
1175         { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
1176         { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
1177         { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
1178         {},
1179 };
1180 MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
1181
1182 static const struct platform_device_id at91_adc_ids[] = {
1183         {
1184                 .name = "at91sam9260-adc",
1185                 .driver_data = (unsigned long)&at91sam9260_caps,
1186         }, {
1187                 .name = "at91sam9g45-adc",
1188                 .driver_data = (unsigned long)&at91sam9g45_caps,
1189         }, {
1190                 .name = "at91sam9x5-adc",
1191                 .driver_data = (unsigned long)&at91sam9x5_caps,
1192         }, {
1193                 /* terminator */
1194         }
1195 };
1196 MODULE_DEVICE_TABLE(platform, at91_adc_ids);
1197
1198 static struct platform_driver at91_adc_driver = {
1199         .probe = at91_adc_probe,
1200         .remove = at91_adc_remove,
1201         .id_table = at91_adc_ids,
1202         .driver = {
1203                    .name = DRIVER_NAME,
1204                    .of_match_table = of_match_ptr(at91_adc_dt_ids),
1205         },
1206 };
1207
1208 module_platform_driver(at91_adc_driver);
1209
1210 MODULE_LICENSE("GPL");
1211 MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
1212 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");