2 * INA2XX Current and Power Monitors
4 * Copyright 2015 Baylibre SAS.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Based on linux/drivers/iio/adc/ad7291.c
11 * Copyright 2010-2011 Analog Devices Inc.
13 * Based on linux/drivers/hwmon/ina2xx.c
14 * Copyright 2012 Lothar Felten <l-felten@ti.com>
16 * Licensed under the GPL-2 or later.
18 * IIO driver for INA219-220-226-230-231
20 * Configurable 7-bit I2C slave address from 0x40 to 0x4F
23 #include <linux/delay.h>
24 #include <linux/i2c.h>
25 #include <linux/iio/iio.h>
26 #include <linux/iio/buffer.h>
27 #include <linux/iio/kfifo_buf.h>
28 #include <linux/iio/sysfs.h>
29 #include <linux/kthread.h>
30 #include <linux/module.h>
31 #include <linux/of_device.h>
32 #include <linux/regmap.h>
33 #include <linux/util_macros.h>
35 #include <linux/platform_data/ina2xx.h>
37 /* INA2XX registers definition */
38 #define INA2XX_CONFIG 0x00
39 #define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */
40 #define INA2XX_BUS_VOLTAGE 0x02 /* readonly */
41 #define INA2XX_POWER 0x03 /* readonly */
42 #define INA2XX_CURRENT 0x04 /* readonly */
43 #define INA2XX_CALIBRATION 0x05
45 #define INA226_ALERT_MASK GENMASK(2, 1)
46 #define INA266_CVRF BIT(3)
48 #define INA2XX_MAX_REGISTERS 8
50 /* settings - depend on use case */
51 #define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */
52 #define INA226_CONFIG_DEFAULT 0x4327
53 #define INA226_DEFAULT_AVG 4
54 #define INA226_DEFAULT_IT 1110
56 #define INA2XX_RSHUNT_DEFAULT 10000
59 * bit mask for reading the averaging setting in the configuration register
60 * FIXME: use regmap_fields.
62 #define INA2XX_MODE_MASK GENMASK(3, 0)
64 #define INA226_AVG_MASK GENMASK(11, 9)
65 #define INA226_SHIFT_AVG(val) ((val) << 9)
67 /* Integration time for VBus */
68 #define INA226_ITB_MASK GENMASK(8, 6)
69 #define INA226_SHIFT_ITB(val) ((val) << 6)
71 /* Integration time for VShunt */
72 #define INA226_ITS_MASK GENMASK(5, 3)
73 #define INA226_SHIFT_ITS(val) ((val) << 3)
75 /* Cosmetic macro giving the sampling period for a full P=UxI cycle */
76 #define SAMPLING_PERIOD(c) ((c->int_time_vbus + c->int_time_vshunt) \
79 static bool ina2xx_is_writeable_reg(struct device *dev, unsigned int reg)
81 return (reg == INA2XX_CONFIG) || (reg > INA2XX_CURRENT);
84 static bool ina2xx_is_volatile_reg(struct device *dev, unsigned int reg)
86 return (reg != INA2XX_CONFIG);
89 static inline bool is_signed_reg(unsigned int reg)
91 return (reg == INA2XX_SHUNT_VOLTAGE) || (reg == INA2XX_CURRENT);
94 static const struct regmap_config ina2xx_regmap_config = {
97 .max_register = INA2XX_MAX_REGISTERS,
98 .writeable_reg = ina2xx_is_writeable_reg,
99 .volatile_reg = ina2xx_is_volatile_reg,
102 enum ina2xx_ids { ina219, ina226 };
104 struct ina2xx_config {
106 int calibration_factor;
108 int bus_voltage_shift;
109 int bus_voltage_lsb; /* uV */
110 int power_lsb; /* uW */
113 struct ina2xx_chip_info {
114 struct regmap *regmap;
115 struct task_struct *task;
116 const struct ina2xx_config *config;
117 struct mutex state_lock;
118 unsigned int shunt_resistor;
120 int int_time_vbus; /* Bus voltage integration time uS */
121 int int_time_vshunt; /* Shunt voltage integration time uS */
122 bool allow_async_readout;
125 static const struct ina2xx_config ina2xx_config[] = {
127 .config_default = INA219_CONFIG_DEFAULT,
128 .calibration_factor = 40960000,
130 .bus_voltage_shift = 3,
131 .bus_voltage_lsb = 4000,
135 .config_default = INA226_CONFIG_DEFAULT,
136 .calibration_factor = 5120000,
138 .bus_voltage_shift = 0,
139 .bus_voltage_lsb = 1250,
144 static int ina2xx_read_raw(struct iio_dev *indio_dev,
145 struct iio_chan_spec const *chan,
146 int *val, int *val2, long mask)
149 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
153 case IIO_CHAN_INFO_RAW:
154 ret = regmap_read(chip->regmap, chan->address, ®val);
158 if (is_signed_reg(chan->address))
165 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
169 case IIO_CHAN_INFO_INT_TIME:
171 if (chan->address == INA2XX_SHUNT_VOLTAGE)
172 *val2 = chip->int_time_vshunt;
174 *val2 = chip->int_time_vbus;
176 return IIO_VAL_INT_PLUS_MICRO;
178 case IIO_CHAN_INFO_SAMP_FREQ:
180 * Sample freq is read only, it is a consequence of
181 * 1/AVG*(CT_bus+CT_shunt).
183 *val = DIV_ROUND_CLOSEST(1000000, SAMPLING_PERIOD(chip));
187 case IIO_CHAN_INFO_SCALE:
188 switch (chan->address) {
189 case INA2XX_SHUNT_VOLTAGE:
190 /* processed (mV) = raw/shunt_div */
191 *val2 = chip->config->shunt_div;
193 return IIO_VAL_FRACTIONAL;
195 case INA2XX_BUS_VOLTAGE:
196 /* processed (mV) = raw*lsb (uV) / (1000 << shift) */
197 *val = chip->config->bus_voltage_lsb;
198 *val2 = 1000 << chip->config->bus_voltage_shift;
199 return IIO_VAL_FRACTIONAL;
202 /* processed (mW) = raw*lsb (uW) / 1000 */
203 *val = chip->config->power_lsb;
205 return IIO_VAL_FRACTIONAL;
208 /* processed (mA) = raw (mA) */
218 * Available averaging rates for ina226. The indices correspond with
219 * the bit values expected by the chip (according to the ina226 datasheet,
220 * table 3 AVG bit settings, found at
221 * http://www.ti.com/lit/ds/symlink/ina226.pdf.
223 static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
225 static int ina226_set_average(struct ina2xx_chip_info *chip, unsigned int val,
226 unsigned int *config)
230 if (val > 1024 || val < 1)
233 bits = find_closest(val, ina226_avg_tab,
234 ARRAY_SIZE(ina226_avg_tab));
236 chip->avg = ina226_avg_tab[bits];
238 *config &= ~INA226_AVG_MASK;
239 *config |= INA226_SHIFT_AVG(bits) & INA226_AVG_MASK;
244 /* Conversion times in uS */
245 static const int ina226_conv_time_tab[] = { 140, 204, 332, 588, 1100,
248 static int ina226_set_int_time_vbus(struct ina2xx_chip_info *chip,
249 unsigned int val_us, unsigned int *config)
253 if (val_us > 8244 || val_us < 140)
256 bits = find_closest(val_us, ina226_conv_time_tab,
257 ARRAY_SIZE(ina226_conv_time_tab));
259 chip->int_time_vbus = ina226_conv_time_tab[bits];
261 *config &= ~INA226_ITB_MASK;
262 *config |= INA226_SHIFT_ITB(bits) & INA226_ITB_MASK;
267 static int ina226_set_int_time_vshunt(struct ina2xx_chip_info *chip,
268 unsigned int val_us, unsigned int *config)
272 if (val_us > 8244 || val_us < 140)
275 bits = find_closest(val_us, ina226_conv_time_tab,
276 ARRAY_SIZE(ina226_conv_time_tab));
278 chip->int_time_vshunt = ina226_conv_time_tab[bits];
280 *config &= ~INA226_ITS_MASK;
281 *config |= INA226_SHIFT_ITS(bits) & INA226_ITS_MASK;
286 static int ina2xx_write_raw(struct iio_dev *indio_dev,
287 struct iio_chan_spec const *chan,
288 int val, int val2, long mask)
290 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
291 unsigned int config, tmp;
294 if (iio_buffer_enabled(indio_dev))
297 mutex_lock(&chip->state_lock);
299 ret = regmap_read(chip->regmap, INA2XX_CONFIG, &config);
306 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
307 ret = ina226_set_average(chip, val, &tmp);
310 case IIO_CHAN_INFO_INT_TIME:
311 if (chan->address == INA2XX_SHUNT_VOLTAGE)
312 ret = ina226_set_int_time_vshunt(chip, val2, &tmp);
314 ret = ina226_set_int_time_vbus(chip, val2, &tmp);
321 if (!ret && (tmp != config))
322 ret = regmap_write(chip->regmap, INA2XX_CONFIG, tmp);
324 mutex_unlock(&chip->state_lock);
329 static ssize_t ina2xx_allow_async_readout_show(struct device *dev,
330 struct device_attribute *attr,
333 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
335 return sprintf(buf, "%d\n", chip->allow_async_readout);
338 static ssize_t ina2xx_allow_async_readout_store(struct device *dev,
339 struct device_attribute *attr,
340 const char *buf, size_t len)
342 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
346 ret = strtobool((const char *) buf, &val);
350 chip->allow_async_readout = val;
356 * Set current LSB to 1mA, shunt is in uOhms
357 * (equation 13 in datasheet). We hardcode a Current_LSB
358 * of 1.0 x10-6. The only remaining parameter is RShunt.
359 * There is no need to expose the CALIBRATION register
360 * to the user for now. But we need to reset this register
361 * if the user updates RShunt after driver init, e.g upon
362 * reading an EEPROM/Probe-type value.
364 static int ina2xx_set_calibration(struct ina2xx_chip_info *chip)
366 u16 regval = DIV_ROUND_CLOSEST(chip->config->calibration_factor,
367 chip->shunt_resistor);
369 return regmap_write(chip->regmap, INA2XX_CALIBRATION, regval);
372 static int set_shunt_resistor(struct ina2xx_chip_info *chip, unsigned int val)
374 if (val <= 0 || val > chip->config->calibration_factor)
377 chip->shunt_resistor = val;
382 static ssize_t ina2xx_shunt_resistor_show(struct device *dev,
383 struct device_attribute *attr,
386 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
388 return sprintf(buf, "%d\n", chip->shunt_resistor);
391 static ssize_t ina2xx_shunt_resistor_store(struct device *dev,
392 struct device_attribute *attr,
393 const char *buf, size_t len)
395 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
399 ret = kstrtoul((const char *) buf, 10, &val);
403 ret = set_shunt_resistor(chip, val);
407 /* Update the Calibration register */
408 ret = ina2xx_set_calibration(chip);
415 #define INA2XX_CHAN(_type, _index, _address) { \
417 .address = (_address), \
419 .channel = (_index), \
420 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
421 | BIT(IIO_CHAN_INFO_SCALE), \
422 .info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
423 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
424 .scan_index = (_index), \
429 .endianness = IIO_CPU, \
434 * Sampling Freq is a consequence of the integration times of
435 * the Voltage channels.
437 #define INA2XX_CHAN_VOLTAGE(_index, _address) { \
438 .type = IIO_VOLTAGE, \
439 .address = (_address), \
441 .channel = (_index), \
442 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
443 BIT(IIO_CHAN_INFO_SCALE) | \
444 BIT(IIO_CHAN_INFO_INT_TIME), \
445 .scan_index = (_index), \
450 .endianness = IIO_LE, \
454 static const struct iio_chan_spec ina2xx_channels[] = {
455 INA2XX_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE),
456 INA2XX_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE),
457 INA2XX_CHAN(IIO_POWER, 2, INA2XX_POWER),
458 INA2XX_CHAN(IIO_CURRENT, 3, INA2XX_CURRENT),
459 IIO_CHAN_SOFT_TIMESTAMP(4),
462 static int ina2xx_work_buffer(struct iio_dev *indio_dev)
464 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
465 unsigned short data[8];
470 time_a = iio_get_time_ns(indio_dev);
473 * Because the timer thread and the chip conversion clock
474 * are asynchronous, the period difference will eventually
475 * result in reading V[k-1] again, or skip V[k] at time Tk.
476 * In order to resync the timer with the conversion process
477 * we check the ConVersionReadyFlag.
478 * On hardware that supports using the ALERT pin to toggle a
479 * GPIO a triggered buffer could be used instead.
480 * For now, we pay for that extra read of the ALERT register
482 if (!chip->allow_async_readout)
484 ret = regmap_read(chip->regmap, INA226_ALERT_MASK,
489 alert &= INA266_CVRF;
493 * Single register reads: bulk_read will not work with ina226
494 * as there is no auto-increment of the address register for
495 * data length longer than 16bits.
497 for_each_set_bit(bit, indio_dev->active_scan_mask,
498 indio_dev->masklength) {
501 ret = regmap_read(chip->regmap,
502 INA2XX_SHUNT_VOLTAGE + bit, &val);
509 time_b = iio_get_time_ns(indio_dev);
511 iio_push_to_buffers_with_timestamp(indio_dev,
512 (unsigned int *)data, time_a);
514 return (unsigned long)(time_b - time_a) / 1000;
517 static int ina2xx_capture_thread(void *data)
519 struct iio_dev *indio_dev = data;
520 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
521 unsigned int sampling_us = SAMPLING_PERIOD(chip);
525 * Poll a bit faster than the chip internal Fs, in case
526 * we wish to sync with the conversion ready flag.
528 if (!chip->allow_async_readout)
532 buffer_us = ina2xx_work_buffer(indio_dev);
536 if (sampling_us > buffer_us)
537 udelay(sampling_us - buffer_us);
539 } while (!kthread_should_stop());
544 static int ina2xx_buffer_enable(struct iio_dev *indio_dev)
546 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
547 unsigned int sampling_us = SAMPLING_PERIOD(chip);
549 dev_dbg(&indio_dev->dev, "Enabling buffer w/ scan_mask %02x, freq = %d, avg =%u\n",
550 (unsigned int)(*indio_dev->active_scan_mask),
551 1000000 / sampling_us, chip->avg);
553 dev_dbg(&indio_dev->dev, "Expected work period: %u us\n", sampling_us);
554 dev_dbg(&indio_dev->dev, "Async readout mode: %d\n",
555 chip->allow_async_readout);
557 chip->task = kthread_run(ina2xx_capture_thread, (void *)indio_dev,
558 "%s:%d-%uus", indio_dev->name, indio_dev->id,
561 return PTR_ERR_OR_ZERO(chip->task);
564 static int ina2xx_buffer_disable(struct iio_dev *indio_dev)
566 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
569 kthread_stop(chip->task);
576 static const struct iio_buffer_setup_ops ina2xx_setup_ops = {
577 .postenable = &ina2xx_buffer_enable,
578 .predisable = &ina2xx_buffer_disable,
581 static int ina2xx_debug_reg(struct iio_dev *indio_dev,
582 unsigned reg, unsigned writeval, unsigned *readval)
584 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
587 return regmap_write(chip->regmap, reg, writeval);
589 return regmap_read(chip->regmap, reg, readval);
592 /* Possible integration times for vshunt and vbus */
593 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.000140 0.000204 0.000332 0.000588 0.001100 0.002116 0.004156 0.008244");
595 static IIO_DEVICE_ATTR(in_allow_async_readout, S_IRUGO | S_IWUSR,
596 ina2xx_allow_async_readout_show,
597 ina2xx_allow_async_readout_store, 0);
599 static IIO_DEVICE_ATTR(in_shunt_resistor, S_IRUGO | S_IWUSR,
600 ina2xx_shunt_resistor_show,
601 ina2xx_shunt_resistor_store, 0);
603 static struct attribute *ina2xx_attributes[] = {
604 &iio_dev_attr_in_allow_async_readout.dev_attr.attr,
605 &iio_const_attr_integration_time_available.dev_attr.attr,
606 &iio_dev_attr_in_shunt_resistor.dev_attr.attr,
610 static const struct attribute_group ina2xx_attribute_group = {
611 .attrs = ina2xx_attributes,
614 static const struct iio_info ina2xx_info = {
615 .driver_module = THIS_MODULE,
616 .attrs = &ina2xx_attribute_group,
617 .read_raw = ina2xx_read_raw,
618 .write_raw = ina2xx_write_raw,
619 .debugfs_reg_access = ina2xx_debug_reg,
622 /* Initialize the configuration and calibration registers. */
623 static int ina2xx_init(struct ina2xx_chip_info *chip, unsigned int config)
625 int ret = regmap_write(chip->regmap, INA2XX_CONFIG, config);
629 return ina2xx_set_calibration(chip);
632 static int ina2xx_probe(struct i2c_client *client,
633 const struct i2c_device_id *id)
635 struct ina2xx_chip_info *chip;
636 struct iio_dev *indio_dev;
637 struct iio_buffer *buffer;
639 enum ina2xx_ids type;
642 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
646 chip = iio_priv(indio_dev);
648 /* This is only used for device removal purposes. */
649 i2c_set_clientdata(client, indio_dev);
651 chip->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config);
652 if (IS_ERR(chip->regmap)) {
653 dev_err(&client->dev, "failed to allocate register map\n");
654 return PTR_ERR(chip->regmap);
657 if (client->dev.of_node)
658 type = (enum ina2xx_ids)of_device_get_match_data(&client->dev);
660 type = id->driver_data;
661 chip->config = &ina2xx_config[type];
663 mutex_init(&chip->state_lock);
665 if (of_property_read_u32(client->dev.of_node,
666 "shunt-resistor", &val) < 0) {
667 struct ina2xx_platform_data *pdata =
668 dev_get_platdata(&client->dev);
671 val = pdata->shunt_uohms;
673 val = INA2XX_RSHUNT_DEFAULT;
676 ret = set_shunt_resistor(chip, val);
680 /* Patch the current config register with default. */
681 val = chip->config->config_default;
683 if (id->driver_data == ina226) {
684 ina226_set_average(chip, INA226_DEFAULT_AVG, &val);
685 ina226_set_int_time_vbus(chip, INA226_DEFAULT_IT, &val);
686 ina226_set_int_time_vshunt(chip, INA226_DEFAULT_IT, &val);
689 ret = ina2xx_init(chip, val);
691 dev_err(&client->dev, "error configuring the device\n");
695 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
696 indio_dev->dev.parent = &client->dev;
697 indio_dev->dev.of_node = client->dev.of_node;
698 indio_dev->channels = ina2xx_channels;
699 indio_dev->num_channels = ARRAY_SIZE(ina2xx_channels);
700 indio_dev->name = id->name;
701 indio_dev->info = &ina2xx_info;
702 indio_dev->setup_ops = &ina2xx_setup_ops;
704 buffer = devm_iio_kfifo_allocate(&indio_dev->dev);
708 iio_device_attach_buffer(indio_dev, buffer);
710 return iio_device_register(indio_dev);
713 static int ina2xx_remove(struct i2c_client *client)
715 struct iio_dev *indio_dev = i2c_get_clientdata(client);
716 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
718 iio_device_unregister(indio_dev);
721 return regmap_update_bits(chip->regmap, INA2XX_CONFIG,
722 INA2XX_MODE_MASK, 0);
725 static const struct i2c_device_id ina2xx_id[] = {
733 MODULE_DEVICE_TABLE(i2c, ina2xx_id);
735 static const struct of_device_id ina2xx_of_match[] = {
737 .compatible = "ti,ina219",
738 .data = (void *)ina219
741 .compatible = "ti,ina220",
742 .data = (void *)ina219
745 .compatible = "ti,ina226",
746 .data = (void *)ina226
749 .compatible = "ti,ina230",
750 .data = (void *)ina226
753 .compatible = "ti,ina231",
754 .data = (void *)ina226
758 MODULE_DEVICE_TABLE(of, ina2xx_of_match);
760 static struct i2c_driver ina2xx_driver = {
762 .name = KBUILD_MODNAME,
763 .of_match_table = ina2xx_of_match,
765 .probe = ina2xx_probe,
766 .remove = ina2xx_remove,
767 .id_table = ina2xx_id,
769 module_i2c_driver(ina2xx_driver);
771 MODULE_AUTHOR("Marc Titinger <marc.titinger@baylibre.com>");
772 MODULE_DESCRIPTION("Texas Instruments INA2XX ADC driver");
773 MODULE_LICENSE("GPL v2");