1 /* ADC driver for sunxi platforms' (A10, A13 and A31) GPADC
3 * Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
9 * The Allwinner SoCs all have an ADC that can also act as a touchscreen
10 * controller and a thermal sensor.
11 * The thermal sensor works only when the ADC acts as a touchscreen controller
12 * and is configured to throw an interrupt every fixed periods of time (let say
14 * One would be tempted to disable the IP on the hardware side rather than
15 * disabling interrupts to save some power but that resets the internal clock of
16 * the IP, resulting in having to wait X seconds every time we want to read the
17 * value of the thermal sensor.
18 * This is also the reason of using autosuspend in pm_runtime. If there was no
19 * autosuspend, the thermal sensor would need X seconds after every
20 * pm_runtime_get_sync to get a value from the ADC. The autosuspend allows the
21 * thermal sensor to be requested again in a certain time span before it gets
22 * shutdown for not being used.
25 #include <linux/completion.h>
26 #include <linux/interrupt.h>
28 #include <linux/module.h>
30 #include <linux/of_device.h>
31 #include <linux/platform_device.h>
32 #include <linux/pm_runtime.h>
33 #include <linux/regmap.h>
34 #include <linux/thermal.h>
35 #include <linux/delay.h>
37 #include <linux/iio/iio.h>
38 #include <linux/iio/driver.h>
39 #include <linux/iio/machine.h>
40 #include <linux/mfd/sun4i-gpadc.h>
42 static unsigned int sun4i_gpadc_chan_select(unsigned int chan)
44 return SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
47 static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
49 return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
55 unsigned int tp_mode_en;
56 unsigned int tp_adc_select;
57 unsigned int (*adc_chan_select)(unsigned int chan);
58 unsigned int adc_chan_mask;
61 static const struct gpadc_data sun4i_gpadc_data = {
64 .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
65 .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
66 .adc_chan_select = &sun4i_gpadc_chan_select,
67 .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
70 static const struct gpadc_data sun5i_gpadc_data = {
73 .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
74 .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
75 .adc_chan_select = &sun4i_gpadc_chan_select,
76 .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
79 static const struct gpadc_data sun6i_gpadc_data = {
82 .tp_mode_en = SUN6I_GPADC_CTRL1_TP_MODE_EN,
83 .tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
84 .adc_chan_select = &sun6i_gpadc_chan_select,
85 .adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
88 static const struct gpadc_data sun8i_a33_gpadc_data = {
91 .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
94 struct sun4i_gpadc_iio {
95 struct iio_dev *indio_dev;
96 struct completion completion;
99 struct regmap *regmap;
100 unsigned int fifo_data_irq;
101 atomic_t ignore_fifo_data_irq;
102 unsigned int temp_data_irq;
103 atomic_t ignore_temp_data_irq;
104 const struct gpadc_data *data;
106 /* prevents concurrent reads of temperature and ADC */
110 #define SUN4I_GPADC_ADC_CHANNEL(_channel, _name) { \
111 .type = IIO_VOLTAGE, \
113 .channel = _channel, \
114 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
115 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
116 .datasheet_name = _name, \
119 static struct iio_map sun4i_gpadc_hwmon_maps[] = {
121 .adc_channel_label = "temp_adc",
122 .consumer_dev_name = "iio_hwmon.0",
127 static const struct iio_chan_spec sun4i_gpadc_channels[] = {
128 SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
129 SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
130 SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
131 SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
134 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
135 BIT(IIO_CHAN_INFO_SCALE) |
136 BIT(IIO_CHAN_INFO_OFFSET),
137 .datasheet_name = "temp_adc",
141 static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = {
142 SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
143 SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
144 SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
145 SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
148 static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = {
151 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
152 BIT(IIO_CHAN_INFO_SCALE) |
153 BIT(IIO_CHAN_INFO_OFFSET),
154 .datasheet_name = "temp_adc",
158 static const struct regmap_config sun4i_gpadc_regmap_config = {
165 static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel,
168 struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
172 pm_runtime_get_sync(indio_dev->dev.parent);
174 reinit_completion(&info->completion);
176 ret = regmap_write(info->regmap, SUN4I_GPADC_INT_FIFOC,
177 SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(1) |
178 SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH);
182 ret = regmap_read(info->regmap, SUN4I_GPADC_CTRL1, ®);
186 if (irq == info->fifo_data_irq) {
187 ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
188 info->data->tp_mode_en |
189 info->data->tp_adc_select |
190 info->data->adc_chan_select(channel));
192 * When the IP changes channel, it needs a bit of time to get
195 if ((reg & info->data->adc_chan_mask) !=
196 info->data->adc_chan_select(channel))
201 * The temperature sensor returns valid data only when the ADC
202 * operates in touchscreen mode.
204 ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
205 info->data->tp_mode_en);
212 * When the IP changes mode between ADC or touchscreen, it
213 * needs a bit of time to get correct values.
215 if ((reg & info->data->tp_adc_select) != info->data->tp_adc_select)
221 static int sun4i_gpadc_read(struct iio_dev *indio_dev, int channel, int *val,
224 struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
227 mutex_lock(&info->mutex);
229 ret = sun4i_prepare_for_irq(indio_dev, channel, irq);
236 * The temperature sensor throws an interruption periodically (currently
237 * set at periods of ~0.6s in sun4i_gpadc_runtime_resume). A 1s delay
238 * makes sure an interruption occurs in normal conditions. If it doesn't
239 * occur, then there is a timeout.
241 if (!wait_for_completion_timeout(&info->completion,
242 msecs_to_jiffies(1000))) {
247 if (irq == info->fifo_data_irq)
248 *val = info->adc_data;
250 *val = info->temp_data;
253 pm_runtime_mark_last_busy(indio_dev->dev.parent);
256 pm_runtime_put_autosuspend(indio_dev->dev.parent);
257 mutex_unlock(&info->mutex);
262 static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
265 struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
267 return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
270 static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
272 struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
275 pm_runtime_get_sync(indio_dev->dev.parent);
277 regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
279 pm_runtime_mark_last_busy(indio_dev->dev.parent);
280 pm_runtime_put_autosuspend(indio_dev->dev.parent);
285 return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
288 static int sun4i_gpadc_temp_offset(struct iio_dev *indio_dev, int *val)
290 struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
292 *val = info->data->temp_offset;
297 static int sun4i_gpadc_temp_scale(struct iio_dev *indio_dev, int *val)
299 struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
301 *val = info->data->temp_scale;
306 static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
307 struct iio_chan_spec const *chan, int *val,
308 int *val2, long mask)
313 case IIO_CHAN_INFO_OFFSET:
314 ret = sun4i_gpadc_temp_offset(indio_dev, val);
319 case IIO_CHAN_INFO_RAW:
320 if (chan->type == IIO_VOLTAGE)
321 ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
324 ret = sun4i_gpadc_temp_read(indio_dev, val);
330 case IIO_CHAN_INFO_SCALE:
331 if (chan->type == IIO_VOLTAGE) {
332 /* 3000mV / 4096 * raw */
335 return IIO_VAL_INT_PLUS_NANO;
338 ret = sun4i_gpadc_temp_scale(indio_dev, val);
350 static const struct iio_info sun4i_gpadc_iio_info = {
351 .read_raw = sun4i_gpadc_read_raw,
352 .driver_module = THIS_MODULE,
355 static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
357 struct sun4i_gpadc_iio *info = dev_id;
359 if (atomic_read(&info->ignore_temp_data_irq))
362 if (!regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, &info->temp_data))
363 complete(&info->completion);
366 disable_irq_nosync(info->temp_data_irq);
370 static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
372 struct sun4i_gpadc_iio *info = dev_id;
374 if (atomic_read(&info->ignore_fifo_data_irq))
377 if (!regmap_read(info->regmap, SUN4I_GPADC_DATA, &info->adc_data))
378 complete(&info->completion);
381 disable_irq_nosync(info->fifo_data_irq);
385 static int sun4i_gpadc_runtime_suspend(struct device *dev)
387 struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
389 /* Disable the ADC on IP */
390 regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
391 /* Disable temperature sensor on IP */
392 regmap_write(info->regmap, SUN4I_GPADC_TPR, 0);
397 static int sun4i_gpadc_runtime_resume(struct device *dev)
399 struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
402 regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
403 SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
404 SUN4I_GPADC_CTRL0_FS_DIV(7) |
405 SUN4I_GPADC_CTRL0_T_ACQ(63));
406 regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
407 regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
408 SUN4I_GPADC_CTRL3_FILTER_EN |
409 SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
410 /* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
411 regmap_write(info->regmap, SUN4I_GPADC_TPR,
412 SUN4I_GPADC_TPR_TEMP_ENABLE |
413 SUN4I_GPADC_TPR_TEMP_PERIOD(800));
418 static int sun4i_gpadc_get_temp(void *data, int *temp)
420 struct sun4i_gpadc_iio *info = data;
421 int val, scale, offset;
423 if (sun4i_gpadc_temp_read(info->indio_dev, &val))
426 sun4i_gpadc_temp_scale(info->indio_dev, &scale);
427 sun4i_gpadc_temp_offset(info->indio_dev, &offset);
429 *temp = (val + offset) * scale;
434 static const struct thermal_zone_of_device_ops sun4i_ts_tz_ops = {
435 .get_temp = &sun4i_gpadc_get_temp,
438 static const struct dev_pm_ops sun4i_gpadc_pm_ops = {
439 .runtime_suspend = &sun4i_gpadc_runtime_suspend,
440 .runtime_resume = &sun4i_gpadc_runtime_resume,
443 static int sun4i_irq_init(struct platform_device *pdev, const char *name,
444 irq_handler_t handler, const char *devname,
445 unsigned int *irq, atomic_t *atomic)
448 struct sun4i_gpadc_dev *mfd_dev = dev_get_drvdata(pdev->dev.parent);
449 struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(&pdev->dev));
452 * Once the interrupt is activated, the IP continuously performs
453 * conversions thus throws interrupts. The interrupt is activated right
454 * after being requested but we want to control when these interrupts
455 * occur thus we disable it right after being requested. However, an
456 * interrupt might occur between these two instructions and we have to
457 * make sure that does not happen, by using atomic flags. We set the
458 * flag before requesting the interrupt and unset it right after
459 * disabling the interrupt. When an interrupt occurs between these two
460 * instructions, reading the atomic flag will tell us to ignore the
463 atomic_set(atomic, 1);
465 ret = platform_get_irq_byname(pdev, name);
467 dev_err(&pdev->dev, "no %s interrupt registered\n", name);
471 ret = regmap_irq_get_virq(mfd_dev->regmap_irqc, ret);
473 dev_err(&pdev->dev, "failed to get virq for irq %s\n", name);
478 ret = devm_request_any_context_irq(&pdev->dev, *irq, handler, 0,
481 dev_err(&pdev->dev, "could not request %s interrupt: %d\n",
487 atomic_set(atomic, 0);
492 static const struct of_device_id sun4i_gpadc_of_id[] = {
494 .compatible = "allwinner,sun8i-a33-ths",
495 .data = &sun8i_a33_gpadc_data,
500 static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
501 struct iio_dev *indio_dev)
503 struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
504 const struct of_device_id *of_dev;
505 struct thermal_zone_device *tzd;
506 struct resource *mem;
510 of_dev = of_match_device(sun4i_gpadc_of_id, &pdev->dev);
515 info->data = (struct gpadc_data *)of_dev->data;
516 indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
517 indio_dev->channels = sun8i_a33_gpadc_channels;
519 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
520 base = devm_ioremap_resource(&pdev->dev, mem);
522 return PTR_ERR(base);
524 info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
525 &sun4i_gpadc_regmap_config);
526 if (IS_ERR(info->regmap)) {
527 ret = PTR_ERR(info->regmap);
528 dev_err(&pdev->dev, "failed to init regmap: %d\n", ret);
532 if (!IS_ENABLED(CONFIG_THERMAL_OF))
535 tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, info,
538 dev_err(&pdev->dev, "could not register thermal sensor: %ld\n",
541 return PTR_ERR_OR_ZERO(tzd);
544 static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
545 struct iio_dev *indio_dev)
547 struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
548 struct sun4i_gpadc_dev *sun4i_gpadc_dev =
549 dev_get_drvdata(pdev->dev.parent);
552 info->no_irq = false;
553 info->regmap = sun4i_gpadc_dev->regmap;
555 indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
556 indio_dev->channels = sun4i_gpadc_channels;
558 info->data = (struct gpadc_data *)platform_get_device_id(pdev)->driver_data;
561 * Since the controller needs to be in touchscreen mode for its thermal
562 * sensor to operate properly, and that switching between the two modes
563 * needs a delay, always registering in the thermal framework will
564 * significantly slow down the conversion rate of the ADCs.
566 * Therefore, instead of depending on THERMAL_OF in Kconfig, we only
567 * register the sensor if that option is enabled, eventually leaving
568 * that choice to the user.
571 if (IS_ENABLED(CONFIG_THERMAL_OF)) {
573 * This driver is a child of an MFD which has a node in the DT
574 * but not its children, because of DT backward compatibility
575 * for A10, A13 and A31 SoCs. Therefore, the resulting devices
576 * of this driver do not have an of_node variable.
577 * However, its parent (the MFD driver) has an of_node variable
578 * and since devm_thermal_zone_of_sensor_register uses its first
579 * argument to match the phandle defined in the node of the
580 * thermal driver with the of_node of the device passed as first
581 * argument and the third argument to call ops from
582 * thermal_zone_of_device_ops, the solution is to use the parent
583 * device as first argument to match the phandle with its
584 * of_node, and the device from this driver as third argument to
585 * return the temperature.
587 struct thermal_zone_device *tzd;
588 tzd = devm_thermal_zone_of_sensor_register(pdev->dev.parent, 0,
593 "could not register thermal sensor: %ld\n",
598 indio_dev->num_channels =
599 ARRAY_SIZE(sun4i_gpadc_channels_no_temp);
600 indio_dev->channels = sun4i_gpadc_channels_no_temp;
603 if (IS_ENABLED(CONFIG_THERMAL_OF)) {
604 ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING",
605 sun4i_gpadc_temp_data_irq_handler,
606 "temp_data", &info->temp_data_irq,
607 &info->ignore_temp_data_irq);
612 ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING",
613 sun4i_gpadc_fifo_data_irq_handler, "fifo_data",
614 &info->fifo_data_irq, &info->ignore_fifo_data_irq);
618 if (IS_ENABLED(CONFIG_THERMAL_OF)) {
619 ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps);
622 "failed to register iio map array\n");
630 static int sun4i_gpadc_probe(struct platform_device *pdev)
632 struct sun4i_gpadc_iio *info;
633 struct iio_dev *indio_dev;
636 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
640 info = iio_priv(indio_dev);
641 platform_set_drvdata(pdev, indio_dev);
643 mutex_init(&info->mutex);
644 info->indio_dev = indio_dev;
645 init_completion(&info->completion);
646 indio_dev->name = dev_name(&pdev->dev);
647 indio_dev->dev.parent = &pdev->dev;
648 indio_dev->dev.of_node = pdev->dev.of_node;
649 indio_dev->info = &sun4i_gpadc_iio_info;
650 indio_dev->modes = INDIO_DIRECT_MODE;
652 if (pdev->dev.of_node)
653 ret = sun4i_gpadc_probe_dt(pdev, indio_dev);
655 ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
660 pm_runtime_set_autosuspend_delay(&pdev->dev,
661 SUN4I_GPADC_AUTOSUSPEND_DELAY);
662 pm_runtime_use_autosuspend(&pdev->dev);
663 pm_runtime_set_suspended(&pdev->dev);
664 pm_runtime_enable(&pdev->dev);
666 ret = devm_iio_device_register(&pdev->dev, indio_dev);
668 dev_err(&pdev->dev, "could not register the device\n");
675 if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
676 iio_map_array_unregister(indio_dev);
678 pm_runtime_put(&pdev->dev);
679 pm_runtime_disable(&pdev->dev);
684 static int sun4i_gpadc_remove(struct platform_device *pdev)
686 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
687 struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
689 pm_runtime_put(&pdev->dev);
690 pm_runtime_disable(&pdev->dev);
691 if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
692 iio_map_array_unregister(indio_dev);
697 static const struct platform_device_id sun4i_gpadc_id[] = {
698 { "sun4i-a10-gpadc-iio", (kernel_ulong_t)&sun4i_gpadc_data },
699 { "sun5i-a13-gpadc-iio", (kernel_ulong_t)&sun5i_gpadc_data },
700 { "sun6i-a31-gpadc-iio", (kernel_ulong_t)&sun6i_gpadc_data },
704 static struct platform_driver sun4i_gpadc_driver = {
706 .name = "sun4i-gpadc-iio",
707 .of_match_table = sun4i_gpadc_of_id,
708 .pm = &sun4i_gpadc_pm_ops,
710 .id_table = sun4i_gpadc_id,
711 .probe = sun4i_gpadc_probe,
712 .remove = sun4i_gpadc_remove,
715 module_platform_driver(sun4i_gpadc_driver);
717 MODULE_DESCRIPTION("ADC driver for sunxi platforms");
718 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
719 MODULE_LICENSE("GPL v2");