2 * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters
4 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
5 * Andrew F. Davis <afd@ti.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
17 #include <linux/device.h>
18 #include <linux/err.h>
19 #include <linux/interrupt.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/regmap.h>
23 #include <linux/spi/spi.h>
24 #include <linux/sysfs.h>
25 #include <linux/regulator/consumer.h>
27 #include <linux/iio/iio.h>
28 #include <linux/iio/sysfs.h>
29 #include <linux/iio/buffer.h>
30 #include <linux/iio/trigger.h>
31 #include <linux/iio/triggered_buffer.h>
32 #include <linux/iio/trigger_consumer.h>
36 #define AFE4403_DRIVER_NAME "afe4403"
38 /* AFE4403 Registers */
39 #define AFE4403_TIAGAIN 0x20
40 #define AFE4403_TIA_AMB_GAIN 0x21
42 /* AFE4403 LEDCNTRL values */
43 #define AFE440X_LEDCNTRL_RANGE_TX_HALF 0x1
44 #define AFE440X_LEDCNTRL_RANGE_TX_FULL 0x2
45 #define AFE440X_LEDCNTRL_RANGE_TX_OFF 0x3
47 /* AFE4403 CONTROL2 values */
48 #define AFE440X_CONTROL2_TX_REF_025 0x0
49 #define AFE440X_CONTROL2_TX_REF_050 0x1
50 #define AFE440X_CONTROL2_TX_REF_100 0x2
51 #define AFE440X_CONTROL2_TX_REF_075 0x3
53 /* AFE4403 CONTROL3 values */
54 #define AFE440X_CONTROL3_CLK_DIV_2 0x0
55 #define AFE440X_CONTROL3_CLK_DIV_4 0x2
56 #define AFE440X_CONTROL3_CLK_DIV_6 0x3
57 #define AFE440X_CONTROL3_CLK_DIV_8 0x4
58 #define AFE440X_CONTROL3_CLK_DIV_12 0x5
59 #define AFE440X_CONTROL3_CLK_DIV_1 0x7
61 /* AFE4403 TIAGAIN_CAP values */
62 #define AFE4403_TIAGAIN_CAP_5_P 0x0
63 #define AFE4403_TIAGAIN_CAP_10_P 0x1
64 #define AFE4403_TIAGAIN_CAP_20_P 0x2
65 #define AFE4403_TIAGAIN_CAP_30_P 0x3
66 #define AFE4403_TIAGAIN_CAP_55_P 0x8
67 #define AFE4403_TIAGAIN_CAP_155_P 0x10
69 /* AFE4403 TIAGAIN_RES values */
70 #define AFE4403_TIAGAIN_RES_500_K 0x0
71 #define AFE4403_TIAGAIN_RES_250_K 0x1
72 #define AFE4403_TIAGAIN_RES_100_K 0x2
73 #define AFE4403_TIAGAIN_RES_50_K 0x3
74 #define AFE4403_TIAGAIN_RES_25_K 0x4
75 #define AFE4403_TIAGAIN_RES_10_K 0x5
76 #define AFE4403_TIAGAIN_RES_1_M 0x6
77 #define AFE4403_TIAGAIN_RES_NONE 0x7
91 static const struct reg_field afe4403_reg_fields[] = {
93 [F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2),
94 [F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7),
95 [F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2),
96 [F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7),
98 [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7),
99 [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15),
103 * struct afe4403_data - AFE4403 device instance data
104 * @dev: Device structure
105 * @spi: SPI device handle
106 * @regmap: Register map of the device
107 * @fields: Register fields of the device
108 * @regulator: Pointer to the regulator for the IC
109 * @trig: IIO trigger for this device
110 * @irq: ADC_RDY line interrupt number
112 struct afe4403_data {
114 struct spi_device *spi;
115 struct regmap *regmap;
116 struct regmap_field *fields[F_MAX_FIELDS];
117 struct regulator *regulator;
118 struct iio_trigger *trig;
122 enum afe4403_chan_id {
133 static const unsigned int afe4403_channel_values[] = {
134 [LED2] = AFE440X_LED2VAL,
135 [ALED2] = AFE440X_ALED2VAL,
136 [LED1] = AFE440X_LED1VAL,
137 [ALED1] = AFE440X_ALED1VAL,
138 [LED2_ALED2] = AFE440X_LED2_ALED2VAL,
139 [LED1_ALED1] = AFE440X_LED1_ALED1VAL,
142 static const unsigned int afe4403_channel_leds[] = {
147 static const struct iio_chan_spec afe4403_channels[] = {
149 AFE440X_INTENSITY_CHAN(LED2, 0),
150 AFE440X_INTENSITY_CHAN(ALED2, 0),
151 AFE440X_INTENSITY_CHAN(LED1, 0),
152 AFE440X_INTENSITY_CHAN(ALED1, 0),
153 AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
154 AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
156 AFE440X_CURRENT_CHAN(ILED1),
157 AFE440X_CURRENT_CHAN(ILED2),
160 static const struct afe440x_val_table afe4403_res_table[] = {
161 { 500000 }, { 250000 }, { 100000 }, { 50000 },
162 { 25000 }, { 10000 }, { 1000000 }, { 0 },
164 AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table);
166 static const struct afe440x_val_table afe4403_cap_table[] = {
167 { 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 },
168 { 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 },
169 { 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 },
170 { 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 },
171 { 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 },
172 { 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 },
173 { 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 },
174 { 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 },
176 AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table);
178 static ssize_t afe440x_show_register(struct device *dev,
179 struct device_attribute *attr,
182 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
183 struct afe4403_data *afe = iio_priv(indio_dev);
184 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
185 unsigned int reg_val;
189 ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val);
193 if (reg_val >= afe440x_attr->table_size)
196 vals[0] = afe440x_attr->val_table[reg_val].integer;
197 vals[1] = afe440x_attr->val_table[reg_val].fract;
199 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
202 static ssize_t afe440x_store_register(struct device *dev,
203 struct device_attribute *attr,
204 const char *buf, size_t count)
206 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
207 struct afe4403_data *afe = iio_priv(indio_dev);
208 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
209 int val, integer, fract, ret;
211 ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
215 for (val = 0; val < afe440x_attr->table_size; val++)
216 if (afe440x_attr->val_table[val].integer == integer &&
217 afe440x_attr->val_table[val].fract == fract)
219 if (val == afe440x_attr->table_size)
222 ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
229 static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table);
230 static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table);
232 static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table);
233 static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table);
235 static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table);
236 static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table);
238 static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table);
239 static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table);
241 static struct attribute *afe440x_attributes[] = {
242 &dev_attr_in_intensity_resistance_available.attr,
243 &dev_attr_in_intensity_capacitance_available.attr,
244 &afe440x_attr_in_intensity1_resistance.dev_attr.attr,
245 &afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
246 &afe440x_attr_in_intensity2_resistance.dev_attr.attr,
247 &afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
248 &afe440x_attr_in_intensity3_resistance.dev_attr.attr,
249 &afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
250 &afe440x_attr_in_intensity4_resistance.dev_attr.attr,
251 &afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
255 static const struct attribute_group afe440x_attribute_group = {
256 .attrs = afe440x_attributes
259 static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val)
261 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
265 /* Enable reading from the device */
266 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
270 ret = spi_write_then_read(afe->spi, ®, 1, rx, 3);
274 *val = (rx[0] << 16) |
278 /* Disable reading from the device */
279 tx[3] = AFE440X_CONTROL0_WRITE;
280 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
287 static int afe4403_read_raw(struct iio_dev *indio_dev,
288 struct iio_chan_spec const *chan,
289 int *val, int *val2, long mask)
291 struct afe4403_data *afe = iio_priv(indio_dev);
292 unsigned int reg = afe4403_channel_values[chan->address];
293 unsigned int field = afe4403_channel_leds[chan->address];
296 switch (chan->type) {
299 case IIO_CHAN_INFO_RAW:
300 ret = afe4403_read(afe, reg, val);
308 case IIO_CHAN_INFO_RAW:
309 ret = regmap_field_read(afe->fields[field], val);
313 case IIO_CHAN_INFO_SCALE:
316 return IIO_VAL_INT_PLUS_MICRO;
326 static int afe4403_write_raw(struct iio_dev *indio_dev,
327 struct iio_chan_spec const *chan,
328 int val, int val2, long mask)
330 struct afe4403_data *afe = iio_priv(indio_dev);
331 unsigned int field = afe4403_channel_leds[chan->address];
333 switch (chan->type) {
336 case IIO_CHAN_INFO_RAW:
337 return regmap_field_write(afe->fields[field], val);
347 static const struct iio_info afe4403_iio_info = {
348 .attrs = &afe440x_attribute_group,
349 .read_raw = afe4403_read_raw,
350 .write_raw = afe4403_write_raw,
351 .driver_module = THIS_MODULE,
354 static irqreturn_t afe4403_trigger_handler(int irq, void *private)
356 struct iio_poll_func *pf = private;
357 struct iio_dev *indio_dev = pf->indio_dev;
358 struct afe4403_data *afe = iio_priv(indio_dev);
361 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
364 /* Enable reading from the device */
365 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
369 for_each_set_bit(bit, indio_dev->active_scan_mask,
370 indio_dev->masklength) {
371 ret = spi_write_then_read(afe->spi,
372 &afe4403_channel_values[bit], 1,
377 buffer[i++] = (rx[0] << 16) |
382 /* Disable reading from the device */
383 tx[3] = AFE440X_CONTROL0_WRITE;
384 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
388 iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp);
390 iio_trigger_notify_done(indio_dev->trig);
395 static const struct iio_trigger_ops afe4403_trigger_ops = {
396 .owner = THIS_MODULE,
399 #define AFE4403_TIMING_PAIRS \
400 { AFE440X_LED2STC, 0x000050 }, \
401 { AFE440X_LED2ENDC, 0x0003e7 }, \
402 { AFE440X_LED1LEDSTC, 0x0007d0 }, \
403 { AFE440X_LED1LEDENDC, 0x000bb7 }, \
404 { AFE440X_ALED2STC, 0x000438 }, \
405 { AFE440X_ALED2ENDC, 0x0007cf }, \
406 { AFE440X_LED1STC, 0x000820 }, \
407 { AFE440X_LED1ENDC, 0x000bb7 }, \
408 { AFE440X_LED2LEDSTC, 0x000000 }, \
409 { AFE440X_LED2LEDENDC, 0x0003e7 }, \
410 { AFE440X_ALED1STC, 0x000c08 }, \
411 { AFE440X_ALED1ENDC, 0x000f9f }, \
412 { AFE440X_LED2CONVST, 0x0003ef }, \
413 { AFE440X_LED2CONVEND, 0x0007cf }, \
414 { AFE440X_ALED2CONVST, 0x0007d7 }, \
415 { AFE440X_ALED2CONVEND, 0x000bb7 }, \
416 { AFE440X_LED1CONVST, 0x000bbf }, \
417 { AFE440X_LED1CONVEND, 0x009c3f }, \
418 { AFE440X_ALED1CONVST, 0x000fa7 }, \
419 { AFE440X_ALED1CONVEND, 0x001387 }, \
420 { AFE440X_ADCRSTSTCT0, 0x0003e8 }, \
421 { AFE440X_ADCRSTENDCT0, 0x0003eb }, \
422 { AFE440X_ADCRSTSTCT1, 0x0007d0 }, \
423 { AFE440X_ADCRSTENDCT1, 0x0007d3 }, \
424 { AFE440X_ADCRSTSTCT2, 0x000bb8 }, \
425 { AFE440X_ADCRSTENDCT2, 0x000bbb }, \
426 { AFE440X_ADCRSTSTCT3, 0x000fa0 }, \
427 { AFE440X_ADCRSTENDCT3, 0x000fa3 }, \
428 { AFE440X_PRPCOUNT, 0x009c3f }, \
429 { AFE440X_PDNCYCLESTC, 0x001518 }, \
430 { AFE440X_PDNCYCLEENDC, 0x00991f }
432 static const struct reg_sequence afe4403_reg_sequences[] = {
433 AFE4403_TIMING_PAIRS,
434 { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
435 { AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN },
438 static const struct regmap_range afe4403_yes_ranges[] = {
439 regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
442 static const struct regmap_access_table afe4403_volatile_table = {
443 .yes_ranges = afe4403_yes_ranges,
444 .n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges),
447 static const struct regmap_config afe4403_regmap_config = {
451 .max_register = AFE440X_PDNCYCLEENDC,
452 .cache_type = REGCACHE_RBTREE,
453 .volatile_table = &afe4403_volatile_table,
456 static const struct of_device_id afe4403_of_match[] = {
457 { .compatible = "ti,afe4403", },
460 MODULE_DEVICE_TABLE(of, afe4403_of_match);
462 static int __maybe_unused afe4403_suspend(struct device *dev)
464 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
465 struct afe4403_data *afe = iio_priv(indio_dev);
468 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
469 AFE440X_CONTROL2_PDN_AFE,
470 AFE440X_CONTROL2_PDN_AFE);
474 ret = regulator_disable(afe->regulator);
476 dev_err(dev, "Unable to disable regulator\n");
483 static int __maybe_unused afe4403_resume(struct device *dev)
485 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
486 struct afe4403_data *afe = iio_priv(indio_dev);
489 ret = regulator_enable(afe->regulator);
491 dev_err(dev, "Unable to enable regulator\n");
495 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
496 AFE440X_CONTROL2_PDN_AFE, 0);
503 static SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend, afe4403_resume);
505 static int afe4403_probe(struct spi_device *spi)
507 struct iio_dev *indio_dev;
508 struct afe4403_data *afe;
511 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe));
515 afe = iio_priv(indio_dev);
516 spi_set_drvdata(spi, indio_dev);
518 afe->dev = &spi->dev;
522 afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config);
523 if (IS_ERR(afe->regmap)) {
524 dev_err(afe->dev, "Unable to allocate register map\n");
525 return PTR_ERR(afe->regmap);
528 for (i = 0; i < F_MAX_FIELDS; i++) {
529 afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
530 afe4403_reg_fields[i]);
531 if (IS_ERR(afe->fields[i])) {
532 dev_err(afe->dev, "Unable to allocate regmap fields\n");
533 return PTR_ERR(afe->fields[i]);
537 afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
538 if (IS_ERR(afe->regulator)) {
539 dev_err(afe->dev, "Unable to get regulator\n");
540 return PTR_ERR(afe->regulator);
542 ret = regulator_enable(afe->regulator);
544 dev_err(afe->dev, "Unable to enable regulator\n");
548 ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
549 AFE440X_CONTROL0_SW_RESET);
551 dev_err(afe->dev, "Unable to reset device\n");
552 goto err_disable_reg;
555 ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences,
556 ARRAY_SIZE(afe4403_reg_sequences));
558 dev_err(afe->dev, "Unable to set register defaults\n");
559 goto err_disable_reg;
562 indio_dev->modes = INDIO_DIRECT_MODE;
563 indio_dev->dev.parent = afe->dev;
564 indio_dev->channels = afe4403_channels;
565 indio_dev->num_channels = ARRAY_SIZE(afe4403_channels);
566 indio_dev->name = AFE4403_DRIVER_NAME;
567 indio_dev->info = &afe4403_iio_info;
570 afe->trig = devm_iio_trigger_alloc(afe->dev,
575 dev_err(afe->dev, "Unable to allocate IIO trigger\n");
577 goto err_disable_reg;
580 iio_trigger_set_drvdata(afe->trig, indio_dev);
582 afe->trig->ops = &afe4403_trigger_ops;
583 afe->trig->dev.parent = afe->dev;
585 ret = iio_trigger_register(afe->trig);
587 dev_err(afe->dev, "Unable to register IIO trigger\n");
588 goto err_disable_reg;
591 ret = devm_request_threaded_irq(afe->dev, afe->irq,
592 iio_trigger_generic_data_rdy_poll,
597 dev_err(afe->dev, "Unable to request IRQ\n");
602 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
603 afe4403_trigger_handler, NULL);
605 dev_err(afe->dev, "Unable to setup buffer\n");
609 ret = iio_device_register(indio_dev);
611 dev_err(afe->dev, "Unable to register IIO device\n");
618 iio_triggered_buffer_cleanup(indio_dev);
621 iio_trigger_unregister(afe->trig);
623 regulator_disable(afe->regulator);
628 static int afe4403_remove(struct spi_device *spi)
630 struct iio_dev *indio_dev = spi_get_drvdata(spi);
631 struct afe4403_data *afe = iio_priv(indio_dev);
634 iio_device_unregister(indio_dev);
636 iio_triggered_buffer_cleanup(indio_dev);
639 iio_trigger_unregister(afe->trig);
641 ret = regulator_disable(afe->regulator);
643 dev_err(afe->dev, "Unable to disable regulator\n");
650 static const struct spi_device_id afe4403_ids[] = {
654 MODULE_DEVICE_TABLE(spi, afe4403_ids);
656 static struct spi_driver afe4403_spi_driver = {
658 .name = AFE4403_DRIVER_NAME,
659 .of_match_table = afe4403_of_match,
660 .pm = &afe4403_pm_ops,
662 .probe = afe4403_probe,
663 .remove = afe4403_remove,
664 .id_table = afe4403_ids,
666 module_spi_driver(afe4403_spi_driver);
668 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
669 MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE");
670 MODULE_LICENSE("GPL v2");