2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
17 * - Redistributions in binary form must reproduce the above
18 * copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials
20 * provided with the distribution.
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
26 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
27 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
28 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #ifndef __IW_CXGB4_H__
32 #define __IW_CXGB4_H__
34 #include <linux/mutex.h>
35 #include <linux/list.h>
36 #include <linux/spinlock.h>
37 #include <linux/idr.h>
38 #include <linux/completion.h>
39 #include <linux/netdevice.h>
40 #include <linux/sched.h>
41 #include <linux/pci.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/inet.h>
44 #include <linux/wait.h>
45 #include <linux/kref.h>
46 #include <linux/timer.h>
49 #include <asm/byteorder.h>
51 #include <net/net_namespace.h>
53 #include <rdma/ib_verbs.h>
54 #include <rdma/iw_cm.h>
57 #include "cxgb4_uld.h"
61 #define DRV_NAME "iw_cxgb4"
62 #define MOD DRV_NAME ":"
64 extern int c4iw_debug;
65 #define PDBG(fmt, args...) \
68 printk(MOD fmt, ## args); \
73 #define PBL_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->pbl.start)
74 #define RQT_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->rq.start)
76 static inline void *cplhdr(struct sk_buff *skb)
81 #define C4IW_ID_TABLE_F_RANDOM 1 /* Pseudo-randomize the id's returned */
82 #define C4IW_ID_TABLE_F_EMPTY 2 /* Table is initially empty */
84 struct c4iw_id_table {
86 u32 start; /* logical minimal id */
87 u32 last; /* hint for find */
93 struct c4iw_resource {
94 struct c4iw_id_table tpt_table;
95 struct c4iw_id_table qid_table;
96 struct c4iw_id_table pdid_table;
99 struct c4iw_qid_list {
100 struct list_head entry;
104 struct c4iw_dev_ucontext {
105 struct list_head qpids;
106 struct list_head cqids;
110 enum c4iw_rdev_flags {
111 T4_FATAL_ERROR = (1<<0),
112 T4_STATUS_PAGE_DISABLED = (1<<1),
124 struct c4iw_stat qid;
126 struct c4iw_stat stag;
127 struct c4iw_stat pbl;
128 struct c4iw_stat rqt;
129 struct c4iw_stat ocqp;
133 u64 db_state_transitions;
134 u64 db_fc_interruptions;
136 u64 act_ofld_conn_fails;
137 u64 pas_ofld_conn_fails;
141 struct c4iw_resource resource;
142 unsigned long qpshift;
144 unsigned long cqshift;
146 struct c4iw_dev_ucontext uctx;
147 struct gen_pool *pbl_pool;
148 struct gen_pool *rqt_pool;
149 struct gen_pool *ocqp_pool;
151 struct cxgb4_lld_info lldi;
152 unsigned long bar2_pa;
153 void __iomem *bar2_kva;
154 unsigned long oc_mw_pa;
155 void __iomem *oc_mw_kva;
156 struct c4iw_stats stats;
157 struct t4_dev_status_page *status_page;
160 static inline int c4iw_fatal_error(struct c4iw_rdev *rdev)
162 return rdev->flags & T4_FATAL_ERROR;
165 static inline int c4iw_num_stags(struct c4iw_rdev *rdev)
167 return min((int)T4_MAX_NUM_STAG, (int)(rdev->lldi.vr->stag.size >> 5));
170 #define C4IW_WR_TO (30*HZ)
172 struct c4iw_wr_wait {
173 struct completion completion;
177 static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp)
180 init_completion(&wr_waitp->completion);
183 static inline void c4iw_wake_up(struct c4iw_wr_wait *wr_waitp, int ret)
186 complete(&wr_waitp->completion);
189 static inline int c4iw_wait_for_reply(struct c4iw_rdev *rdev,
190 struct c4iw_wr_wait *wr_waitp,
194 unsigned to = C4IW_WR_TO;
198 ret = wait_for_completion_timeout(&wr_waitp->completion, to);
200 printk(KERN_ERR MOD "%s - Device %s not responding - "
201 "tid %u qpid %u\n", func,
202 pci_name(rdev->lldi.pdev), hwtid, qpid);
203 if (c4iw_fatal_error(rdev)) {
204 wr_waitp->ret = -EIO;
211 PDBG("%s: FW reply %d tid %u qpid %u\n",
212 pci_name(rdev->lldi.pdev), wr_waitp->ret, hwtid, qpid);
213 return wr_waitp->ret;
224 struct ib_device ibdev;
225 struct c4iw_rdev rdev;
226 u32 device_cap_flags;
231 struct mutex db_mutex;
232 struct dentry *debugfs_root;
233 enum db_state db_state;
234 struct idr hwtid_idr;
237 struct list_head db_fc_list;
240 static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev)
242 return container_of(ibdev, struct c4iw_dev, ibdev);
245 static inline struct c4iw_dev *rdev_to_c4iw_dev(struct c4iw_rdev *rdev)
247 return container_of(rdev, struct c4iw_dev, rdev);
250 static inline struct c4iw_cq *get_chp(struct c4iw_dev *rhp, u32 cqid)
252 return idr_find(&rhp->cqidr, cqid);
255 static inline struct c4iw_qp *get_qhp(struct c4iw_dev *rhp, u32 qpid)
257 return idr_find(&rhp->qpidr, qpid);
260 static inline struct c4iw_mr *get_mhp(struct c4iw_dev *rhp, u32 mmid)
262 return idr_find(&rhp->mmidr, mmid);
265 static inline int _insert_handle(struct c4iw_dev *rhp, struct idr *idr,
266 void *handle, u32 id, int lock)
271 idr_preload(GFP_KERNEL);
272 spin_lock_irq(&rhp->lock);
275 ret = idr_alloc(idr, handle, id, id + 1, GFP_ATOMIC);
278 spin_unlock_irq(&rhp->lock);
282 BUG_ON(ret == -ENOSPC);
283 return ret < 0 ? ret : 0;
286 static inline int insert_handle(struct c4iw_dev *rhp, struct idr *idr,
287 void *handle, u32 id)
289 return _insert_handle(rhp, idr, handle, id, 1);
292 static inline int insert_handle_nolock(struct c4iw_dev *rhp, struct idr *idr,
293 void *handle, u32 id)
295 return _insert_handle(rhp, idr, handle, id, 0);
298 static inline void _remove_handle(struct c4iw_dev *rhp, struct idr *idr,
302 spin_lock_irq(&rhp->lock);
305 spin_unlock_irq(&rhp->lock);
308 static inline void remove_handle(struct c4iw_dev *rhp, struct idr *idr, u32 id)
310 _remove_handle(rhp, idr, id, 1);
313 static inline void remove_handle_nolock(struct c4iw_dev *rhp,
314 struct idr *idr, u32 id)
316 _remove_handle(rhp, idr, id, 0);
322 struct c4iw_dev *rhp;
325 static inline struct c4iw_pd *to_c4iw_pd(struct ib_pd *ibpd)
327 return container_of(ibpd, struct c4iw_pd, ibpd);
330 struct tpt_attributes {
333 enum fw_ri_mem_perms perms;
342 u32 remote_invaliate_disable:1;
344 u32 mw_bind_enable:1;
350 struct ib_umem *umem;
351 struct c4iw_dev *rhp;
353 struct tpt_attributes attr;
356 static inline struct c4iw_mr *to_c4iw_mr(struct ib_mr *ibmr)
358 return container_of(ibmr, struct c4iw_mr, ibmr);
363 struct c4iw_dev *rhp;
365 struct tpt_attributes attr;
368 static inline struct c4iw_mw *to_c4iw_mw(struct ib_mw *ibmw)
370 return container_of(ibmw, struct c4iw_mw, ibmw);
373 struct c4iw_fr_page_list {
374 struct ib_fast_reg_page_list ibpl;
375 DEFINE_DMA_UNMAP_ADDR(mapping);
377 struct c4iw_dev *dev;
381 static inline struct c4iw_fr_page_list *to_c4iw_fr_page_list(
382 struct ib_fast_reg_page_list *ibpl)
384 return container_of(ibpl, struct c4iw_fr_page_list, ibpl);
389 struct c4iw_dev *rhp;
392 spinlock_t comp_handler_lock;
394 wait_queue_head_t wait;
397 static inline struct c4iw_cq *to_c4iw_cq(struct ib_cq *ibcq)
399 return container_of(ibcq, struct c4iw_cq, ibcq);
402 struct c4iw_mpa_attributes {
404 u8 recv_marker_enabled;
405 u8 xmit_marker_enabled;
407 u8 enhanced_rdma_conn;
412 struct c4iw_qp_attributes {
418 u32 sq_max_sges_rdma_write;
422 u8 enable_rdma_write;
424 u8 enable_mmid0_fastreg;
429 char terminate_buffer[52];
430 u32 terminate_msg_len;
431 u8 is_terminate_local;
432 struct c4iw_mpa_attributes mpa_attr;
433 struct c4iw_ep *llp_stream_handle;
443 struct list_head db_fc_entry;
444 struct c4iw_dev *rhp;
446 struct c4iw_qp_attributes attr;
451 wait_queue_head_t wait;
452 struct timer_list timer;
456 static inline struct c4iw_qp *to_c4iw_qp(struct ib_qp *ibqp)
458 return container_of(ibqp, struct c4iw_qp, ibqp);
461 struct c4iw_ucontext {
462 struct ib_ucontext ibucontext;
463 struct c4iw_dev_ucontext uctx;
465 spinlock_t mmap_lock;
466 struct list_head mmaps;
469 static inline struct c4iw_ucontext *to_c4iw_ucontext(struct ib_ucontext *c)
471 return container_of(c, struct c4iw_ucontext, ibucontext);
474 struct c4iw_mm_entry {
475 struct list_head entry;
481 static inline struct c4iw_mm_entry *remove_mmap(struct c4iw_ucontext *ucontext,
482 u32 key, unsigned len)
484 struct list_head *pos, *nxt;
485 struct c4iw_mm_entry *mm;
487 spin_lock(&ucontext->mmap_lock);
488 list_for_each_safe(pos, nxt, &ucontext->mmaps) {
490 mm = list_entry(pos, struct c4iw_mm_entry, entry);
491 if (mm->key == key && mm->len == len) {
492 list_del_init(&mm->entry);
493 spin_unlock(&ucontext->mmap_lock);
494 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
495 key, (unsigned long long) mm->addr, mm->len);
499 spin_unlock(&ucontext->mmap_lock);
503 static inline void insert_mmap(struct c4iw_ucontext *ucontext,
504 struct c4iw_mm_entry *mm)
506 spin_lock(&ucontext->mmap_lock);
507 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
508 mm->key, (unsigned long long) mm->addr, mm->len);
509 list_add_tail(&mm->entry, &ucontext->mmaps);
510 spin_unlock(&ucontext->mmap_lock);
513 enum c4iw_qp_attr_mask {
514 C4IW_QP_ATTR_NEXT_STATE = 1 << 0,
515 C4IW_QP_ATTR_SQ_DB = 1<<1,
516 C4IW_QP_ATTR_RQ_DB = 1<<2,
517 C4IW_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,
518 C4IW_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,
519 C4IW_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,
520 C4IW_QP_ATTR_MAX_ORD = 1 << 11,
521 C4IW_QP_ATTR_MAX_IRD = 1 << 12,
522 C4IW_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,
523 C4IW_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,
524 C4IW_QP_ATTR_MPA_ATTR = 1 << 24,
525 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,
526 C4IW_QP_ATTR_VALID_MODIFY = (C4IW_QP_ATTR_ENABLE_RDMA_READ |
527 C4IW_QP_ATTR_ENABLE_RDMA_WRITE |
528 C4IW_QP_ATTR_MAX_ORD |
529 C4IW_QP_ATTR_MAX_IRD |
530 C4IW_QP_ATTR_LLP_STREAM_HANDLE |
531 C4IW_QP_ATTR_STREAM_MSG_BUFFER |
532 C4IW_QP_ATTR_MPA_ATTR |
533 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE)
536 int c4iw_modify_qp(struct c4iw_dev *rhp,
538 enum c4iw_qp_attr_mask mask,
539 struct c4iw_qp_attributes *attrs,
546 C4IW_QP_STATE_TERMINATE,
547 C4IW_QP_STATE_CLOSING,
551 static inline int c4iw_convert_state(enum ib_qp_state ib_state)
556 return C4IW_QP_STATE_IDLE;
558 return C4IW_QP_STATE_RTS;
560 return C4IW_QP_STATE_CLOSING;
562 return C4IW_QP_STATE_TERMINATE;
564 return C4IW_QP_STATE_ERROR;
570 static inline int to_ib_qp_state(int c4iw_qp_state)
572 switch (c4iw_qp_state) {
573 case C4IW_QP_STATE_IDLE:
575 case C4IW_QP_STATE_RTS:
577 case C4IW_QP_STATE_CLOSING:
579 case C4IW_QP_STATE_TERMINATE:
581 case C4IW_QP_STATE_ERROR:
587 static inline u32 c4iw_ib_to_tpt_access(int a)
589 return (a & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
590 (a & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0) |
591 (a & IB_ACCESS_LOCAL_WRITE ? FW_RI_MEM_ACCESS_LOCAL_WRITE : 0) |
592 FW_RI_MEM_ACCESS_LOCAL_READ;
595 static inline u32 c4iw_ib_to_tpt_bind_access(int acc)
597 return (acc & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
598 (acc & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0);
601 enum c4iw_mmid_state {
602 C4IW_STAG_STATE_VALID,
603 C4IW_STAG_STATE_INVALID
606 #define C4IW_NODE_DESC "cxgb4 Chelsio Communications"
608 #define MPA_KEY_REQ "MPA ID Req Frame"
609 #define MPA_KEY_REP "MPA ID Rep Frame"
611 #define MPA_MAX_PRIVATE_DATA 256
612 #define MPA_ENHANCED_RDMA_CONN 0x10
613 #define MPA_REJECT 0x20
615 #define MPA_MARKERS 0x80
616 #define MPA_FLAGS_MASK 0xE0
618 #define MPA_V2_PEER2PEER_MODEL 0x8000
619 #define MPA_V2_ZERO_LEN_FPDU_RTR 0x4000
620 #define MPA_V2_RDMA_WRITE_RTR 0x8000
621 #define MPA_V2_RDMA_READ_RTR 0x4000
622 #define MPA_V2_IRD_ORD_MASK 0x3FFF
624 #define c4iw_put_ep(ep) { \
625 PDBG("put_ep (via %s:%u) ep %p refcnt %d\n", __func__, __LINE__, \
626 ep, atomic_read(&((ep)->kref.refcount))); \
627 WARN_ON(atomic_read(&((ep)->kref.refcount)) < 1); \
628 kref_put(&((ep)->kref), _c4iw_free_ep); \
631 #define c4iw_get_ep(ep) { \
632 PDBG("get_ep (via %s:%u) ep %p, refcnt %d\n", __func__, __LINE__, \
633 ep, atomic_read(&((ep)->kref.refcount))); \
634 kref_get(&((ep)->kref)); \
636 void _c4iw_free_ep(struct kref *kref);
642 __be16 private_data_size;
646 struct mpa_v2_conn_params {
651 struct terminate_message {
658 #define TERM_MAX_LENGTH (sizeof(struct terminate_message) + 2 + 18 + 28)
660 enum c4iw_layers_types {
664 RDMAP_LOCAL_CATA = 0x00,
665 RDMAP_REMOTE_PROT = 0x01,
666 RDMAP_REMOTE_OP = 0x02,
667 DDP_LOCAL_CATA = 0x00,
668 DDP_TAGGED_ERR = 0x01,
669 DDP_UNTAGGED_ERR = 0x02,
673 enum c4iw_rdma_ecodes {
674 RDMAP_INV_STAG = 0x00,
675 RDMAP_BASE_BOUNDS = 0x01,
676 RDMAP_ACC_VIOL = 0x02,
677 RDMAP_STAG_NOT_ASSOC = 0x03,
678 RDMAP_TO_WRAP = 0x04,
679 RDMAP_INV_VERS = 0x05,
680 RDMAP_INV_OPCODE = 0x06,
681 RDMAP_STREAM_CATA = 0x07,
682 RDMAP_GLOBAL_CATA = 0x08,
683 RDMAP_CANT_INV_STAG = 0x09,
684 RDMAP_UNSPECIFIED = 0xff
687 enum c4iw_ddp_ecodes {
688 DDPT_INV_STAG = 0x00,
689 DDPT_BASE_BOUNDS = 0x01,
690 DDPT_STAG_NOT_ASSOC = 0x02,
692 DDPT_INV_VERS = 0x04,
694 DDPU_INV_MSN_NOBUF = 0x02,
695 DDPU_INV_MSN_RANGE = 0x03,
697 DDPU_MSG_TOOBIG = 0x05,
701 enum c4iw_mpa_ecodes {
703 MPA_MARKER_ERR = 0x03,
704 MPA_LOCAL_CATA = 0x05,
705 MPA_INSUFF_IRD = 0x06,
706 MPA_NOMATCH_RTR = 0x07,
725 PEER_ABORT_IN_PROGRESS = 0,
726 ABORT_REQ_IN_PROGRESS = 1,
727 RELEASE_RESOURCES = 2,
733 enum c4iw_ep_history {
753 CONN_RPL_UPCALL = 19,
754 ACT_RETRY_NOMEM = 20,
758 struct c4iw_ep_common {
759 struct iw_cm_id *cm_id;
761 struct c4iw_dev *dev;
762 enum c4iw_ep_state state;
765 struct sockaddr_storage local_addr;
766 struct sockaddr_storage remote_addr;
767 struct c4iw_wr_wait wr_wait;
769 unsigned long history;
772 struct c4iw_listen_ep {
773 struct c4iw_ep_common com;
779 struct c4iw_ep_common com;
780 struct c4iw_ep *parent_ep;
781 struct timer_list timer;
782 struct list_head entry;
787 struct l2t_entry *l2t;
788 struct dst_entry *dst;
789 struct sk_buff *mpa_skb;
790 struct c4iw_mpa_attributes mpa_attr;
791 u8 mpa_pkt[sizeof(struct mpa_message) + MPA_MAX_PRIVATE_DATA];
792 unsigned int mpa_pkt_len;
805 u8 retry_with_mpa_v1;
806 u8 tried_with_mpa_v1;
807 unsigned int retry_count;
810 static inline struct c4iw_ep *to_ep(struct iw_cm_id *cm_id)
812 return cm_id->provider_data;
815 static inline struct c4iw_listen_ep *to_listen_ep(struct iw_cm_id *cm_id)
817 return cm_id->provider_data;
820 static inline int compute_wscale(int win)
824 while (wscale < 14 && (65535<<wscale) < win)
829 static inline int ocqp_supported(const struct cxgb4_lld_info *infop)
831 #if defined(__i386__) || defined(__x86_64__) || defined(CONFIG_PPC64)
832 return infop->vr->ocq.size > 0;
838 u32 c4iw_id_alloc(struct c4iw_id_table *alloc);
839 void c4iw_id_free(struct c4iw_id_table *alloc, u32 obj);
840 int c4iw_id_table_alloc(struct c4iw_id_table *alloc, u32 start, u32 num,
841 u32 reserved, u32 flags);
842 void c4iw_id_table_free(struct c4iw_id_table *alloc);
844 typedef int (*c4iw_handler_func)(struct c4iw_dev *dev, struct sk_buff *skb);
846 int c4iw_ep_redirect(void *ctx, struct dst_entry *old, struct dst_entry *new,
847 struct l2t_entry *l2t);
848 void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qpid,
849 struct c4iw_dev_ucontext *uctx);
850 u32 c4iw_get_resource(struct c4iw_id_table *id_table);
851 void c4iw_put_resource(struct c4iw_id_table *id_table, u32 entry);
852 int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid);
853 int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev);
854 int c4iw_pblpool_create(struct c4iw_rdev *rdev);
855 int c4iw_rqtpool_create(struct c4iw_rdev *rdev);
856 int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev);
857 void c4iw_pblpool_destroy(struct c4iw_rdev *rdev);
858 void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev);
859 void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev);
860 void c4iw_destroy_resource(struct c4iw_resource *rscp);
861 int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev);
862 int c4iw_register_device(struct c4iw_dev *dev);
863 void c4iw_unregister_device(struct c4iw_dev *dev);
864 int __init c4iw_cm_init(void);
865 void __exit c4iw_cm_term(void);
866 void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
867 struct c4iw_dev_ucontext *uctx);
868 void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
869 struct c4iw_dev_ucontext *uctx);
870 int c4iw_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
871 int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
872 struct ib_send_wr **bad_wr);
873 int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
874 struct ib_recv_wr **bad_wr);
875 int c4iw_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
876 struct ib_mw_bind *mw_bind);
877 int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
878 int c4iw_create_listen(struct iw_cm_id *cm_id, int backlog);
879 int c4iw_destroy_listen(struct iw_cm_id *cm_id);
880 int c4iw_accept_cr(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
881 int c4iw_reject_cr(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len);
882 void c4iw_qp_add_ref(struct ib_qp *qp);
883 void c4iw_qp_rem_ref(struct ib_qp *qp);
884 void c4iw_free_fastreg_pbl(struct ib_fast_reg_page_list *page_list);
885 struct ib_fast_reg_page_list *c4iw_alloc_fastreg_pbl(
886 struct ib_device *device,
888 struct ib_mr *c4iw_alloc_fast_reg_mr(struct ib_pd *pd, int pbl_depth);
889 int c4iw_dealloc_mw(struct ib_mw *mw);
890 struct ib_mw *c4iw_alloc_mw(struct ib_pd *pd, enum ib_mw_type type);
891 struct ib_mr *c4iw_reg_user_mr(struct ib_pd *pd, u64 start,
892 u64 length, u64 virt, int acc,
893 struct ib_udata *udata);
894 struct ib_mr *c4iw_get_dma_mr(struct ib_pd *pd, int acc);
895 struct ib_mr *c4iw_register_phys_mem(struct ib_pd *pd,
896 struct ib_phys_buf *buffer_list,
900 int c4iw_reregister_phys_mem(struct ib_mr *mr,
903 struct ib_phys_buf *buffer_list,
905 int acc, u64 *iova_start);
906 int c4iw_dereg_mr(struct ib_mr *ib_mr);
907 int c4iw_destroy_cq(struct ib_cq *ib_cq);
908 struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries,
910 struct ib_ucontext *ib_context,
911 struct ib_udata *udata);
912 int c4iw_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata);
913 int c4iw_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags);
914 int c4iw_destroy_qp(struct ib_qp *ib_qp);
915 struct ib_qp *c4iw_create_qp(struct ib_pd *pd,
916 struct ib_qp_init_attr *attrs,
917 struct ib_udata *udata);
918 int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
919 int attr_mask, struct ib_udata *udata);
920 int c4iw_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
921 int attr_mask, struct ib_qp_init_attr *init_attr);
922 struct ib_qp *c4iw_get_qp(struct ib_device *dev, int qpn);
923 u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size);
924 void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
925 u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size);
926 void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
927 u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size);
928 void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size);
929 int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb);
930 void c4iw_flush_hw_cq(struct c4iw_cq *chp);
931 void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count);
932 int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp);
933 int c4iw_flush_rq(struct t4_wq *wq, struct t4_cq *cq, int count);
934 int c4iw_flush_sq(struct c4iw_qp *qhp);
935 int c4iw_ev_handler(struct c4iw_dev *rnicp, u32 qid);
936 u16 c4iw_rqes_posted(struct c4iw_qp *qhp);
937 int c4iw_post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe);
938 u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
939 void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid,
940 struct c4iw_dev_ucontext *uctx);
941 u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
942 void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid,
943 struct c4iw_dev_ucontext *uctx);
944 void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe);
946 extern struct cxgb4_client t4c_client;
947 extern c4iw_handler_func c4iw_handlers[NUM_CPL_CMDS];
948 extern int c4iw_max_read_depth;
949 extern int db_fc_threshold;
950 extern int db_coalescing_threshold;