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1 /*
2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
3  *
4  *  QP functions
5  *
6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
8  *           Waleri Fomin <fomin@de.ibm.com>
9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
10  *           Reinhard Ernst <rernst@de.ibm.com>
11  *           Heiko J Schick <schickhj@de.ibm.com>
12  *
13  *  Copyright (c) 2005 IBM Corporation
14  *
15  *  All rights reserved.
16  *
17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
18  *  BSD.
19  *
20  * OpenIB BSD License
21  *
22  * Redistribution and use in source and binary forms, with or without
23  * modification, are permitted provided that the following conditions are met:
24  *
25  * Redistributions of source code must retain the above copyright notice, this
26  * list of conditions and the following disclaimer.
27  *
28  * Redistributions in binary form must reproduce the above copyright notice,
29  * this list of conditions and the following disclaimer in the documentation
30  * and/or other materials
31  * provided with the distribution.
32  *
33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43  * POSSIBILITY OF SUCH DAMAGE.
44  */
45
46
47 #include <asm/current.h>
48
49 #include "ehca_classes.h"
50 #include "ehca_tools.h"
51 #include "ehca_qes.h"
52 #include "ehca_iverbs.h"
53 #include "hcp_if.h"
54 #include "hipz_fns.h"
55
56 static struct kmem_cache *qp_cache;
57
58 /*
59  * attributes not supported by query qp
60  */
61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
63                                      IB_QP_ACCESS_FLAGS       | \
64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
65
66 /*
67  * ehca (internal) qp state values
68  */
69 enum ehca_qp_state {
70         EHCA_QPS_RESET = 1,
71         EHCA_QPS_INIT = 2,
72         EHCA_QPS_RTR = 3,
73         EHCA_QPS_RTS = 5,
74         EHCA_QPS_SQD = 6,
75         EHCA_QPS_SQE = 8,
76         EHCA_QPS_ERR = 128
77 };
78
79 /*
80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
81  */
82 enum ib_qp_statetrans {
83         IB_QPST_ANY2RESET,
84         IB_QPST_ANY2ERR,
85         IB_QPST_RESET2INIT,
86         IB_QPST_INIT2RTR,
87         IB_QPST_INIT2INIT,
88         IB_QPST_RTR2RTS,
89         IB_QPST_RTS2SQD,
90         IB_QPST_RTS2RTS,
91         IB_QPST_SQD2RTS,
92         IB_QPST_SQE2RTS,
93         IB_QPST_SQD2SQD,
94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
95 };
96
97 /*
98  * ib2ehca_qp_state maps IB to ehca qp_state
99  * returns ehca qp state corresponding to given ib qp state
100  */
101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
102 {
103         switch (ib_qp_state) {
104         case IB_QPS_RESET:
105                 return EHCA_QPS_RESET;
106         case IB_QPS_INIT:
107                 return EHCA_QPS_INIT;
108         case IB_QPS_RTR:
109                 return EHCA_QPS_RTR;
110         case IB_QPS_RTS:
111                 return EHCA_QPS_RTS;
112         case IB_QPS_SQD:
113                 return EHCA_QPS_SQD;
114         case IB_QPS_SQE:
115                 return EHCA_QPS_SQE;
116         case IB_QPS_ERR:
117                 return EHCA_QPS_ERR;
118         default:
119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
120                 return -EINVAL;
121         }
122 }
123
124 /*
125  * ehca2ib_qp_state maps ehca to IB qp_state
126  * returns ib qp state corresponding to given ehca qp state
127  */
128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
129                                                 ehca_qp_state)
130 {
131         switch (ehca_qp_state) {
132         case EHCA_QPS_RESET:
133                 return IB_QPS_RESET;
134         case EHCA_QPS_INIT:
135                 return IB_QPS_INIT;
136         case EHCA_QPS_RTR:
137                 return IB_QPS_RTR;
138         case EHCA_QPS_RTS:
139                 return IB_QPS_RTS;
140         case EHCA_QPS_SQD:
141                 return IB_QPS_SQD;
142         case EHCA_QPS_SQE:
143                 return IB_QPS_SQE;
144         case EHCA_QPS_ERR:
145                 return IB_QPS_ERR;
146         default:
147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
148                 return -EINVAL;
149         }
150 }
151
152 /*
153  * ehca_qp_type used as index for req_attr and opt_attr of
154  * struct ehca_modqp_statetrans
155  */
156 enum ehca_qp_type {
157         QPT_RC = 0,
158         QPT_UC = 1,
159         QPT_UD = 2,
160         QPT_SQP = 3,
161         QPT_MAX
162 };
163
164 /*
165  * ib2ehcaqptype maps Ib to ehca qp_type
166  * returns ehca qp type corresponding to ib qp type
167  */
168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
169 {
170         switch (ibqptype) {
171         case IB_QPT_SMI:
172         case IB_QPT_GSI:
173                 return QPT_SQP;
174         case IB_QPT_RC:
175                 return QPT_RC;
176         case IB_QPT_UC:
177                 return QPT_UC;
178         case IB_QPT_UD:
179                 return QPT_UD;
180         default:
181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
182                 return -EINVAL;
183         }
184 }
185
186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
187                                                          int ib_tostate)
188 {
189         int index = -EINVAL;
190         switch (ib_tostate) {
191         case IB_QPS_RESET:
192                 index = IB_QPST_ANY2RESET;
193                 break;
194         case IB_QPS_INIT:
195                 switch (ib_fromstate) {
196                 case IB_QPS_RESET:
197                         index = IB_QPST_RESET2INIT;
198                         break;
199                 case IB_QPS_INIT:
200                         index = IB_QPST_INIT2INIT;
201                         break;
202                 }
203                 break;
204         case IB_QPS_RTR:
205                 if (ib_fromstate == IB_QPS_INIT)
206                         index = IB_QPST_INIT2RTR;
207                 break;
208         case IB_QPS_RTS:
209                 switch (ib_fromstate) {
210                 case IB_QPS_RTR:
211                         index = IB_QPST_RTR2RTS;
212                         break;
213                 case IB_QPS_RTS:
214                         index = IB_QPST_RTS2RTS;
215                         break;
216                 case IB_QPS_SQD:
217                         index = IB_QPST_SQD2RTS;
218                         break;
219                 case IB_QPS_SQE:
220                         index = IB_QPST_SQE2RTS;
221                         break;
222                 }
223                 break;
224         case IB_QPS_SQD:
225                 if (ib_fromstate == IB_QPS_RTS)
226                         index = IB_QPST_RTS2SQD;
227                 break;
228         case IB_QPS_SQE:
229                 break;
230         case IB_QPS_ERR:
231                 index = IB_QPST_ANY2ERR;
232                 break;
233         default:
234                 break;
235         }
236         return index;
237 }
238
239 /*
240  * ibqptype2servicetype returns hcp service type corresponding to given
241  * ib qp type used by create_qp()
242  */
243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
244 {
245         switch (ibqptype) {
246         case IB_QPT_SMI:
247         case IB_QPT_GSI:
248                 return ST_UD;
249         case IB_QPT_RC:
250                 return ST_RC;
251         case IB_QPT_UC:
252                 return ST_UC;
253         case IB_QPT_UD:
254                 return ST_UD;
255         case IB_QPT_RAW_IPV6:
256                 return -EINVAL;
257         case IB_QPT_RAW_ETY:
258                 return -EINVAL;
259         default:
260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
261                 return -EINVAL;
262         }
263 }
264
265 /*
266  * init userspace queue info from ipz_queue data
267  */
268 static inline void queue2resp(struct ipzu_queue_resp *resp,
269                               struct ipz_queue *queue)
270 {
271         resp->qe_size = queue->qe_size;
272         resp->act_nr_of_sg = queue->act_nr_of_sg;
273         resp->queue_length = queue->queue_length;
274         resp->pagesize = queue->pagesize;
275         resp->toggle_state = queue->toggle_state;
276         resp->offset = queue->offset;
277 }
278
279 /*
280  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
281  */
282 static inline int init_qp_queue(struct ehca_shca *shca,
283                                 struct ehca_pd *pd,
284                                 struct ehca_qp *my_qp,
285                                 struct ipz_queue *queue,
286                                 int q_type,
287                                 u64 expected_hret,
288                                 struct ehca_alloc_queue_parms *parms,
289                                 int wqe_size)
290 {
291         int ret, cnt, ipz_rc, nr_q_pages;
292         void *vpage;
293         u64 rpage, h_ret;
294         struct ib_device *ib_dev = &shca->ib_device;
295         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
296
297         if (!parms->queue_size)
298                 return 0;
299
300         if (parms->is_small) {
301                 nr_q_pages = 1;
302                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
303                                         128 << parms->page_size,
304                                         wqe_size, parms->act_nr_sges, 1);
305         } else {
306                 nr_q_pages = parms->queue_size;
307                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
308                                         EHCA_PAGESIZE, wqe_size,
309                                         parms->act_nr_sges, 0);
310         }
311
312         if (!ipz_rc) {
313                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%i",
314                          ipz_rc);
315                 return -EBUSY;
316         }
317
318         /* register queue pages */
319         for (cnt = 0; cnt < nr_q_pages; cnt++) {
320                 vpage = ipz_qpageit_get_inc(queue);
321                 if (!vpage) {
322                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
323                                  "failed p_vpage= %p", vpage);
324                         ret = -EINVAL;
325                         goto init_qp_queue1;
326                 }
327                 rpage = virt_to_abs(vpage);
328
329                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
330                                                  my_qp->ipz_qp_handle,
331                                                  NULL, 0, q_type,
332                                                  rpage, parms->is_small ? 0 : 1,
333                                                  my_qp->galpas.kernel);
334                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
335                         if (h_ret != expected_hret) {
336                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
337                                          "h_ret=%li", h_ret);
338                                 ret = ehca2ib_return_code(h_ret);
339                                 goto init_qp_queue1;
340                         }
341                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
342                         if (vpage) {
343                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
344                                          "should not succeed vpage=%p", vpage);
345                                 ret = -EINVAL;
346                                 goto init_qp_queue1;
347                         }
348                 } else {
349                         if (h_ret != H_PAGE_REGISTERED) {
350                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
351                                          "h_ret=%li", h_ret);
352                                 ret = ehca2ib_return_code(h_ret);
353                                 goto init_qp_queue1;
354                         }
355                 }
356         }
357
358         ipz_qeit_reset(queue);
359
360         return 0;
361
362 init_qp_queue1:
363         ipz_queue_dtor(pd, queue);
364         return ret;
365 }
366
367 static inline int ehca_calc_wqe_size(int act_nr_sge, int is_llqp)
368 {
369         if (is_llqp)
370                 return 128 << act_nr_sge;
371         else
372                 return offsetof(struct ehca_wqe,
373                                 u.nud.sg_list[act_nr_sge]);
374 }
375
376 static void ehca_determine_small_queue(struct ehca_alloc_queue_parms *queue,
377                                        int req_nr_sge, int is_llqp)
378 {
379         u32 wqe_size, q_size;
380         int act_nr_sge = req_nr_sge;
381
382         if (!is_llqp)
383                 /* round up #SGEs so WQE size is a power of 2 */
384                 for (act_nr_sge = 4; act_nr_sge <= 252;
385                      act_nr_sge = 4 + 2 * act_nr_sge)
386                         if (act_nr_sge >= req_nr_sge)
387                                 break;
388
389         wqe_size = ehca_calc_wqe_size(act_nr_sge, is_llqp);
390         q_size = wqe_size * (queue->max_wr + 1);
391
392         if (q_size <= 512)
393                 queue->page_size = 2;
394         else if (q_size <= 1024)
395                 queue->page_size = 3;
396         else
397                 queue->page_size = 0;
398
399         queue->is_small = (queue->page_size != 0);
400 }
401
402 /*
403  * Create an ib_qp struct that is either a QP or an SRQ, depending on
404  * the value of the is_srq parameter. If init_attr and srq_init_attr share
405  * fields, the field out of init_attr is used.
406  */
407 static struct ehca_qp *internal_create_qp(
408         struct ib_pd *pd,
409         struct ib_qp_init_attr *init_attr,
410         struct ib_srq_init_attr *srq_init_attr,
411         struct ib_udata *udata, int is_srq)
412 {
413         struct ehca_qp *my_qp;
414         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
415         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
416                                               ib_device);
417         struct ib_ucontext *context = NULL;
418         u64 h_ret;
419         int is_llqp = 0, has_srq = 0;
420         int qp_type, max_send_sge, max_recv_sge, ret;
421
422         /* h_call's out parameters */
423         struct ehca_alloc_qp_parms parms;
424         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
425         unsigned long flags;
426
427         memset(&parms, 0, sizeof(parms));
428         qp_type = init_attr->qp_type;
429
430         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
431                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
432                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
433                          init_attr->sq_sig_type);
434                 return ERR_PTR(-EINVAL);
435         }
436
437         /* save LLQP info */
438         if (qp_type & 0x80) {
439                 is_llqp = 1;
440                 parms.ext_type = EQPT_LLQP;
441                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
442         }
443         qp_type &= 0x1F;
444         init_attr->qp_type &= 0x1F;
445
446         /* handle SRQ base QPs */
447         if (init_attr->srq) {
448                 struct ehca_qp *my_srq =
449                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
450
451                 has_srq = 1;
452                 parms.ext_type = EQPT_SRQBASE;
453                 parms.srq_qpn = my_srq->real_qp_num;
454         }
455
456         if (is_llqp && has_srq) {
457                 ehca_err(pd->device, "LLQPs can't have an SRQ");
458                 return ERR_PTR(-EINVAL);
459         }
460
461         /* handle SRQs */
462         if (is_srq) {
463                 parms.ext_type = EQPT_SRQ;
464                 parms.srq_limit = srq_init_attr->attr.srq_limit;
465                 if (init_attr->cap.max_recv_sge > 3) {
466                         ehca_err(pd->device, "no more than three SGEs "
467                                  "supported for SRQ  pd=%p  max_sge=%x",
468                                  pd, init_attr->cap.max_recv_sge);
469                         return ERR_PTR(-EINVAL);
470                 }
471         }
472
473         /* check QP type */
474         if (qp_type != IB_QPT_UD &&
475             qp_type != IB_QPT_UC &&
476             qp_type != IB_QPT_RC &&
477             qp_type != IB_QPT_SMI &&
478             qp_type != IB_QPT_GSI) {
479                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
480                 return ERR_PTR(-EINVAL);
481         }
482
483         if (is_llqp) {
484                 switch (qp_type) {
485                 case IB_QPT_RC:
486                         if ((init_attr->cap.max_send_wr > 255) ||
487                             (init_attr->cap.max_recv_wr > 255)) {
488                                 ehca_err(pd->device,
489                                          "Invalid Number of max_sq_wr=%x "
490                                          "or max_rq_wr=%x for RC LLQP",
491                                          init_attr->cap.max_send_wr,
492                                          init_attr->cap.max_recv_wr);
493                                 return ERR_PTR(-EINVAL);
494                         }
495                         break;
496                 case IB_QPT_UD:
497                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
498                                 ehca_err(pd->device, "UD LLQP not supported "
499                                          "by this adapter");
500                                 return ERR_PTR(-ENOSYS);
501                         }
502                         if (!(init_attr->cap.max_send_sge <= 5
503                             && init_attr->cap.max_send_sge >= 1
504                             && init_attr->cap.max_recv_sge <= 5
505                             && init_attr->cap.max_recv_sge >= 1)) {
506                                 ehca_err(pd->device,
507                                          "Invalid Number of max_send_sge=%x "
508                                          "or max_recv_sge=%x for UD LLQP",
509                                          init_attr->cap.max_send_sge,
510                                          init_attr->cap.max_recv_sge);
511                                 return ERR_PTR(-EINVAL);
512                         } else if (init_attr->cap.max_send_wr > 255) {
513                                 ehca_err(pd->device,
514                                          "Invalid Number of "
515                                          "max_send_wr=%x for UD QP_TYPE=%x",
516                                          init_attr->cap.max_send_wr, qp_type);
517                                 return ERR_PTR(-EINVAL);
518                         }
519                         break;
520                 default:
521                         ehca_err(pd->device, "unsupported LL QP Type=%x",
522                                  qp_type);
523                         return ERR_PTR(-EINVAL);
524                         break;
525                 }
526         } else {
527                 int max_sge = (qp_type == IB_QPT_UD || qp_type == IB_QPT_SMI
528                                || qp_type == IB_QPT_GSI) ? 250 : 252;
529
530                 if (init_attr->cap.max_send_sge > max_sge
531                     || init_attr->cap.max_recv_sge > max_sge) {
532                         ehca_err(pd->device, "Invalid number of SGEs requested "
533                                  "send_sge=%x recv_sge=%x max_sge=%x",
534                                  init_attr->cap.max_send_sge,
535                                  init_attr->cap.max_recv_sge, max_sge);
536                         return ERR_PTR(-EINVAL);
537                 }
538         }
539
540         if (pd->uobject && udata)
541                 context = pd->uobject->context;
542
543         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
544         if (!my_qp) {
545                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
546                 return ERR_PTR(-ENOMEM);
547         }
548
549         spin_lock_init(&my_qp->spinlock_s);
550         spin_lock_init(&my_qp->spinlock_r);
551         my_qp->qp_type = qp_type;
552         my_qp->ext_type = parms.ext_type;
553
554         if (init_attr->recv_cq)
555                 my_qp->recv_cq =
556                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
557         if (init_attr->send_cq)
558                 my_qp->send_cq =
559                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
560
561         do {
562                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
563                         ret = -ENOMEM;
564                         ehca_err(pd->device, "Can't reserve idr resources.");
565                         goto create_qp_exit0;
566                 }
567
568                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
569                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
570                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
571         } while (ret == -EAGAIN);
572
573         if (ret) {
574                 ret = -ENOMEM;
575                 ehca_err(pd->device, "Can't allocate new idr entry.");
576                 goto create_qp_exit0;
577         }
578
579         if (my_qp->token > 0x1FFFFFF) {
580                 ret = -EINVAL;
581                 ehca_err(pd->device, "Invalid number of qp");
582                 goto create_qp_exit1;
583         }
584
585         if (has_srq)
586                 parms.srq_token = my_qp->token;
587
588         parms.servicetype = ibqptype2servicetype(qp_type);
589         if (parms.servicetype < 0) {
590                 ret = -EINVAL;
591                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
592                 goto create_qp_exit1;
593         }
594
595         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
596                 parms.sigtype = HCALL_SIGT_EVERY;
597         else
598                 parms.sigtype = HCALL_SIGT_BY_WQE;
599
600         /* UD_AV CIRCUMVENTION */
601         max_send_sge = init_attr->cap.max_send_sge;
602         max_recv_sge = init_attr->cap.max_recv_sge;
603         if (parms.servicetype == ST_UD && !is_llqp) {
604                 max_send_sge += 2;
605                 max_recv_sge += 2;
606         }
607
608         parms.token = my_qp->token;
609         parms.eq_handle = shca->eq.ipz_eq_handle;
610         parms.pd = my_pd->fw_pd;
611         if (my_qp->send_cq)
612                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
613         if (my_qp->recv_cq)
614                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
615
616         parms.squeue.max_wr = init_attr->cap.max_send_wr;
617         parms.rqueue.max_wr = init_attr->cap.max_recv_wr;
618         parms.squeue.max_sge = max_send_sge;
619         parms.rqueue.max_sge = max_recv_sge;
620
621         if (EHCA_BMASK_GET(HCA_CAP_MINI_QP, shca->hca_cap)) {
622                 if (HAS_SQ(my_qp))
623                         ehca_determine_small_queue(
624                                 &parms.squeue, max_send_sge, is_llqp);
625                 if (HAS_RQ(my_qp))
626                         ehca_determine_small_queue(
627                                 &parms.rqueue, max_recv_sge, is_llqp);
628                 parms.qp_storage =
629                         (parms.squeue.is_small || parms.rqueue.is_small);
630         }
631
632         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
633         if (h_ret != H_SUCCESS) {
634                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%li",
635                          h_ret);
636                 ret = ehca2ib_return_code(h_ret);
637                 goto create_qp_exit1;
638         }
639
640         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
641         my_qp->ipz_qp_handle = parms.qp_handle;
642         my_qp->galpas = parms.galpas;
643
644         swqe_size = ehca_calc_wqe_size(parms.squeue.act_nr_sges, is_llqp);
645         rwqe_size = ehca_calc_wqe_size(parms.rqueue.act_nr_sges, is_llqp);
646
647         switch (qp_type) {
648         case IB_QPT_RC:
649                 if (is_llqp) {
650                         parms.squeue.act_nr_sges = 1;
651                         parms.rqueue.act_nr_sges = 1;
652                 }
653                 break;
654         case IB_QPT_UD:
655         case IB_QPT_GSI:
656         case IB_QPT_SMI:
657                 /* UD circumvention */
658                 if (is_llqp) {
659                         parms.squeue.act_nr_sges = 1;
660                         parms.rqueue.act_nr_sges = 1;
661                 } else {
662                         parms.squeue.act_nr_sges -= 2;
663                         parms.rqueue.act_nr_sges -= 2;
664                 }
665
666                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
667                         parms.squeue.act_nr_wqes = init_attr->cap.max_send_wr;
668                         parms.rqueue.act_nr_wqes = init_attr->cap.max_recv_wr;
669                         parms.squeue.act_nr_sges = init_attr->cap.max_send_sge;
670                         parms.rqueue.act_nr_sges = init_attr->cap.max_recv_sge;
671                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
672                 }
673
674                 break;
675
676         default:
677                 break;
678         }
679
680         /* initialize r/squeue and register queue pages */
681         if (HAS_SQ(my_qp)) {
682                 ret = init_qp_queue(
683                         shca, my_pd, my_qp, &my_qp->ipz_squeue, 0,
684                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
685                         &parms.squeue, swqe_size);
686                 if (ret) {
687                         ehca_err(pd->device, "Couldn't initialize squeue "
688                                  "and pages ret=%i", ret);
689                         goto create_qp_exit2;
690                 }
691         }
692
693         if (HAS_RQ(my_qp)) {
694                 ret = init_qp_queue(
695                         shca, my_pd, my_qp, &my_qp->ipz_rqueue, 1,
696                         H_SUCCESS, &parms.rqueue, rwqe_size);
697                 if (ret) {
698                         ehca_err(pd->device, "Couldn't initialize rqueue "
699                                  "and pages ret=%i", ret);
700                         goto create_qp_exit3;
701                 }
702         }
703
704         if (is_srq) {
705                 my_qp->ib_srq.pd = &my_pd->ib_pd;
706                 my_qp->ib_srq.device = my_pd->ib_pd.device;
707
708                 my_qp->ib_srq.srq_context = init_attr->qp_context;
709                 my_qp->ib_srq.event_handler = init_attr->event_handler;
710         } else {
711                 my_qp->ib_qp.qp_num = ib_qp_num;
712                 my_qp->ib_qp.pd = &my_pd->ib_pd;
713                 my_qp->ib_qp.device = my_pd->ib_pd.device;
714
715                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
716                 my_qp->ib_qp.send_cq = init_attr->send_cq;
717
718                 my_qp->ib_qp.qp_type = qp_type;
719                 my_qp->ib_qp.srq = init_attr->srq;
720
721                 my_qp->ib_qp.qp_context = init_attr->qp_context;
722                 my_qp->ib_qp.event_handler = init_attr->event_handler;
723         }
724
725         init_attr->cap.max_inline_data = 0; /* not supported yet */
726         init_attr->cap.max_recv_sge = parms.rqueue.act_nr_sges;
727         init_attr->cap.max_recv_wr = parms.rqueue.act_nr_wqes;
728         init_attr->cap.max_send_sge = parms.squeue.act_nr_sges;
729         init_attr->cap.max_send_wr = parms.squeue.act_nr_wqes;
730         my_qp->init_attr = *init_attr;
731
732         if (qp_type == IB_QPT_SMI || qp_type == IB_QPT_GSI) {
733                 shca->sport[init_attr->port_num - 1].ibqp_sqp[qp_type] =
734                         &my_qp->ib_qp;
735                 if (ehca_nr_ports < 0) {
736                         /* alloc array to cache subsequent modify qp parms
737                          * for autodetect mode
738                          */
739                         my_qp->mod_qp_parm =
740                                 kzalloc(EHCA_MOD_QP_PARM_MAX *
741                                         sizeof(*my_qp->mod_qp_parm),
742                                         GFP_KERNEL);
743                         if (!my_qp->mod_qp_parm) {
744                                 ehca_err(pd->device,
745                                          "Could not alloc mod_qp_parm");
746                                 goto create_qp_exit4;
747                         }
748                 }
749         }
750
751         /* NOTE: define_apq0() not supported yet */
752         if (qp_type == IB_QPT_GSI) {
753                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
754                 if (h_ret != H_SUCCESS) {
755                         ret = ehca2ib_return_code(h_ret);
756                         goto create_qp_exit5;
757                 }
758         }
759
760         if (my_qp->send_cq) {
761                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
762                 if (ret) {
763                         ehca_err(pd->device,
764                                  "Couldn't assign qp to send_cq ret=%i", ret);
765                         goto create_qp_exit5;
766                 }
767         }
768
769         /* copy queues, galpa data to user space */
770         if (context && udata) {
771                 struct ehca_create_qp_resp resp;
772                 memset(&resp, 0, sizeof(resp));
773
774                 resp.qp_num = my_qp->real_qp_num;
775                 resp.token = my_qp->token;
776                 resp.qp_type = my_qp->qp_type;
777                 resp.ext_type = my_qp->ext_type;
778                 resp.qkey = my_qp->qkey;
779                 resp.real_qp_num = my_qp->real_qp_num;
780
781                 if (HAS_SQ(my_qp))
782                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
783                 if (HAS_RQ(my_qp))
784                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
785                 resp.fw_handle_ofs = (u32)
786                         (my_qp->galpas.user.fw_handle & (PAGE_SIZE - 1));
787
788                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
789                         ehca_err(pd->device, "Copy to udata failed");
790                         ret = -EINVAL;
791                         goto create_qp_exit6;
792                 }
793         }
794
795         return my_qp;
796
797 create_qp_exit6:
798         ehca_cq_unassign_qp(my_qp->send_cq, my_qp->real_qp_num);
799
800 create_qp_exit5:
801         kfree(my_qp->mod_qp_parm);
802
803 create_qp_exit4:
804         if (HAS_RQ(my_qp))
805                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
806
807 create_qp_exit3:
808         if (HAS_SQ(my_qp))
809                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
810
811 create_qp_exit2:
812         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
813
814 create_qp_exit1:
815         write_lock_irqsave(&ehca_qp_idr_lock, flags);
816         idr_remove(&ehca_qp_idr, my_qp->token);
817         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
818
819 create_qp_exit0:
820         kmem_cache_free(qp_cache, my_qp);
821         return ERR_PTR(ret);
822 }
823
824 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
825                              struct ib_qp_init_attr *qp_init_attr,
826                              struct ib_udata *udata)
827 {
828         struct ehca_qp *ret;
829
830         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
831         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
832 }
833
834 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
835                                struct ib_uobject *uobject);
836
837 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
838                                struct ib_srq_init_attr *srq_init_attr,
839                                struct ib_udata *udata)
840 {
841         struct ib_qp_init_attr qp_init_attr;
842         struct ehca_qp *my_qp;
843         struct ib_srq *ret;
844         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
845                                               ib_device);
846         struct hcp_modify_qp_control_block *mqpcb;
847         u64 hret, update_mask;
848
849         /* For common attributes, internal_create_qp() takes its info
850          * out of qp_init_attr, so copy all common attrs there.
851          */
852         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
853         qp_init_attr.event_handler = srq_init_attr->event_handler;
854         qp_init_attr.qp_context = srq_init_attr->srq_context;
855         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
856         qp_init_attr.qp_type = IB_QPT_RC;
857         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
858         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
859
860         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
861         if (IS_ERR(my_qp))
862                 return (struct ib_srq *)my_qp;
863
864         /* copy back return values */
865         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
866         srq_init_attr->attr.max_sge = 3;
867
868         /* drive SRQ into RTR state */
869         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
870         if (!mqpcb) {
871                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
872                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
873                 ret = ERR_PTR(-ENOMEM);
874                 goto create_srq1;
875         }
876
877         mqpcb->qp_state = EHCA_QPS_INIT;
878         mqpcb->prim_phys_port = 1;
879         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
880         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
881                                 my_qp->ipz_qp_handle,
882                                 &my_qp->pf,
883                                 update_mask,
884                                 mqpcb, my_qp->galpas.kernel);
885         if (hret != H_SUCCESS) {
886                 ehca_err(pd->device, "Could not modify SRQ to INIT "
887                          "ehca_qp=%p qp_num=%x h_ret=%li",
888                          my_qp, my_qp->real_qp_num, hret);
889                 goto create_srq2;
890         }
891
892         mqpcb->qp_enable = 1;
893         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
894         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
895                                 my_qp->ipz_qp_handle,
896                                 &my_qp->pf,
897                                 update_mask,
898                                 mqpcb, my_qp->galpas.kernel);
899         if (hret != H_SUCCESS) {
900                 ehca_err(pd->device, "Could not enable SRQ "
901                          "ehca_qp=%p qp_num=%x h_ret=%li",
902                          my_qp, my_qp->real_qp_num, hret);
903                 goto create_srq2;
904         }
905
906         mqpcb->qp_state  = EHCA_QPS_RTR;
907         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
908         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
909                                 my_qp->ipz_qp_handle,
910                                 &my_qp->pf,
911                                 update_mask,
912                                 mqpcb, my_qp->galpas.kernel);
913         if (hret != H_SUCCESS) {
914                 ehca_err(pd->device, "Could not modify SRQ to RTR "
915                          "ehca_qp=%p qp_num=%x h_ret=%li",
916                          my_qp, my_qp->real_qp_num, hret);
917                 goto create_srq2;
918         }
919
920         ehca_free_fw_ctrlblock(mqpcb);
921
922         return &my_qp->ib_srq;
923
924 create_srq2:
925         ret = ERR_PTR(ehca2ib_return_code(hret));
926         ehca_free_fw_ctrlblock(mqpcb);
927
928 create_srq1:
929         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
930
931         return ret;
932 }
933
934 /*
935  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
936  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
937  * returns total number of bad wqes in bad_wqe_cnt
938  */
939 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
940                            int *bad_wqe_cnt)
941 {
942         u64 h_ret;
943         struct ipz_queue *squeue;
944         void *bad_send_wqe_p, *bad_send_wqe_v;
945         u64 q_ofs;
946         struct ehca_wqe *wqe;
947         int qp_num = my_qp->ib_qp.qp_num;
948
949         /* get send wqe pointer */
950         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
951                                            my_qp->ipz_qp_handle, &my_qp->pf,
952                                            &bad_send_wqe_p, NULL, 2);
953         if (h_ret != H_SUCCESS) {
954                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
955                          " ehca_qp=%p qp_num=%x h_ret=%li",
956                          my_qp, qp_num, h_ret);
957                 return ehca2ib_return_code(h_ret);
958         }
959         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
960         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
961                  qp_num, bad_send_wqe_p);
962         /* convert wqe pointer to vadr */
963         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
964         if (ehca_debug_level)
965                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
966         squeue = &my_qp->ipz_squeue;
967         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
968                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
969                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
970                 return -EFAULT;
971         }
972
973         /* loop sets wqe's purge bit */
974         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
975         *bad_wqe_cnt = 0;
976         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
977                 if (ehca_debug_level)
978                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
979                 wqe->nr_of_data_seg = 0; /* suppress data access */
980                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
981                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
982                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
983                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
984         }
985         /*
986          * bad wqe will be reprocessed and ignored when pol_cq() is called,
987          *  i.e. nr of wqes with flush error status is one less
988          */
989         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
990                  qp_num, (*bad_wqe_cnt)-1);
991         wqe->wqef = 0;
992
993         return 0;
994 }
995
996 /*
997  * internal_modify_qp with circumvention to handle aqp0 properly
998  * smi_reset2init indicates if this is an internal reset-to-init-call for
999  * smi. This flag must always be zero if called from ehca_modify_qp()!
1000  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
1001  */
1002 static int internal_modify_qp(struct ib_qp *ibqp,
1003                               struct ib_qp_attr *attr,
1004                               int attr_mask, int smi_reset2init)
1005 {
1006         enum ib_qp_state qp_cur_state, qp_new_state;
1007         int cnt, qp_attr_idx, ret = 0;
1008         enum ib_qp_statetrans statetrans;
1009         struct hcp_modify_qp_control_block *mqpcb;
1010         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1011         struct ehca_shca *shca =
1012                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
1013         u64 update_mask;
1014         u64 h_ret;
1015         int bad_wqe_cnt = 0;
1016         int squeue_locked = 0;
1017         unsigned long flags = 0;
1018
1019         /* do query_qp to obtain current attr values */
1020         mqpcb = ehca_alloc_fw_ctrlblock(GFP_ATOMIC);
1021         if (!mqpcb) {
1022                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
1023                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
1024                 return -ENOMEM;
1025         }
1026
1027         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
1028                                 my_qp->ipz_qp_handle,
1029                                 &my_qp->pf,
1030                                 mqpcb, my_qp->galpas.kernel);
1031         if (h_ret != H_SUCCESS) {
1032                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
1033                          "ehca_qp=%p qp_num=%x h_ret=%li",
1034                          my_qp, ibqp->qp_num, h_ret);
1035                 ret = ehca2ib_return_code(h_ret);
1036                 goto modify_qp_exit1;
1037         }
1038
1039         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
1040
1041         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
1042                 ret = -EINVAL;
1043                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
1044                          "ehca_qp=%p qp_num=%x",
1045                          mqpcb->qp_state, my_qp, ibqp->qp_num);
1046                 goto modify_qp_exit1;
1047         }
1048         /*
1049          * circumvention to set aqp0 initial state to init
1050          * as expected by IB spec
1051          */
1052         if (smi_reset2init == 0 &&
1053             ibqp->qp_type == IB_QPT_SMI &&
1054             qp_cur_state == IB_QPS_RESET &&
1055             (attr_mask & IB_QP_STATE) &&
1056             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
1057                 struct ib_qp_attr smiqp_attr = {
1058                         .qp_state = IB_QPS_INIT,
1059                         .port_num = my_qp->init_attr.port_num,
1060                         .pkey_index = 0,
1061                         .qkey = 0
1062                 };
1063                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
1064                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
1065                 int smirc = internal_modify_qp(
1066                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
1067                 if (smirc) {
1068                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
1069                                  "ehca_modify_qp() rc=%i", smirc);
1070                         ret = H_PARAMETER;
1071                         goto modify_qp_exit1;
1072                 }
1073                 qp_cur_state = IB_QPS_INIT;
1074                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
1075         }
1076         /* is transmitted current state  equal to "real" current state */
1077         if ((attr_mask & IB_QP_CUR_STATE) &&
1078             qp_cur_state != attr->cur_qp_state) {
1079                 ret = -EINVAL;
1080                 ehca_err(ibqp->device,
1081                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1082                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1083                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1084                 goto modify_qp_exit1;
1085         }
1086
1087         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1088                  "new qp_state=%x attribute_mask=%x",
1089                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1090
1091         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1092         if (!smi_reset2init &&
1093             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1094                                 attr_mask)) {
1095                 ret = -EINVAL;
1096                 ehca_err(ibqp->device,
1097                          "Invalid qp transition new_state=%x cur_state=%x "
1098                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1099                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1100                 goto modify_qp_exit1;
1101         }
1102
1103         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1104         if (mqpcb->qp_state)
1105                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1106         else {
1107                 ret = -EINVAL;
1108                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1109                          "ehca_qp=%p qp_num=%x",
1110                          qp_new_state, my_qp, ibqp->qp_num);
1111                 goto modify_qp_exit1;
1112         }
1113
1114         /* retrieve state transition struct to get req and opt attrs */
1115         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1116         if (statetrans < 0) {
1117                 ret = -EINVAL;
1118                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1119                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1120                          "qp_num=%x", qp_cur_state, qp_new_state,
1121                          statetrans, my_qp, ibqp->qp_num);
1122                 goto modify_qp_exit1;
1123         }
1124
1125         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1126
1127         if (qp_attr_idx < 0) {
1128                 ret = qp_attr_idx;
1129                 ehca_err(ibqp->device,
1130                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1131                          ibqp->qp_type, my_qp, ibqp->qp_num);
1132                 goto modify_qp_exit1;
1133         }
1134
1135         ehca_dbg(ibqp->device,
1136                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1137                  my_qp, ibqp->qp_num, statetrans);
1138
1139         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1140          * in non-LL UD QPs.
1141          */
1142         if ((my_qp->qp_type == IB_QPT_UD) &&
1143             (my_qp->ext_type != EQPT_LLQP) &&
1144             (statetrans == IB_QPST_INIT2RTR) &&
1145             (shca->hw_level >= 0x22)) {
1146                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1147                 mqpcb->send_grh_flag = 1;
1148         }
1149
1150         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1151         if ((my_qp->qp_type == IB_QPT_UD ||
1152              my_qp->qp_type == IB_QPT_GSI ||
1153              my_qp->qp_type == IB_QPT_SMI) &&
1154             statetrans == IB_QPST_SQE2RTS) {
1155                 /* mark next free wqe if kernel */
1156                 if (!ibqp->uobject) {
1157                         struct ehca_wqe *wqe;
1158                         /* lock send queue */
1159                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1160                         squeue_locked = 1;
1161                         /* mark next free wqe */
1162                         wqe = (struct ehca_wqe *)
1163                                 ipz_qeit_get(&my_qp->ipz_squeue);
1164                         wqe->optype = wqe->wqef = 0xff;
1165                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1166                                  ibqp->qp_num, wqe);
1167                 }
1168                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1169                 if (ret) {
1170                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1171                                  "ehca_qp=%p qp_num=%x ret=%i",
1172                                  my_qp, ibqp->qp_num, ret);
1173                         goto modify_qp_exit2;
1174                 }
1175         }
1176
1177         /*
1178          * enable RDMA_Atomic_Control if reset->init und reliable con
1179          * this is necessary since gen2 does not provide that flag,
1180          * but pHyp requires it
1181          */
1182         if (statetrans == IB_QPST_RESET2INIT &&
1183             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1184                 mqpcb->rdma_atomic_ctrl = 3;
1185                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1186         }
1187         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1188         if (statetrans == IB_QPST_INIT2RTR &&
1189             (ibqp->qp_type == IB_QPT_UC) &&
1190             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1191                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1192                 update_mask |=
1193                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1194         }
1195
1196         if (attr_mask & IB_QP_PKEY_INDEX) {
1197                 if (attr->pkey_index >= 16) {
1198                         ret = -EINVAL;
1199                         ehca_err(ibqp->device, "Invalid pkey_index=%x. "
1200                                  "ehca_qp=%p qp_num=%x max_pkey_index=f",
1201                                  attr->pkey_index, my_qp, ibqp->qp_num);
1202                         goto modify_qp_exit2;
1203                 }
1204                 mqpcb->prim_p_key_idx = attr->pkey_index;
1205                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1206         }
1207         if (attr_mask & IB_QP_PORT) {
1208                 struct ehca_sport *sport;
1209                 struct ehca_qp *aqp1;
1210                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1211                         ret = -EINVAL;
1212                         ehca_err(ibqp->device, "Invalid port=%x. "
1213                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1214                                  attr->port_num, my_qp, ibqp->qp_num,
1215                                  shca->num_ports);
1216                         goto modify_qp_exit2;
1217                 }
1218                 sport = &shca->sport[attr->port_num - 1];
1219                 if (!sport->ibqp_sqp[IB_QPT_GSI]) {
1220                         /* should not occur */
1221                         ret = -EFAULT;
1222                         ehca_err(ibqp->device, "AQP1 was not created for "
1223                                  "port=%x", attr->port_num);
1224                         goto modify_qp_exit2;
1225                 }
1226                 aqp1 = container_of(sport->ibqp_sqp[IB_QPT_GSI],
1227                                     struct ehca_qp, ib_qp);
1228                 if (ibqp->qp_type != IB_QPT_GSI &&
1229                     ibqp->qp_type != IB_QPT_SMI &&
1230                     aqp1->mod_qp_parm) {
1231                         /*
1232                          * firmware will reject this modify_qp() because
1233                          * port is not activated/initialized fully
1234                          */
1235                         ret = -EFAULT;
1236                         ehca_warn(ibqp->device, "Couldn't modify qp port=%x: "
1237                                   "either port is being activated (try again) "
1238                                   "or cabling issue", attr->port_num);
1239                         goto modify_qp_exit2;
1240                 }
1241                 mqpcb->prim_phys_port = attr->port_num;
1242                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1243         }
1244         if (attr_mask & IB_QP_QKEY) {
1245                 mqpcb->qkey = attr->qkey;
1246                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1247         }
1248         if (attr_mask & IB_QP_AV) {
1249                 mqpcb->dlid = attr->ah_attr.dlid;
1250                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1251                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1252                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1253                 mqpcb->service_level = attr->ah_attr.sl;
1254                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1255
1256                 if (ehca_calc_ipd(shca, mqpcb->prim_phys_port,
1257                                   attr->ah_attr.static_rate,
1258                                   &mqpcb->max_static_rate)) {
1259                         ret = -EINVAL;
1260                         goto modify_qp_exit2;
1261                 }
1262                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1263
1264                 /*
1265                  * Always supply the GRH flag, even if it's zero, to give the
1266                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1267                  */
1268                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1269
1270                 /*
1271                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1272                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1273                  */
1274                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1275                         mqpcb->send_grh_flag = 1;
1276
1277                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1278                         update_mask |=
1279                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1280
1281                         for (cnt = 0; cnt < 16; cnt++)
1282                                 mqpcb->dest_gid.byte[cnt] =
1283                                         attr->ah_attr.grh.dgid.raw[cnt];
1284
1285                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1286                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1287                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1288                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1289                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1290                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1291                         update_mask |=
1292                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1293                 }
1294         }
1295
1296         if (attr_mask & IB_QP_PATH_MTU) {
1297                 mqpcb->path_mtu = attr->path_mtu;
1298                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1299         }
1300         if (attr_mask & IB_QP_TIMEOUT) {
1301                 mqpcb->timeout = attr->timeout;
1302                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1303         }
1304         if (attr_mask & IB_QP_RETRY_CNT) {
1305                 mqpcb->retry_count = attr->retry_cnt;
1306                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1307         }
1308         if (attr_mask & IB_QP_RNR_RETRY) {
1309                 mqpcb->rnr_retry_count = attr->rnr_retry;
1310                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1311         }
1312         if (attr_mask & IB_QP_RQ_PSN) {
1313                 mqpcb->receive_psn = attr->rq_psn;
1314                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1315         }
1316         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1317                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1318                         attr->max_dest_rd_atomic : 2;
1319                 update_mask |=
1320                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1321         }
1322         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1323                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1324                         attr->max_rd_atomic : 2;
1325                 update_mask |=
1326                         EHCA_BMASK_SET
1327                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1328         }
1329         if (attr_mask & IB_QP_ALT_PATH) {
1330                 if (attr->alt_port_num < 1
1331                     || attr->alt_port_num > shca->num_ports) {
1332                         ret = -EINVAL;
1333                         ehca_err(ibqp->device, "Invalid alt_port=%x. "
1334                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1335                                  attr->alt_port_num, my_qp, ibqp->qp_num,
1336                                  shca->num_ports);
1337                         goto modify_qp_exit2;
1338                 }
1339                 mqpcb->alt_phys_port = attr->alt_port_num;
1340
1341                 if (attr->alt_pkey_index >= 16) {
1342                         ret = -EINVAL;
1343                         ehca_err(ibqp->device, "Invalid alt_pkey_index=%x. "
1344                                  "ehca_qp=%p qp_num=%x max_pkey_index=f",
1345                                  attr->pkey_index, my_qp, ibqp->qp_num);
1346                         goto modify_qp_exit2;
1347                 }
1348                 mqpcb->alt_p_key_idx = attr->alt_pkey_index;
1349
1350                 mqpcb->timeout_al = attr->alt_timeout;
1351                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1352                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1353                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1354
1355                 if (ehca_calc_ipd(shca, mqpcb->alt_phys_port,
1356                                   attr->alt_ah_attr.static_rate,
1357                                   &mqpcb->max_static_rate_al)) {
1358                         ret = -EINVAL;
1359                         goto modify_qp_exit2;
1360                 }
1361
1362                 /* OpenIB doesn't support alternate retry counts - copy them */
1363                 mqpcb->retry_count_al = mqpcb->retry_count;
1364                 mqpcb->rnr_retry_count_al = mqpcb->rnr_retry_count;
1365
1366                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_ALT_PHYS_PORT, 1)
1367                         | EHCA_BMASK_SET(MQPCB_MASK_ALT_P_KEY_IDX, 1)
1368                         | EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT_AL, 1)
1369                         | EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1)
1370                         | EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1)
1371                         | EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1)
1372                         | EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1)
1373                         | EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT_AL, 1)
1374                         | EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT_AL, 1);
1375
1376                 /*
1377                  * Always supply the GRH flag, even if it's zero, to give the
1378                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1379                  */
1380                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1381
1382                 /*
1383                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1384                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1385                  */
1386                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1387                         mqpcb->send_grh_flag_al = 1;
1388
1389                         for (cnt = 0; cnt < 16; cnt++)
1390                                 mqpcb->dest_gid_al.byte[cnt] =
1391                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1392                         mqpcb->source_gid_idx_al =
1393                                 attr->alt_ah_attr.grh.sgid_index;
1394                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1395                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1396                         mqpcb->traffic_class_al =
1397                                 attr->alt_ah_attr.grh.traffic_class;
1398
1399                         update_mask |=
1400                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1)
1401                                 | EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1)
1402                                 | EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1)
1403                                 | EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1) |
1404                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1405                 }
1406         }
1407
1408         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1409                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1410                 update_mask |=
1411                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1412         }
1413
1414         if (attr_mask & IB_QP_SQ_PSN) {
1415                 mqpcb->send_psn = attr->sq_psn;
1416                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1417         }
1418
1419         if (attr_mask & IB_QP_DEST_QPN) {
1420                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1421                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1422         }
1423
1424         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1425                 if (attr->path_mig_state != IB_MIG_REARM
1426                     && attr->path_mig_state != IB_MIG_MIGRATED) {
1427                         ret = -EINVAL;
1428                         ehca_err(ibqp->device, "Invalid mig_state=%x",
1429                                  attr->path_mig_state);
1430                         goto modify_qp_exit2;
1431                 }
1432                 mqpcb->path_migration_state = attr->path_mig_state + 1;
1433                 update_mask |=
1434                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1435         }
1436
1437         if (attr_mask & IB_QP_CAP) {
1438                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1439                 update_mask |=
1440                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1441                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1442                 update_mask |=
1443                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1444                 /* no support for max_send/recv_sge yet */
1445         }
1446
1447         if (ehca_debug_level)
1448                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1449
1450         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1451                                  my_qp->ipz_qp_handle,
1452                                  &my_qp->pf,
1453                                  update_mask,
1454                                  mqpcb, my_qp->galpas.kernel);
1455
1456         if (h_ret != H_SUCCESS) {
1457                 ret = ehca2ib_return_code(h_ret);
1458                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed h_ret=%li "
1459                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1460                 goto modify_qp_exit2;
1461         }
1462
1463         if ((my_qp->qp_type == IB_QPT_UD ||
1464              my_qp->qp_type == IB_QPT_GSI ||
1465              my_qp->qp_type == IB_QPT_SMI) &&
1466             statetrans == IB_QPST_SQE2RTS) {
1467                 /* doorbell to reprocessing wqes */
1468                 iosync(); /* serialize GAL register access */
1469                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1470                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1471         }
1472
1473         if (statetrans == IB_QPST_RESET2INIT ||
1474             statetrans == IB_QPST_INIT2INIT) {
1475                 mqpcb->qp_enable = 1;
1476                 mqpcb->qp_state = EHCA_QPS_INIT;
1477                 update_mask = 0;
1478                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1479
1480                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1481                                          my_qp->ipz_qp_handle,
1482                                          &my_qp->pf,
1483                                          update_mask,
1484                                          mqpcb,
1485                                          my_qp->galpas.kernel);
1486
1487                 if (h_ret != H_SUCCESS) {
1488                         ret = ehca2ib_return_code(h_ret);
1489                         ehca_err(ibqp->device, "ENABLE in context of "
1490                                  "RESET_2_INIT failed! Maybe you didn't get "
1491                                  "a LID h_ret=%li ehca_qp=%p qp_num=%x",
1492                                  h_ret, my_qp, ibqp->qp_num);
1493                         goto modify_qp_exit2;
1494                 }
1495         }
1496
1497         if (statetrans == IB_QPST_ANY2RESET) {
1498                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1499                 ipz_qeit_reset(&my_qp->ipz_squeue);
1500         }
1501
1502         if (attr_mask & IB_QP_QKEY)
1503                 my_qp->qkey = attr->qkey;
1504
1505 modify_qp_exit2:
1506         if (squeue_locked) { /* this means: sqe -> rts */
1507                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1508                 my_qp->sqerr_purgeflag = 1;
1509         }
1510
1511 modify_qp_exit1:
1512         ehca_free_fw_ctrlblock(mqpcb);
1513
1514         return ret;
1515 }
1516
1517 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1518                    struct ib_udata *udata)
1519 {
1520         struct ehca_shca *shca = container_of(ibqp->device, struct ehca_shca,
1521                                               ib_device);
1522         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1523         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1524                                              ib_pd);
1525         u32 cur_pid = current->tgid;
1526
1527         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1528             my_pd->ownpid != cur_pid) {
1529                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1530                          cur_pid, my_pd->ownpid);
1531                 return -EINVAL;
1532         }
1533
1534         /* The if-block below caches qp_attr to be modified for GSI and SMI
1535          * qps during the initialization by ib_mad. When the respective port
1536          * is activated, ie we got an event PORT_ACTIVE, we'll replay the
1537          * cached modify calls sequence, see ehca_recover_sqs() below.
1538          * Why that is required:
1539          * 1) If one port is connected, older code requires that port one
1540          *    to be connected and module option nr_ports=1 to be given by
1541          *    user, which is very inconvenient for end user.
1542          * 2) Firmware accepts modify_qp() only if respective port has become
1543          *    active. Older code had a wait loop of 30sec create_qp()/
1544          *    define_aqp1(), which is not appropriate in practice. This
1545          *    code now removes that wait loop, see define_aqp1(), and always
1546          *    reports all ports to ib_mad resp. users. Only activated ports
1547          *    will then usable for the users.
1548          */
1549         if (ibqp->qp_type == IB_QPT_GSI || ibqp->qp_type == IB_QPT_SMI) {
1550                 int port = my_qp->init_attr.port_num;
1551                 struct ehca_sport *sport = &shca->sport[port - 1];
1552                 unsigned long flags;
1553                 spin_lock_irqsave(&sport->mod_sqp_lock, flags);
1554                 /* cache qp_attr only during init */
1555                 if (my_qp->mod_qp_parm) {
1556                         struct ehca_mod_qp_parm *p;
1557                         if (my_qp->mod_qp_parm_idx >= EHCA_MOD_QP_PARM_MAX) {
1558                                 ehca_err(&shca->ib_device,
1559                                          "mod_qp_parm overflow state=%x port=%x"
1560                                          " type=%x", attr->qp_state,
1561                                          my_qp->init_attr.port_num,
1562                                          ibqp->qp_type);
1563                                 spin_unlock_irqrestore(&sport->mod_sqp_lock,
1564                                                        flags);
1565                                 return -EINVAL;
1566                         }
1567                         p = &my_qp->mod_qp_parm[my_qp->mod_qp_parm_idx];
1568                         p->mask = attr_mask;
1569                         p->attr = *attr;
1570                         my_qp->mod_qp_parm_idx++;
1571                         ehca_dbg(&shca->ib_device,
1572                                  "Saved qp_attr for state=%x port=%x type=%x",
1573                                  attr->qp_state, my_qp->init_attr.port_num,
1574                                  ibqp->qp_type);
1575                         spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
1576                         return 0;
1577                 }
1578                 spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
1579         }
1580
1581         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1582 }
1583
1584 void ehca_recover_sqp(struct ib_qp *sqp)
1585 {
1586         struct ehca_qp *my_sqp = container_of(sqp, struct ehca_qp, ib_qp);
1587         int port = my_sqp->init_attr.port_num;
1588         struct ib_qp_attr attr;
1589         struct ehca_mod_qp_parm *qp_parm;
1590         int i, qp_parm_idx, ret;
1591         unsigned long flags, wr_cnt;
1592
1593         if (!my_sqp->mod_qp_parm)
1594                 return;
1595         ehca_dbg(sqp->device, "SQP port=%x qp_num=%x", port, sqp->qp_num);
1596
1597         qp_parm = my_sqp->mod_qp_parm;
1598         qp_parm_idx = my_sqp->mod_qp_parm_idx;
1599         for (i = 0; i < qp_parm_idx; i++) {
1600                 attr = qp_parm[i].attr;
1601                 ret = internal_modify_qp(sqp, &attr, qp_parm[i].mask, 0);
1602                 if (ret) {
1603                         ehca_err(sqp->device, "Could not modify SQP port=%x "
1604                                  "qp_num=%x ret=%x", port, sqp->qp_num, ret);
1605                         goto free_qp_parm;
1606                 }
1607                 ehca_dbg(sqp->device, "SQP port=%x qp_num=%x in state=%x",
1608                          port, sqp->qp_num, attr.qp_state);
1609         }
1610
1611         /* re-trigger posted recv wrs */
1612         wr_cnt =  my_sqp->ipz_rqueue.current_q_offset /
1613                 my_sqp->ipz_rqueue.qe_size;
1614         if (wr_cnt) {
1615                 spin_lock_irqsave(&my_sqp->spinlock_r, flags);
1616                 hipz_update_rqa(my_sqp, wr_cnt);
1617                 spin_unlock_irqrestore(&my_sqp->spinlock_r, flags);
1618                 ehca_dbg(sqp->device, "doorbell port=%x qp_num=%x wr_cnt=%lx",
1619                          port, sqp->qp_num, wr_cnt);
1620         }
1621
1622 free_qp_parm:
1623         kfree(qp_parm);
1624         /* this prevents subsequent calls to modify_qp() to cache qp_attr */
1625         my_sqp->mod_qp_parm = NULL;
1626 }
1627
1628 int ehca_query_qp(struct ib_qp *qp,
1629                   struct ib_qp_attr *qp_attr,
1630                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1631 {
1632         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1633         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1634                                              ib_pd);
1635         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1636                                               ib_device);
1637         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1638         struct hcp_modify_qp_control_block *qpcb;
1639         u32 cur_pid = current->tgid;
1640         int cnt, ret = 0;
1641         u64 h_ret;
1642
1643         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1644             my_pd->ownpid != cur_pid) {
1645                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1646                          cur_pid, my_pd->ownpid);
1647                 return -EINVAL;
1648         }
1649
1650         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1651                 ehca_err(qp->device, "Invalid attribute mask "
1652                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1653                          my_qp, qp->qp_num, qp_attr_mask);
1654                 return -EINVAL;
1655         }
1656
1657         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1658         if (!qpcb) {
1659                 ehca_err(qp->device, "Out of memory for qpcb "
1660                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1661                 return -ENOMEM;
1662         }
1663
1664         h_ret = hipz_h_query_qp(adapter_handle,
1665                                 my_qp->ipz_qp_handle,
1666                                 &my_qp->pf,
1667                                 qpcb, my_qp->galpas.kernel);
1668
1669         if (h_ret != H_SUCCESS) {
1670                 ret = ehca2ib_return_code(h_ret);
1671                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1672                          "ehca_qp=%p qp_num=%x h_ret=%li",
1673                          my_qp, qp->qp_num, h_ret);
1674                 goto query_qp_exit1;
1675         }
1676
1677         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1678         qp_attr->qp_state = qp_attr->cur_qp_state;
1679
1680         if (qp_attr->cur_qp_state == -EINVAL) {
1681                 ret = -EINVAL;
1682                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1683                          "ehca_qp=%p qp_num=%x",
1684                          qpcb->qp_state, my_qp, qp->qp_num);
1685                 goto query_qp_exit1;
1686         }
1687
1688         if (qp_attr->qp_state == IB_QPS_SQD)
1689                 qp_attr->sq_draining = 1;
1690
1691         qp_attr->qkey = qpcb->qkey;
1692         qp_attr->path_mtu = qpcb->path_mtu;
1693         qp_attr->path_mig_state = qpcb->path_migration_state - 1;
1694         qp_attr->rq_psn = qpcb->receive_psn;
1695         qp_attr->sq_psn = qpcb->send_psn;
1696         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1697         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1698         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1699         /* UD_AV CIRCUMVENTION */
1700         if (my_qp->qp_type == IB_QPT_UD) {
1701                 qp_attr->cap.max_send_sge =
1702                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1703                 qp_attr->cap.max_recv_sge =
1704                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1705         } else {
1706                 qp_attr->cap.max_send_sge =
1707                         qpcb->actual_nr_sges_in_sq_wqe;
1708                 qp_attr->cap.max_recv_sge =
1709                         qpcb->actual_nr_sges_in_rq_wqe;
1710         }
1711
1712         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1713         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1714
1715         qp_attr->pkey_index =
1716                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1717
1718         qp_attr->port_num =
1719                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1720
1721         qp_attr->timeout = qpcb->timeout;
1722         qp_attr->retry_cnt = qpcb->retry_count;
1723         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1724
1725         qp_attr->alt_pkey_index =
1726                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1727
1728         qp_attr->alt_port_num = qpcb->alt_phys_port;
1729         qp_attr->alt_timeout = qpcb->timeout_al;
1730
1731         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1732         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1733
1734         /* primary av */
1735         qp_attr->ah_attr.sl = qpcb->service_level;
1736
1737         if (qpcb->send_grh_flag) {
1738                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1739         }
1740
1741         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1742         qp_attr->ah_attr.dlid = qpcb->dlid;
1743         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1744         qp_attr->ah_attr.port_num = qp_attr->port_num;
1745
1746         /* primary GRH */
1747         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1748         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1749         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1750         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1751
1752         for (cnt = 0; cnt < 16; cnt++)
1753                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1754                         qpcb->dest_gid.byte[cnt];
1755
1756         /* alternate AV */
1757         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1758         if (qpcb->send_grh_flag_al) {
1759                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1760         }
1761
1762         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1763         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1764         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1765
1766         /* alternate GRH */
1767         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1768         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1769         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1770         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1771
1772         for (cnt = 0; cnt < 16; cnt++)
1773                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1774                         qpcb->dest_gid_al.byte[cnt];
1775
1776         /* return init attributes given in ehca_create_qp */
1777         if (qp_init_attr)
1778                 *qp_init_attr = my_qp->init_attr;
1779
1780         if (ehca_debug_level)
1781                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1782
1783 query_qp_exit1:
1784         ehca_free_fw_ctrlblock(qpcb);
1785
1786         return ret;
1787 }
1788
1789 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1790                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1791 {
1792         struct ehca_qp *my_qp =
1793                 container_of(ibsrq, struct ehca_qp, ib_srq);
1794         struct ehca_pd *my_pd =
1795                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1796         struct ehca_shca *shca =
1797                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1798         struct hcp_modify_qp_control_block *mqpcb;
1799         u64 update_mask;
1800         u64 h_ret;
1801         int ret = 0;
1802
1803         u32 cur_pid = current->tgid;
1804         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1805             my_pd->ownpid != cur_pid) {
1806                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1807                          cur_pid, my_pd->ownpid);
1808                 return -EINVAL;
1809         }
1810
1811         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1812         if (!mqpcb) {
1813                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1814                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1815                 return -ENOMEM;
1816         }
1817
1818         update_mask = 0;
1819         if (attr_mask & IB_SRQ_LIMIT) {
1820                 attr_mask &= ~IB_SRQ_LIMIT;
1821                 update_mask |=
1822                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1823                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1824                 mqpcb->curr_srq_limit =
1825                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1826                 mqpcb->qp_aff_asyn_ev_log_reg =
1827                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1828         }
1829
1830         /* by now, all bits in attr_mask should have been cleared */
1831         if (attr_mask) {
1832                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1833                          "attr_mask=%x", attr_mask);
1834                 ret = -EINVAL;
1835                 goto modify_srq_exit0;
1836         }
1837
1838         if (ehca_debug_level)
1839                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1840
1841         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1842                                  NULL, update_mask, mqpcb,
1843                                  my_qp->galpas.kernel);
1844
1845         if (h_ret != H_SUCCESS) {
1846                 ret = ehca2ib_return_code(h_ret);
1847                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed h_ret=%li "
1848                          "ehca_qp=%p qp_num=%x",
1849                          h_ret, my_qp, my_qp->real_qp_num);
1850         }
1851
1852 modify_srq_exit0:
1853         ehca_free_fw_ctrlblock(mqpcb);
1854
1855         return ret;
1856 }
1857
1858 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1859 {
1860         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1861         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1862         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1863                                               ib_device);
1864         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1865         struct hcp_modify_qp_control_block *qpcb;
1866         u32 cur_pid = current->tgid;
1867         int ret = 0;
1868         u64 h_ret;
1869
1870         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1871             my_pd->ownpid != cur_pid) {
1872                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1873                          cur_pid, my_pd->ownpid);
1874                 return -EINVAL;
1875         }
1876
1877         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1878         if (!qpcb) {
1879                 ehca_err(srq->device, "Out of memory for qpcb "
1880                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1881                 return -ENOMEM;
1882         }
1883
1884         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1885                                 NULL, qpcb, my_qp->galpas.kernel);
1886
1887         if (h_ret != H_SUCCESS) {
1888                 ret = ehca2ib_return_code(h_ret);
1889                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1890                          "ehca_qp=%p qp_num=%x h_ret=%li",
1891                          my_qp, my_qp->real_qp_num, h_ret);
1892                 goto query_srq_exit1;
1893         }
1894
1895         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1896         srq_attr->max_sge = 3;
1897         srq_attr->srq_limit = EHCA_BMASK_GET(
1898                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1899
1900         if (ehca_debug_level)
1901                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1902
1903 query_srq_exit1:
1904         ehca_free_fw_ctrlblock(qpcb);
1905
1906         return ret;
1907 }
1908
1909 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1910                                struct ib_uobject *uobject)
1911 {
1912         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1913         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1914                                              ib_pd);
1915         struct ehca_sport *sport = &shca->sport[my_qp->init_attr.port_num - 1];
1916         u32 cur_pid = current->tgid;
1917         u32 qp_num = my_qp->real_qp_num;
1918         int ret;
1919         u64 h_ret;
1920         u8 port_num;
1921         enum ib_qp_type qp_type;
1922         unsigned long flags;
1923
1924         if (uobject) {
1925                 if (my_qp->mm_count_galpa ||
1926                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1927                         ehca_err(dev, "Resources still referenced in "
1928                                  "user space qp_num=%x", qp_num);
1929                         return -EINVAL;
1930                 }
1931                 if (my_pd->ownpid != cur_pid) {
1932                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1933                                  cur_pid, my_pd->ownpid);
1934                         return -EINVAL;
1935                 }
1936         }
1937
1938         if (my_qp->send_cq) {
1939                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1940                 if (ret) {
1941                         ehca_err(dev, "Couldn't unassign qp from "
1942                                  "send_cq ret=%i qp_num=%x cq_num=%x", ret,
1943                                  qp_num, my_qp->send_cq->cq_number);
1944                         return ret;
1945                 }
1946         }
1947
1948         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1949         idr_remove(&ehca_qp_idr, my_qp->token);
1950         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1951
1952         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1953         if (h_ret != H_SUCCESS) {
1954                 ehca_err(dev, "hipz_h_destroy_qp() failed h_ret=%li "
1955                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1956                 return ehca2ib_return_code(h_ret);
1957         }
1958
1959         port_num = my_qp->init_attr.port_num;
1960         qp_type  = my_qp->init_attr.qp_type;
1961
1962         if (qp_type == IB_QPT_SMI || qp_type == IB_QPT_GSI) {
1963                 spin_lock_irqsave(&sport->mod_sqp_lock, flags);
1964                 kfree(my_qp->mod_qp_parm);
1965                 my_qp->mod_qp_parm = NULL;
1966                 shca->sport[port_num - 1].ibqp_sqp[qp_type] = NULL;
1967                 spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
1968         }
1969
1970         /* no support for IB_QPT_SMI yet */
1971         if (qp_type == IB_QPT_GSI) {
1972                 struct ib_event event;
1973                 ehca_info(dev, "device %s: port %x is inactive.",
1974                           shca->ib_device.name, port_num);
1975                 event.device = &shca->ib_device;
1976                 event.event = IB_EVENT_PORT_ERR;
1977                 event.element.port_num = port_num;
1978                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1979                 ib_dispatch_event(&event);
1980         }
1981
1982         if (HAS_RQ(my_qp))
1983                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
1984         if (HAS_SQ(my_qp))
1985                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
1986         kmem_cache_free(qp_cache, my_qp);
1987         return 0;
1988 }
1989
1990 int ehca_destroy_qp(struct ib_qp *qp)
1991 {
1992         return internal_destroy_qp(qp->device,
1993                                    container_of(qp, struct ehca_qp, ib_qp),
1994                                    qp->uobject);
1995 }
1996
1997 int ehca_destroy_srq(struct ib_srq *srq)
1998 {
1999         return internal_destroy_qp(srq->device,
2000                                    container_of(srq, struct ehca_qp, ib_srq),
2001                                    srq->uobject);
2002 }
2003
2004 int ehca_init_qp_cache(void)
2005 {
2006         qp_cache = kmem_cache_create("ehca_cache_qp",
2007                                      sizeof(struct ehca_qp), 0,
2008                                      SLAB_HWCACHE_ALIGN,
2009                                      NULL);
2010         if (!qp_cache)
2011                 return -ENOMEM;
2012         return 0;
2013 }
2014
2015 void ehca_cleanup_qp_cache(void)
2016 {
2017         if (qp_cache)
2018                 kmem_cache_destroy(qp_cache);
2019 }