drivers/infiniband/hw/i40iw/i40iw_verbs.c

   1 /*******************************************************************************
   2 *
   3 * Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
   4 *
   5 * This software is available to you under a choice of one of two
   6 * licenses.  You may choose to be licensed under the terms of the GNU
   7 * General Public License (GPL) Version 2, available from the file
   8 * COPYING in the main directory of this source tree, or the
   9 * OpenFabrics.org BSD license below:
  10 *
  11 *   Redistribution and use in source and binary forms, with or
  12 *   without modification, are permitted provided that the following
  13 *   conditions are met:
  14 *
  15 *    - Redistributions of source code must retain the above
  16 *       copyright notice, this list of conditions and the following
  17 *       disclaimer.
  18 *
  19 *    - Redistributions in binary form must reproduce the above
  20 *       copyright notice, this list of conditions and the following
  21 *       disclaimer in the documentation and/or other materials
  22 *       provided with the distribution.
  23 *
  24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31 * SOFTWARE.
  32 *
  33 *******************************************************************************/
  34
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/random.h>
  38 #include <linux/highmem.h>
  39 #include <linux/time.h>
  40 #include <linux/hugetlb.h>
  41 #include <asm/byteorder.h>
  42 #include <net/ip.h>
  43 #include <rdma/ib_verbs.h>
  44 #include <rdma/iw_cm.h>
  45 #include <rdma/ib_user_verbs.h>
  46 #include <rdma/ib_umem.h>
  47 #include "i40iw.h"
  48
  49 /**
  50  * i40iw_query_device - get device attributes
  51  * @ibdev: device pointer from stack
  52  * @props: returning device attributes
  53  * @udata: user data
  54  */
  55 static int i40iw_query_device(struct ib_device *ibdev,
  56                               struct ib_device_attr *props,
  57                               struct ib_udata *udata)
  58 {
  59         struct i40iw_device *iwdev = to_iwdev(ibdev);
  60
  61         if (udata->inlen || udata->outlen)
  62                 return -EINVAL;
  63         memset(props, 0, sizeof(*props));
  64         ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
  65         props->fw_ver = I40IW_FW_VERSION;
  66         props->device_cap_flags = iwdev->device_cap_flags;
  67         props->vendor_id = iwdev->ldev->pcidev->vendor;
  68         props->vendor_part_id = iwdev->ldev->pcidev->device;
  69         props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
  70         props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
  71         props->max_qp = iwdev->max_qp - iwdev->used_qps;
  72         props->max_qp_wr = (I40IW_MAX_WQ_ENTRIES >> 2) - 1;
  73         props->max_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  74         props->max_cq = iwdev->max_cq - iwdev->used_cqs;
  75         props->max_cqe = iwdev->max_cqe;
  76         props->max_mr = iwdev->max_mr - iwdev->used_mrs;
  77         props->max_pd = iwdev->max_pd - iwdev->used_pds;
  78         props->max_sge_rd = I40IW_MAX_SGE_RD;
  79         props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
  80         props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  81         props->atomic_cap = IB_ATOMIC_NONE;
  82         props->max_map_per_fmr = 1;
  83         props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
  84         return 0;
  85 }
  86
  87 /**
  88  * i40iw_query_port - get port attrubutes
  89  * @ibdev: device pointer from stack
  90  * @port: port number for query
  91  * @props: returning device attributes
  92  */
  93 static int i40iw_query_port(struct ib_device *ibdev,
  94                             u8 port,
  95                             struct ib_port_attr *props)
  96 {
  97         struct i40iw_device *iwdev = to_iwdev(ibdev);
  98         struct net_device *netdev = iwdev->netdev;
  99
 100         memset(props, 0, sizeof(*props));
 101
 102         props->max_mtu = IB_MTU_4096;
 103         if (netdev->mtu >= 4096)
 104                 props->active_mtu = IB_MTU_4096;
 105         else if (netdev->mtu >= 2048)
 106                 props->active_mtu = IB_MTU_2048;
 107         else if (netdev->mtu >= 1024)
 108                 props->active_mtu = IB_MTU_1024;
 109         else if (netdev->mtu >= 512)
 110                 props->active_mtu = IB_MTU_512;
 111         else
 112                 props->active_mtu = IB_MTU_256;
 113
 114         props->lid = 1;
 115         if (netif_carrier_ok(iwdev->netdev))
 116                 props->state = IB_PORT_ACTIVE;
 117         else
 118                 props->state = IB_PORT_DOWN;
 119         props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 120                 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
 121         props->gid_tbl_len = 1;
 122         props->pkey_tbl_len = 1;
 123         props->active_width = IB_WIDTH_4X;
 124         props->active_speed = 1;
 125         props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
 126         return 0;
 127 }
 128
 129 /**
 130  * i40iw_alloc_ucontext - Allocate the user context data structure
 131  * @ibdev: device pointer from stack
 132  * @udata: user data
 133  *
 134  * This keeps track of all objects associated with a particular
 135  * user-mode client.
 136  */
 137 static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
 138                                                 struct ib_udata *udata)
 139 {
 140         struct i40iw_device *iwdev = to_iwdev(ibdev);
 141         struct i40iw_alloc_ucontext_req req;
 142         struct i40iw_alloc_ucontext_resp uresp;
 143         struct i40iw_ucontext *ucontext;
 144
 145         if (ib_copy_from_udata(&req, udata, sizeof(req)))
 146                 return ERR_PTR(-EINVAL);
 147
 148         if (req.userspace_ver < 4 || req.userspace_ver > I40IW_ABI_VER) {
 149                 i40iw_pr_err("Unsupported provider library version %u.\n", req.userspace_ver);
 150                 return ERR_PTR(-EINVAL);
 151         }
 152
 153         memset(&uresp, 0, sizeof(uresp));
 154         uresp.max_qps = iwdev->max_qp;
 155         uresp.max_pds = iwdev->max_pd;
 156         uresp.wq_size = iwdev->max_qp_wr * 2;
 157         uresp.kernel_ver = req.userspace_ver;
 158
 159         ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
 160         if (!ucontext)
 161                 return ERR_PTR(-ENOMEM);
 162
 163         ucontext->iwdev = iwdev;
 164         ucontext->abi_ver = req.userspace_ver;
 165
 166         if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 167                 kfree(ucontext);
 168                 return ERR_PTR(-EFAULT);
 169         }
 170
 171         INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
 172         spin_lock_init(&ucontext->cq_reg_mem_list_lock);
 173         INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
 174         spin_lock_init(&ucontext->qp_reg_mem_list_lock);
 175
 176         return &ucontext->ibucontext;
 177 }
 178
 179 /**
 180  * i40iw_dealloc_ucontext - deallocate the user context data structure
 181  * @context: user context created during alloc
 182  */
 183 static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
 184 {
 185         struct i40iw_ucontext *ucontext = to_ucontext(context);
 186         unsigned long flags;
 187
 188         spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
 189         if (!list_empty(&ucontext->cq_reg_mem_list)) {
 190                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 191                 return -EBUSY;
 192         }
 193         spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 194         spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
 195         if (!list_empty(&ucontext->qp_reg_mem_list)) {
 196                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 197                 return -EBUSY;
 198         }
 199         spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 200
 201         kfree(ucontext);
 202         return 0;
 203 }
 204
 205 /**
 206  * i40iw_mmap - user memory map
 207  * @context: context created during alloc
 208  * @vma: kernel info for user memory map
 209  */
 210 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
 211 {
 212         struct i40iw_ucontext *ucontext;
 213         u64 db_addr_offset;
 214         u64 push_offset;
 215
 216         ucontext = to_ucontext(context);
 217         if (ucontext->iwdev->sc_dev.is_pf) {
 218                 db_addr_offset = I40IW_DB_ADDR_OFFSET;
 219                 push_offset = I40IW_PUSH_OFFSET;
 220                 if (vma->vm_pgoff)
 221                         vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
 222         } else {
 223                 db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
 224                 push_offset = I40IW_VF_PUSH_OFFSET;
 225                 if (vma->vm_pgoff)
 226                         vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
 227         }
 228
 229         vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
 230
 231         if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
 232                 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 233                 vma->vm_private_data = ucontext;
 234         } else {
 235                 if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
 236                         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 237                 else
 238                         vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 239         }
 240
 241         if (io_remap_pfn_range(vma, vma->vm_start,
 242                                vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT),
 243                                PAGE_SIZE, vma->vm_page_prot))
 244                 return -EAGAIN;
 245
 246         return 0;
 247 }
 248
 249 /**
 250  * i40iw_alloc_push_page - allocate a push page for qp
 251  * @iwdev: iwarp device
 252  * @qp: hardware control qp
 253  */
 254 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 255 {
 256         struct i40iw_cqp_request *cqp_request;
 257         struct cqp_commands_info *cqp_info;
 258         enum i40iw_status_code status;
 259
 260         if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
 261                 return;
 262
 263         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
 264         if (!cqp_request)
 265                 return;
 266
 267         atomic_inc(&cqp_request->refcount);
 268
 269         cqp_info = &cqp_request->info;
 270         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 271         cqp_info->post_sq = 1;
 272
 273         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 274         cqp_info->in.u.manage_push_page.info.free_page = 0;
 275         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 276         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 277
 278         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 279         if (!status)
 280                 qp->push_idx = cqp_request->compl_info.op_ret_val;
 281         else
 282                 i40iw_pr_err("CQP-OP Push page fail");
 283         i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
 284 }
 285
 286 /**
 287  * i40iw_dealloc_push_page - free a push page for qp
 288  * @iwdev: iwarp device
 289  * @qp: hardware control qp
 290  */
 291 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 292 {
 293         struct i40iw_cqp_request *cqp_request;
 294         struct cqp_commands_info *cqp_info;
 295         enum i40iw_status_code status;
 296
 297         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
 298                 return;
 299
 300         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
 301         if (!cqp_request)
 302                 return;
 303
 304         cqp_info = &cqp_request->info;
 305         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 306         cqp_info->post_sq = 1;
 307
 308         cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
 309         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 310         cqp_info->in.u.manage_push_page.info.free_page = 1;
 311         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 312         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 313
 314         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 315         if (!status)
 316                 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 317         else
 318                 i40iw_pr_err("CQP-OP Push page fail");
 319 }
 320
 321 /**
 322  * i40iw_alloc_pd - allocate protection domain
 323  * @ibdev: device pointer from stack
 324  * @context: user context created during alloc
 325  * @udata: user data
 326  */
 327 static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
 328                                     struct ib_ucontext *context,
 329                                     struct ib_udata *udata)
 330 {
 331         struct i40iw_pd *iwpd;
 332         struct i40iw_device *iwdev = to_iwdev(ibdev);
 333         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 334         struct i40iw_alloc_pd_resp uresp;
 335         struct i40iw_sc_pd *sc_pd;
 336         struct i40iw_ucontext *ucontext;
 337         u32 pd_id = 0;
 338         int err;
 339
 340         if (iwdev->closing)
 341                 return ERR_PTR(-ENODEV);
 342
 343         err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
 344                                    iwdev->max_pd, &pd_id, &iwdev->next_pd);
 345         if (err) {
 346                 i40iw_pr_err("alloc resource failed\n");
 347                 return ERR_PTR(err);
 348         }
 349
 350         iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
 351         if (!iwpd) {
 352                 err = -ENOMEM;
 353                 goto free_res;
 354         }
 355
 356         sc_pd = &iwpd->sc_pd;
 357
 358         if (context) {
 359                 ucontext = to_ucontext(context);
 360                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
 361                 memset(&uresp, 0, sizeof(uresp));
 362                 uresp.pd_id = pd_id;
 363                 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 364                         err = -EFAULT;
 365                         goto error;
 366                 }
 367         } else {
 368                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, -1);
 369         }
 370
 371         i40iw_add_pdusecount(iwpd);
 372         return &iwpd->ibpd;
 373 error:
 374         kfree(iwpd);
 375 free_res:
 376         i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
 377         return ERR_PTR(err);
 378 }
 379
 380 /**
 381  * i40iw_dealloc_pd - deallocate pd
 382  * @ibpd: ptr of pd to be deallocated
 383  */
 384 static int i40iw_dealloc_pd(struct ib_pd *ibpd)
 385 {
 386         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 387         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 388
 389         i40iw_rem_pdusecount(iwpd, iwdev);
 390         return 0;
 391 }
 392
 393 /**
 394  * i40iw_qp_roundup - return round up qp ring size
 395  * @wr_ring_size: ring size to round up
 396  */
 397 static int i40iw_qp_roundup(u32 wr_ring_size)
 398 {
 399         int scount = 1;
 400
 401         if (wr_ring_size < I40IWQP_SW_MIN_WQSIZE)
 402                 wr_ring_size = I40IWQP_SW_MIN_WQSIZE;
 403
 404         for (wr_ring_size--; scount <= 16; scount *= 2)
 405                 wr_ring_size |= wr_ring_size >> scount;
 406         return ++wr_ring_size;
 407 }
 408
 409 /**
 410  * i40iw_get_pbl - Retrieve pbl from a list given a virtual
 411  * address
 412  * @va: user virtual address
 413  * @pbl_list: pbl list to search in (QP's or CQ's)
 414  */
 415 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
 416                                        struct list_head *pbl_list)
 417 {
 418         struct i40iw_pbl *iwpbl;
 419
 420         list_for_each_entry(iwpbl, pbl_list, list) {
 421                 if (iwpbl->user_base == va) {
 422                         list_del(&iwpbl->list);
 423                         return iwpbl;
 424                 }
 425         }
 426         return NULL;
 427 }
 428
 429 /**
 430  * i40iw_free_qp_resources - free up memory resources for qp
 431  * @iwdev: iwarp device
 432  * @iwqp: qp ptr (user or kernel)
 433  * @qp_num: qp number assigned
 434  */
 435 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
 436                              struct i40iw_qp *iwqp,
 437                              u32 qp_num)
 438 {
 439         i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
 440         if (qp_num)
 441                 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
 442         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
 443         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
 444         kfree(iwqp->kqp.wrid_mem);
 445         iwqp->kqp.wrid_mem = NULL;
 446         kfree(iwqp->allocated_buffer);
 447 }
 448
 449 /**
 450  * i40iw_clean_cqes - clean cq entries for qp
 451  * @iwqp: qp ptr (user or kernel)
 452  * @iwcq: cq ptr
 453  */
 454 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
 455 {
 456         struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
 457
 458         ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
 459 }
 460
 461 /**
 462  * i40iw_destroy_qp - destroy qp
 463  * @ibqp: qp's ib pointer also to get to device's qp address
 464  */
 465 static int i40iw_destroy_qp(struct ib_qp *ibqp)
 466 {
 467         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 468
 469         iwqp->destroyed = 1;
 470
 471         if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
 472                 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
 473
 474         if (!iwqp->user_mode) {
 475                 if (iwqp->iwscq) {
 476                         i40iw_clean_cqes(iwqp, iwqp->iwscq);
 477                         if (iwqp->iwrcq != iwqp->iwscq)
 478                                 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
 479                 }
 480         }
 481
 482         i40iw_rem_ref(&iwqp->ibqp);
 483         return 0;
 484 }
 485
 486 /**
 487  * i40iw_setup_virt_qp - setup for allocation of virtual qp
 488  * @dev: iwarp device
 489  * @qp: qp ptr
 490  * @init_info: initialize info to return
 491  */
 492 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
 493                                struct i40iw_qp *iwqp,
 494                                struct i40iw_qp_init_info *init_info)
 495 {
 496         struct i40iw_pbl *iwpbl = iwqp->iwpbl;
 497         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
 498
 499         iwqp->page = qpmr->sq_page;
 500         init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
 501         if (iwpbl->pbl_allocated) {
 502                 init_info->virtual_map = true;
 503                 init_info->sq_pa = qpmr->sq_pbl.idx;
 504                 init_info->rq_pa = qpmr->rq_pbl.idx;
 505         } else {
 506                 init_info->sq_pa = qpmr->sq_pbl.addr;
 507                 init_info->rq_pa = qpmr->rq_pbl.addr;
 508         }
 509         return 0;
 510 }
 511
 512 /**
 513  * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
 514  * @iwdev: iwarp device
 515  * @iwqp: qp ptr (user or kernel)
 516  * @info: initialize info to return
 517  */
 518 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
 519                                 struct i40iw_qp *iwqp,
 520                                 struct i40iw_qp_init_info *info)
 521 {
 522         struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
 523         u32 sqdepth, rqdepth;
 524         u32 sq_size, rq_size;
 525         u8 sqshift;
 526         u32 size;
 527         enum i40iw_status_code status;
 528         struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 529
 530         sq_size = i40iw_qp_roundup(ukinfo->sq_size + 1);
 531         rq_size = i40iw_qp_roundup(ukinfo->rq_size + 1);
 532
 533         status = i40iw_get_wqe_shift(sq_size, ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
 534         if (status)
 535                 return -ENOMEM;
 536
 537         sqdepth = sq_size << sqshift;
 538         rqdepth = rq_size << I40IW_MAX_RQ_WQE_SHIFT;
 539
 540         size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
 541         iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
 542
 543         ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
 544         if (!ukinfo->sq_wrtrk_array)
 545                 return -ENOMEM;
 546
 547         ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
 548
 549         size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
 550         size += (I40IW_SHADOW_AREA_SIZE << 3);
 551
 552         status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
 553         if (status) {
 554                 kfree(ukinfo->sq_wrtrk_array);
 555                 ukinfo->sq_wrtrk_array = NULL;
 556                 return -ENOMEM;
 557         }
 558
 559         ukinfo->sq = mem->va;
 560         info->sq_pa = mem->pa;
 561
 562         ukinfo->rq = &ukinfo->sq[sqdepth];
 563         info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
 564
 565         ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
 566         info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
 567
 568         ukinfo->sq_size = sq_size;
 569         ukinfo->rq_size = rq_size;
 570         ukinfo->qp_id = iwqp->ibqp.qp_num;
 571         return 0;
 572 }
 573
 574 /**
 575  * i40iw_create_qp - create qp
 576  * @ibpd: ptr of pd
 577  * @init_attr: attributes for qp
 578  * @udata: user data for create qp
 579  */
 580 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
 581                                      struct ib_qp_init_attr *init_attr,
 582                                      struct ib_udata *udata)
 583 {
 584         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 585         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 586         struct i40iw_cqp *iwcqp = &iwdev->cqp;
 587         struct i40iw_qp *iwqp;
 588         struct i40iw_ucontext *ucontext;
 589         struct i40iw_create_qp_req req;
 590         struct i40iw_create_qp_resp uresp;
 591         u32 qp_num = 0;
 592         void *mem;
 593         enum i40iw_status_code ret;
 594         int err_code;
 595         int sq_size;
 596         int rq_size;
 597         struct i40iw_sc_qp *qp;
 598         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 599         struct i40iw_qp_init_info init_info;
 600         struct i40iw_create_qp_info *qp_info;
 601         struct i40iw_cqp_request *cqp_request;
 602         struct cqp_commands_info *cqp_info;
 603
 604         struct i40iw_qp_host_ctx_info *ctx_info;
 605         struct i40iwarp_offload_info *iwarp_info;
 606         unsigned long flags;
 607
 608         if (iwdev->closing)
 609                 return ERR_PTR(-ENODEV);
 610
 611         if (init_attr->create_flags)
 612                 return ERR_PTR(-EINVAL);
 613         if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
 614                 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 615
 616         if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 617                 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 618
 619         if (init_attr->cap.max_recv_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 620                 init_attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 621
 622         memset(&init_info, 0, sizeof(init_info));
 623
 624         sq_size = init_attr->cap.max_send_wr;
 625         rq_size = init_attr->cap.max_recv_wr;
 626
 627         init_info.vsi = &iwdev->vsi;
 628         init_info.qp_uk_init_info.sq_size = sq_size;
 629         init_info.qp_uk_init_info.rq_size = rq_size;
 630         init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
 631         init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
 632         init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
 633
 634         mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
 635         if (!mem)
 636                 return ERR_PTR(-ENOMEM);
 637
 638         iwqp = (struct i40iw_qp *)mem;
 639         qp = &iwqp->sc_qp;
 640         qp->back_qp = (void *)iwqp;
 641         qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 642
 643         iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
 644
 645         if (i40iw_allocate_dma_mem(dev->hw,
 646                                    &iwqp->q2_ctx_mem,
 647                                    I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
 648                                    256)) {
 649                 i40iw_pr_err("dma_mem failed\n");
 650                 err_code = -ENOMEM;
 651                 goto error;
 652         }
 653
 654         init_info.q2 = iwqp->q2_ctx_mem.va;
 655         init_info.q2_pa = iwqp->q2_ctx_mem.pa;
 656
 657         init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
 658         init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
 659
 660         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
 661                                         &qp_num, &iwdev->next_qp);
 662         if (err_code) {
 663                 i40iw_pr_err("qp resource\n");
 664                 goto error;
 665         }
 666
 667         iwqp->allocated_buffer = mem;
 668         iwqp->iwdev = iwdev;
 669         iwqp->iwpd = iwpd;
 670         iwqp->ibqp.qp_num = qp_num;
 671         qp = &iwqp->sc_qp;
 672         iwqp->iwscq = to_iwcq(init_attr->send_cq);
 673         iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
 674
 675         iwqp->host_ctx.va = init_info.host_ctx;
 676         iwqp->host_ctx.pa = init_info.host_ctx_pa;
 677         iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
 678
 679         init_info.pd = &iwpd->sc_pd;
 680         init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
 681         iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
 682
 683         if (init_attr->qp_type != IB_QPT_RC) {
 684                 err_code = -EINVAL;
 685                 goto error;
 686         }
 687         if (iwdev->push_mode)
 688                 i40iw_alloc_push_page(iwdev, qp);
 689         if (udata) {
 690                 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
 691                 if (err_code) {
 692                         i40iw_pr_err("ib_copy_from_data\n");
 693                         goto error;
 694                 }
 695                 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
 696                 if (ibpd->uobject && ibpd->uobject->context) {
 697                         iwqp->user_mode = 1;
 698                         ucontext = to_ucontext(ibpd->uobject->context);
 699
 700                         if (req.user_wqe_buffers) {
 701                                 spin_lock_irqsave(
 702                                     &ucontext->qp_reg_mem_list_lock, flags);
 703                                 iwqp->iwpbl = i40iw_get_pbl(
 704                                     (unsigned long)req.user_wqe_buffers,
 705                                     &ucontext->qp_reg_mem_list);
 706                                 spin_unlock_irqrestore(
 707                                     &ucontext->qp_reg_mem_list_lock, flags);
 708
 709                                 if (!iwqp->iwpbl) {
 710                                         err_code = -ENODATA;
 711                                         i40iw_pr_err("no pbl info\n");
 712                                         goto error;
 713                                 }
 714                         }
 715                 }
 716                 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
 717         } else {
 718                 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
 719         }
 720
 721         if (err_code) {
 722                 i40iw_pr_err("setup qp failed\n");
 723                 goto error;
 724         }
 725
 726         init_info.type = I40IW_QP_TYPE_IWARP;
 727         ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
 728         if (ret) {
 729                 err_code = -EPROTO;
 730                 i40iw_pr_err("qp_init fail\n");
 731                 goto error;
 732         }
 733         ctx_info = &iwqp->ctx_info;
 734         iwarp_info = &iwqp->iwarp_info;
 735         iwarp_info->rd_enable = true;
 736         iwarp_info->wr_rdresp_en = true;
 737         if (!iwqp->user_mode) {
 738                 iwarp_info->fast_reg_en = true;
 739                 iwarp_info->priv_mode_en = true;
 740         }
 741         iwarp_info->ddp_ver = 1;
 742         iwarp_info->rdmap_ver = 1;
 743
 744         ctx_info->iwarp_info_valid = true;
 745         ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 746         ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 747         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
 748                 ctx_info->push_mode_en = false;
 749         } else {
 750                 ctx_info->push_mode_en = true;
 751                 ctx_info->push_idx = qp->push_idx;
 752         }
 753
 754         ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 755                                              (u64 *)iwqp->host_ctx.va,
 756                                              ctx_info);
 757         ctx_info->iwarp_info_valid = false;
 758         cqp_request = i40iw_get_cqp_request(iwcqp, true);
 759         if (!cqp_request) {
 760                 err_code = -ENOMEM;
 761                 goto error;
 762         }
 763         cqp_info = &cqp_request->info;
 764         qp_info = &cqp_request->info.in.u.qp_create.info;
 765
 766         memset(qp_info, 0, sizeof(*qp_info));
 767
 768         qp_info->cq_num_valid = true;
 769         qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
 770
 771         cqp_info->cqp_cmd = OP_QP_CREATE;
 772         cqp_info->post_sq = 1;
 773         cqp_info->in.u.qp_create.qp = qp;
 774         cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
 775         ret = i40iw_handle_cqp_op(iwdev, cqp_request);
 776         if (ret) {
 777                 i40iw_pr_err("CQP-OP QP create fail");
 778                 err_code = -EACCES;
 779                 goto error;
 780         }
 781
 782         i40iw_add_ref(&iwqp->ibqp);
 783         spin_lock_init(&iwqp->lock);
 784         iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
 785         iwdev->qp_table[qp_num] = iwqp;
 786         i40iw_add_pdusecount(iwqp->iwpd);
 787         i40iw_add_devusecount(iwdev);
 788         if (ibpd->uobject && udata) {
 789                 memset(&uresp, 0, sizeof(uresp));
 790                 uresp.actual_sq_size = sq_size;
 791                 uresp.actual_rq_size = rq_size;
 792                 uresp.qp_id = qp_num;
 793                 uresp.push_idx = qp->push_idx;
 794                 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
 795                 if (err_code) {
 796                         i40iw_pr_err("copy_to_udata failed\n");
 797                         i40iw_destroy_qp(&iwqp->ibqp);
 798                            /* let the completion of the qp destroy free the qp */
 799                         return ERR_PTR(err_code);
 800                 }
 801         }
 802         init_completion(&iwqp->sq_drained);
 803         init_completion(&iwqp->rq_drained);
 804
 805         return &iwqp->ibqp;
 806 error:
 807         i40iw_free_qp_resources(iwdev, iwqp, qp_num);
 808         return ERR_PTR(err_code);
 809 }
 810
 811 /**
 812  * i40iw_query - query qp attributes
 813  * @ibqp: qp pointer
 814  * @attr: attributes pointer
 815  * @attr_mask: Not used
 816  * @init_attr: qp attributes to return
 817  */
 818 static int i40iw_query_qp(struct ib_qp *ibqp,
 819                           struct ib_qp_attr *attr,
 820                           int attr_mask,
 821                           struct ib_qp_init_attr *init_attr)
 822 {
 823         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 824         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
 825
 826         attr->qp_access_flags = 0;
 827         attr->cap.max_send_wr = qp->qp_uk.sq_size;
 828         attr->cap.max_recv_wr = qp->qp_uk.rq_size;
 829         attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 830         attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 831         attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 832         init_attr->event_handler = iwqp->ibqp.event_handler;
 833         init_attr->qp_context = iwqp->ibqp.qp_context;
 834         init_attr->send_cq = iwqp->ibqp.send_cq;
 835         init_attr->recv_cq = iwqp->ibqp.recv_cq;
 836         init_attr->srq = iwqp->ibqp.srq;
 837         init_attr->cap = attr->cap;
 838         return 0;
 839 }
 840
 841 /**
 842  * i40iw_hw_modify_qp - setup cqp for modify qp
 843  * @iwdev: iwarp device
 844  * @iwqp: qp ptr (user or kernel)
 845  * @info: info for modify qp
 846  * @wait: flag to wait or not for modify qp completion
 847  */
 848 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
 849                         struct i40iw_modify_qp_info *info, bool wait)
 850 {
 851         enum i40iw_status_code status;
 852         struct i40iw_cqp_request *cqp_request;
 853         struct cqp_commands_info *cqp_info;
 854         struct i40iw_modify_qp_info *m_info;
 855
 856         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
 857         if (!cqp_request)
 858                 return;
 859
 860         cqp_info = &cqp_request->info;
 861         m_info = &cqp_info->in.u.qp_modify.info;
 862         memcpy(m_info, info, sizeof(*m_info));
 863         cqp_info->cqp_cmd = OP_QP_MODIFY;
 864         cqp_info->post_sq = 1;
 865         cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
 866         cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
 867         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 868         if (status)
 869                 i40iw_pr_err("CQP-OP Modify QP fail");
 870 }
 871
 872 /**
 873  * i40iw_modify_qp - modify qp request
 874  * @ibqp: qp's pointer for modify
 875  * @attr: access attributes
 876  * @attr_mask: state mask
 877  * @udata: user data
 878  */
 879 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 880                     int attr_mask, struct ib_udata *udata)
 881 {
 882         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 883         struct i40iw_device *iwdev = iwqp->iwdev;
 884         struct i40iw_qp_host_ctx_info *ctx_info;
 885         struct i40iwarp_offload_info *iwarp_info;
 886         struct i40iw_modify_qp_info info;
 887         u8 issue_modify_qp = 0;
 888         u8 dont_wait = 0;
 889         u32 err;
 890         unsigned long flags;
 891
 892         memset(&info, 0, sizeof(info));
 893         ctx_info = &iwqp->ctx_info;
 894         iwarp_info = &iwqp->iwarp_info;
 895
 896         spin_lock_irqsave(&iwqp->lock, flags);
 897
 898         if (attr_mask & IB_QP_STATE) {
 899                 if (iwdev->closing && attr->qp_state != IB_QPS_ERR) {
 900                         err = -EINVAL;
 901                         goto exit;
 902                 }
 903
 904                 switch (attr->qp_state) {
 905                 case IB_QPS_INIT:
 906                 case IB_QPS_RTR:
 907                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
 908                                 err = -EINVAL;
 909                                 goto exit;
 910                         }
 911                         if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
 912                                 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
 913                                 issue_modify_qp = 1;
 914                         }
 915                         break;
 916                 case IB_QPS_RTS:
 917                         if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
 918                             (!iwqp->cm_id)) {
 919                                 err = -EINVAL;
 920                                 goto exit;
 921                         }
 922
 923                         issue_modify_qp = 1;
 924                         iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
 925                         iwqp->hte_added = 1;
 926                         info.next_iwarp_state = I40IW_QP_STATE_RTS;
 927                         info.tcp_ctx_valid = true;
 928                         info.ord_valid = true;
 929                         info.arp_cache_idx_valid = true;
 930                         info.cq_num_valid = true;
 931                         break;
 932                 case IB_QPS_SQD:
 933                         if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
 934                                 err = 0;
 935                                 goto exit;
 936                         }
 937                         if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
 938                             (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
 939                                 err = 0;
 940                                 goto exit;
 941                         }
 942                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
 943                                 err = -EINVAL;
 944                                 goto exit;
 945                         }
 946                         info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
 947                         issue_modify_qp = 1;
 948                         break;
 949                 case IB_QPS_SQE:
 950                         if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
 951                                 err = -EINVAL;
 952                                 goto exit;
 953                         }
 954                         info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
 955                         issue_modify_qp = 1;
 956                         break;
 957                 case IB_QPS_ERR:
 958                 case IB_QPS_RESET:
 959                         if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
 960                                 err = -EINVAL;
 961                                 goto exit;
 962                         }
 963                         if (iwqp->sc_qp.term_flags)
 964                                 i40iw_terminate_del_timer(&iwqp->sc_qp);
 965                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 966                         if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
 967                             iwdev->iw_status &&
 968                             (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
 969                                 info.reset_tcp_conn = true;
 970                         else
 971                                 dont_wait = 1;
 972                         issue_modify_qp = 1;
 973                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 974                         break;
 975                 default:
 976                         err = -EINVAL;
 977                         goto exit;
 978                 }
 979
 980                 iwqp->ibqp_state = attr->qp_state;
 981
 982                 if (issue_modify_qp)
 983                         iwqp->iwarp_state = info.next_iwarp_state;
 984                 else
 985                         info.next_iwarp_state = iwqp->iwarp_state;
 986         }
 987         if (attr_mask & IB_QP_ACCESS_FLAGS) {
 988                 ctx_info->iwarp_info_valid = true;
 989                 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
 990                         iwarp_info->wr_rdresp_en = true;
 991                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
 992                         iwarp_info->wr_rdresp_en = true;
 993                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
 994                         iwarp_info->rd_enable = true;
 995                 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
 996                         iwarp_info->bind_en = true;
 997
 998                 if (iwqp->user_mode) {
 999                         iwarp_info->rd_enable = true;
1000                         iwarp_info->wr_rdresp_en = true;
1001                         iwarp_info->priv_mode_en = false;
1002                 }
1003         }
1004
1005         if (ctx_info->iwarp_info_valid) {
1006                 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1007                 int ret;
1008
1009                 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1010                 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1011                 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
1012                                                      (u64 *)iwqp->host_ctx.va,
1013                                                      ctx_info);
1014                 if (ret) {
1015                         i40iw_pr_err("setting QP context\n");
1016                         err = -EINVAL;
1017                         goto exit;
1018                 }
1019         }
1020
1021         spin_unlock_irqrestore(&iwqp->lock, flags);
1022
1023         if (issue_modify_qp)
1024                 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1025
1026         if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1027                 if (dont_wait) {
1028                         if (iwqp->cm_id && iwqp->hw_tcp_state) {
1029                                 spin_lock_irqsave(&iwqp->lock, flags);
1030                                 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1031                                 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1032                                 spin_unlock_irqrestore(&iwqp->lock, flags);
1033                         }
1034                 }
1035         }
1036         return 0;
1037 exit:
1038         spin_unlock_irqrestore(&iwqp->lock, flags);
1039         return err;
1040 }
1041
1042 /**
1043  * cq_free_resources - free up recources for cq
1044  * @iwdev: iwarp device
1045  * @iwcq: cq ptr
1046  */
1047 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1048 {
1049         struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1050
1051         if (!iwcq->user_mode)
1052                 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1053         i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1054 }
1055
1056 /**
1057  * i40iw_cq_wq_destroy - send cq destroy cqp
1058  * @iwdev: iwarp device
1059  * @cq: hardware control cq
1060  */
1061 void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1062 {
1063         enum i40iw_status_code status;
1064         struct i40iw_cqp_request *cqp_request;
1065         struct cqp_commands_info *cqp_info;
1066
1067         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1068         if (!cqp_request)
1069                 return;
1070
1071         cqp_info = &cqp_request->info;
1072
1073         cqp_info->cqp_cmd = OP_CQ_DESTROY;
1074         cqp_info->post_sq = 1;
1075         cqp_info->in.u.cq_destroy.cq = cq;
1076         cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1077         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1078         if (status)
1079                 i40iw_pr_err("CQP-OP Destroy QP fail");
1080 }
1081
1082 /**
1083  * i40iw_destroy_cq - destroy cq
1084  * @ib_cq: cq pointer
1085  */
1086 static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1087 {
1088         struct i40iw_cq *iwcq;
1089         struct i40iw_device *iwdev;
1090         struct i40iw_sc_cq *cq;
1091
1092         if (!ib_cq) {
1093                 i40iw_pr_err("ib_cq == NULL\n");
1094                 return 0;
1095         }
1096
1097         iwcq = to_iwcq(ib_cq);
1098         iwdev = to_iwdev(ib_cq->device);
1099         cq = &iwcq->sc_cq;
1100         i40iw_cq_wq_destroy(iwdev, cq);
1101         cq_free_resources(iwdev, iwcq);
1102         kfree(iwcq);
1103         i40iw_rem_devusecount(iwdev);
1104         return 0;
1105 }
1106
1107 /**
1108  * i40iw_create_cq - create cq
1109  * @ibdev: device pointer from stack
1110  * @attr: attributes for cq
1111  * @context: user context created during alloc
1112  * @udata: user data
1113  */
1114 static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1115                                      const struct ib_cq_init_attr *attr,
1116                                      struct ib_ucontext *context,
1117                                      struct ib_udata *udata)
1118 {
1119         struct i40iw_device *iwdev = to_iwdev(ibdev);
1120         struct i40iw_cq *iwcq;
1121         struct i40iw_pbl *iwpbl;
1122         u32 cq_num = 0;
1123         struct i40iw_sc_cq *cq;
1124         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1125         struct i40iw_cq_init_info info;
1126         enum i40iw_status_code status;
1127         struct i40iw_cqp_request *cqp_request;
1128         struct cqp_commands_info *cqp_info;
1129         struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1130         unsigned long flags;
1131         int err_code;
1132         int entries = attr->cqe;
1133
1134         if (iwdev->closing)
1135                 return ERR_PTR(-ENODEV);
1136
1137         if (entries > iwdev->max_cqe)
1138                 return ERR_PTR(-EINVAL);
1139
1140         iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1141         if (!iwcq)
1142                 return ERR_PTR(-ENOMEM);
1143
1144         memset(&info, 0, sizeof(info));
1145
1146         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1147                                         iwdev->max_cq, &cq_num,
1148                                         &iwdev->next_cq);
1149         if (err_code)
1150                 goto error;
1151
1152         cq = &iwcq->sc_cq;
1153         cq->back_cq = (void *)iwcq;
1154         spin_lock_init(&iwcq->lock);
1155
1156         info.dev = dev;
1157         ukinfo->cq_size = max(entries, 4);
1158         ukinfo->cq_id = cq_num;
1159         iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1160         info.ceqe_mask = 0;
1161         if (attr->comp_vector < iwdev->ceqs_count)
1162                 info.ceq_id = attr->comp_vector;
1163         info.ceq_id_valid = true;
1164         info.ceqe_mask = 1;
1165         info.type = I40IW_CQ_TYPE_IWARP;
1166         if (context) {
1167                 struct i40iw_ucontext *ucontext;
1168                 struct i40iw_create_cq_req req;
1169                 struct i40iw_cq_mr *cqmr;
1170
1171                 memset(&req, 0, sizeof(req));
1172                 iwcq->user_mode = true;
1173                 ucontext = to_ucontext(context);
1174                 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req)))
1175                         goto cq_free_resources;
1176
1177                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1178                 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1179                                       &ucontext->cq_reg_mem_list);
1180                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1181                 if (!iwpbl) {
1182                         err_code = -EPROTO;
1183                         goto cq_free_resources;
1184                 }
1185
1186                 iwcq->iwpbl = iwpbl;
1187                 iwcq->cq_mem_size = 0;
1188                 cqmr = &iwpbl->cq_mr;
1189                 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1190                 if (iwpbl->pbl_allocated) {
1191                         info.virtual_map = true;
1192                         info.pbl_chunk_size = 1;
1193                         info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1194                 } else {
1195                         info.cq_base_pa = cqmr->cq_pbl.addr;
1196                 }
1197         } else {
1198                 /* Kmode allocations */
1199                 int rsize;
1200                 int shadow;
1201
1202                 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1203                 rsize = round_up(rsize, 256);
1204                 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1205                 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1206                                                 rsize + shadow, 256);
1207                 if (status) {
1208                         err_code = -ENOMEM;
1209                         goto cq_free_resources;
1210                 }
1211                 ukinfo->cq_base = iwcq->kmem.va;
1212                 info.cq_base_pa = iwcq->kmem.pa;
1213                 info.shadow_area_pa = info.cq_base_pa + rsize;
1214                 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1215         }
1216
1217         if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1218                 i40iw_pr_err("init cq fail\n");
1219                 err_code = -EPROTO;
1220                 goto cq_free_resources;
1221         }
1222
1223         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1224         if (!cqp_request) {
1225                 err_code = -ENOMEM;
1226                 goto cq_free_resources;
1227         }
1228
1229         cqp_info = &cqp_request->info;
1230         cqp_info->cqp_cmd = OP_CQ_CREATE;
1231         cqp_info->post_sq = 1;
1232         cqp_info->in.u.cq_create.cq = cq;
1233         cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1234         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1235         if (status) {
1236                 i40iw_pr_err("CQP-OP Create QP fail");
1237                 err_code = -EPROTO;
1238                 goto cq_free_resources;
1239         }
1240
1241         if (context) {
1242                 struct i40iw_create_cq_resp resp;
1243
1244                 memset(&resp, 0, sizeof(resp));
1245                 resp.cq_id = info.cq_uk_init_info.cq_id;
1246                 resp.cq_size = info.cq_uk_init_info.cq_size;
1247                 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1248                         i40iw_pr_err("copy to user data\n");
1249                         err_code = -EPROTO;
1250                         goto cq_destroy;
1251                 }
1252         }
1253
1254         i40iw_add_devusecount(iwdev);
1255         return (struct ib_cq *)iwcq;
1256
1257 cq_destroy:
1258         i40iw_cq_wq_destroy(iwdev, cq);
1259 cq_free_resources:
1260         cq_free_resources(iwdev, iwcq);
1261 error:
1262         kfree(iwcq);
1263         return ERR_PTR(err_code);
1264 }
1265
1266 /**
1267  * i40iw_get_user_access - get hw access from IB access
1268  * @acc: IB access to return hw access
1269  */
1270 static inline u16 i40iw_get_user_access(int acc)
1271 {
1272         u16 access = 0;
1273
1274         access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1275         access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1276         access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1277         access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1278         return access;
1279 }
1280
1281 /**
1282  * i40iw_free_stag - free stag resource
1283  * @iwdev: iwarp device
1284  * @stag: stag to free
1285  */
1286 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1287 {
1288         u32 stag_idx;
1289
1290         stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1291         i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1292         i40iw_rem_devusecount(iwdev);
1293 }
1294
1295 /**
1296  * i40iw_create_stag - create random stag
1297  * @iwdev: iwarp device
1298  */
1299 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1300 {
1301         u32 stag = 0;
1302         u32 stag_index = 0;
1303         u32 next_stag_index;
1304         u32 driver_key;
1305         u32 random;
1306         u8 consumer_key;
1307         int ret;
1308
1309         get_random_bytes(&random, sizeof(random));
1310         consumer_key = (u8)random;
1311
1312         driver_key = random & ~iwdev->mr_stagmask;
1313         next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1314         next_stag_index %= iwdev->max_mr;
1315
1316         ret = i40iw_alloc_resource(iwdev,
1317                                    iwdev->allocated_mrs, iwdev->max_mr,
1318                                    &stag_index, &next_stag_index);
1319         if (!ret) {
1320                 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1321                 stag |= driver_key;
1322                 stag += (u32)consumer_key;
1323                 i40iw_add_devusecount(iwdev);
1324         }
1325         return stag;
1326 }
1327
1328 /**
1329  * i40iw_next_pbl_addr - Get next pbl address
1330  * @pbl: pointer to a pble
1331  * @pinfo: info pointer
1332  * @idx: index
1333  */
1334 static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
1335                                        struct i40iw_pble_info **pinfo,
1336                                        u32 *idx)
1337 {
1338         *idx += 1;
1339         if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1340                 return ++pbl;
1341         *idx = 0;
1342         (*pinfo)++;
1343         return (u64 *)(*pinfo)->addr;
1344 }
1345
1346 /**
1347  * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1348  * @iwmr: iwmr for IB's user page addresses
1349  * @pbl: ple pointer to save 1 level or 0 level pble
1350  * @level: indicated level 0, 1 or 2
1351  */
1352 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1353                                     u64 *pbl,
1354                                     enum i40iw_pble_level level)
1355 {
1356         struct ib_umem *region = iwmr->region;
1357         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1358         int chunk_pages, entry, pg_shift, i;
1359         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1360         struct i40iw_pble_info *pinfo;
1361         struct scatterlist *sg;
1362         u64 pg_addr = 0;
1363         u32 idx = 0;
1364
1365         pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1366
1367         pg_shift = ffs(region->page_size) - 1;
1368         for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
1369                 chunk_pages = sg_dma_len(sg) >> pg_shift;
1370                 if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1371                     !iwpbl->qp_mr.sq_page)
1372                         iwpbl->qp_mr.sq_page = sg_page(sg);
1373                 for (i = 0; i < chunk_pages; i++) {
1374                         pg_addr = sg_dma_address(sg) + region->page_size * i;
1375
1376                         if ((entry + i) == 0)
1377                                 *pbl = cpu_to_le64(pg_addr & iwmr->page_msk);
1378                         else if (!(pg_addr & ~iwmr->page_msk))
1379                                 *pbl = cpu_to_le64(pg_addr);
1380                         else
1381                                 continue;
1382                         pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
1383                 }
1384         }
1385 }
1386
1387 /**
1388  * i40iw_set_hugetlb_params - set MR pg size and mask to huge pg values.
1389  * @addr: virtual address
1390  * @iwmr: mr pointer for this memory registration
1391  */
1392 static void i40iw_set_hugetlb_values(u64 addr, struct i40iw_mr *iwmr)
1393 {
1394         struct vm_area_struct *vma;
1395         struct hstate *h;
1396
1397         vma = find_vma(current->mm, addr);
1398         if (vma && is_vm_hugetlb_page(vma)) {
1399                 h = hstate_vma(vma);
1400                 if (huge_page_size(h) == 0x200000) {
1401                         iwmr->page_size = huge_page_size(h);
1402                         iwmr->page_msk = huge_page_mask(h);
1403                 }
1404         }
1405 }
1406
1407 /**
1408  * i40iw_check_mem_contiguous - check if pbls stored in arr are contiguous
1409  * @arr: lvl1 pbl array
1410  * @npages: page count
1411  * pg_size: page size
1412  *
1413  */
1414 static bool i40iw_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
1415 {
1416         u32 pg_idx;
1417
1418         for (pg_idx = 0; pg_idx < npages; pg_idx++) {
1419                 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
1420                         return false;
1421         }
1422         return true;
1423 }
1424
1425 /**
1426  * i40iw_check_mr_contiguous - check if MR is physically contiguous
1427  * @palloc: pbl allocation struct
1428  * pg_size: page size
1429  */
1430 static bool i40iw_check_mr_contiguous(struct i40iw_pble_alloc *palloc, u32 pg_size)
1431 {
1432         struct i40iw_pble_level2 *lvl2 = &palloc->level2;
1433         struct i40iw_pble_info *leaf = lvl2->leaf;
1434         u64 *arr = NULL;
1435         u64 *start_addr = NULL;
1436         int i;
1437         bool ret;
1438
1439         if (palloc->level == I40IW_LEVEL_1) {
1440                 arr = (u64 *)palloc->level1.addr;
1441                 ret = i40iw_check_mem_contiguous(arr, palloc->total_cnt, pg_size);
1442                 return ret;
1443         }
1444
1445         start_addr = (u64 *)leaf->addr;
1446
1447         for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
1448                 arr = (u64 *)leaf->addr;
1449                 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
1450                         return false;
1451                 ret = i40iw_check_mem_contiguous(arr, leaf->cnt, pg_size);
1452                 if (!ret)
1453                         return false;
1454         }
1455
1456         return true;
1457 }
1458
1459 /**
1460  * i40iw_setup_pbles - copy user pg address to pble's
1461  * @iwdev: iwarp device
1462  * @iwmr: mr pointer for this memory registration
1463  * @use_pbles: flag if to use pble's
1464  */
1465 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1466                              struct i40iw_mr *iwmr,
1467                              bool use_pbles)
1468 {
1469         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1470         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1471         struct i40iw_pble_info *pinfo;
1472         u64 *pbl;
1473         enum i40iw_status_code status;
1474         enum i40iw_pble_level level = I40IW_LEVEL_1;
1475
1476         if (use_pbles) {
1477                 mutex_lock(&iwdev->pbl_mutex);
1478                 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1479                 mutex_unlock(&iwdev->pbl_mutex);
1480                 if (status)
1481                         return -ENOMEM;
1482
1483                 iwpbl->pbl_allocated = true;
1484                 level = palloc->level;
1485                 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1486                 pbl = (u64 *)pinfo->addr;
1487         } else {
1488                 pbl = iwmr->pgaddrmem;
1489         }
1490
1491         i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1492
1493         if (use_pbles)
1494                 iwmr->pgaddrmem[0] = *pbl;
1495
1496         return 0;
1497 }
1498
1499 /**
1500  * i40iw_handle_q_mem - handle memory for qp and cq
1501  * @iwdev: iwarp device
1502  * @req: information for q memory management
1503  * @iwpbl: pble struct
1504  * @use_pbles: flag to use pble
1505  */
1506 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1507                               struct i40iw_mem_reg_req *req,
1508                               struct i40iw_pbl *iwpbl,
1509                               bool use_pbles)
1510 {
1511         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1512         struct i40iw_mr *iwmr = iwpbl->iwmr;
1513         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1514         struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1515         struct i40iw_hmc_pble *hmc_p;
1516         u64 *arr = iwmr->pgaddrmem;
1517         u32 pg_size;
1518         int err;
1519         int total;
1520         bool ret = true;
1521
1522         total = req->sq_pages + req->rq_pages + req->cq_pages;
1523         pg_size = iwmr->page_size;
1524
1525         err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1526         if (err)
1527                 return err;
1528
1529         if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1530                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1531                 iwpbl->pbl_allocated = false;
1532                 return -ENOMEM;
1533         }
1534
1535         if (use_pbles)
1536                 arr = (u64 *)palloc->level1.addr;
1537
1538         if (iwmr->type == IW_MEMREG_TYPE_QP) {
1539                 hmc_p = &qpmr->sq_pbl;
1540                 qpmr->shadow = (dma_addr_t)arr[total];
1541
1542                 if (use_pbles) {
1543                         ret = i40iw_check_mem_contiguous(arr, req->sq_pages, pg_size);
1544                         if (ret)
1545                                 ret = i40iw_check_mem_contiguous(&arr[req->sq_pages], req->rq_pages, pg_size);
1546                 }
1547
1548                 if (!ret) {
1549                         hmc_p->idx = palloc->level1.idx;
1550                         hmc_p = &qpmr->rq_pbl;
1551                         hmc_p->idx = palloc->level1.idx + req->sq_pages;
1552                 } else {
1553                         hmc_p->addr = arr[0];
1554                         hmc_p = &qpmr->rq_pbl;
1555                         hmc_p->addr = arr[req->sq_pages];
1556                 }
1557         } else {                /* CQ */
1558                 hmc_p = &cqmr->cq_pbl;
1559                 cqmr->shadow = (dma_addr_t)arr[total];
1560
1561                 if (use_pbles)
1562                         ret = i40iw_check_mem_contiguous(arr, req->cq_pages, pg_size);
1563
1564                 if (!ret)
1565                         hmc_p->idx = palloc->level1.idx;
1566                 else
1567                         hmc_p->addr = arr[0];
1568         }
1569
1570         if (use_pbles && ret) {
1571                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1572                 iwpbl->pbl_allocated = false;
1573         }
1574
1575         return err;
1576 }
1577
1578 /**
1579  * i40iw_hw_alloc_stag - cqp command to allocate stag
1580  * @iwdev: iwarp device
1581  * @iwmr: iwarp mr pointer
1582  */
1583 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1584 {
1585         struct i40iw_allocate_stag_info *info;
1586         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1587         enum i40iw_status_code status;
1588         int err = 0;
1589         struct i40iw_cqp_request *cqp_request;
1590         struct cqp_commands_info *cqp_info;
1591
1592         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1593         if (!cqp_request)
1594                 return -ENOMEM;
1595
1596         cqp_info = &cqp_request->info;
1597         info = &cqp_info->in.u.alloc_stag.info;
1598         memset(info, 0, sizeof(*info));
1599         info->page_size = PAGE_SIZE;
1600         info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1601         info->pd_id = iwpd->sc_pd.pd_id;
1602         info->total_len = iwmr->length;
1603         info->remote_access = true;
1604         cqp_info->cqp_cmd = OP_ALLOC_STAG;
1605         cqp_info->post_sq = 1;
1606         cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1607         cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1608
1609         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1610         if (status) {
1611                 err = -ENOMEM;
1612                 i40iw_pr_err("CQP-OP MR Reg fail");
1613         }
1614         return err;
1615 }
1616
1617 /**
1618  * i40iw_alloc_mr - register stag for fast memory registration
1619  * @pd: ibpd pointer
1620  * @mr_type: memory for stag registrion
1621  * @max_num_sg: man number of pages
1622  */
1623 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1624                                     enum ib_mr_type mr_type,
1625                                     u32 max_num_sg)
1626 {
1627         struct i40iw_pd *iwpd = to_iwpd(pd);
1628         struct i40iw_device *iwdev = to_iwdev(pd->device);
1629         struct i40iw_pble_alloc *palloc;
1630         struct i40iw_pbl *iwpbl;
1631         struct i40iw_mr *iwmr;
1632         enum i40iw_status_code status;
1633         u32 stag;
1634         int err_code = -ENOMEM;
1635
1636         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1637         if (!iwmr)
1638                 return ERR_PTR(-ENOMEM);
1639
1640         stag = i40iw_create_stag(iwdev);
1641         if (!stag) {
1642                 err_code = -EOVERFLOW;
1643                 goto err;
1644         }
1645         iwmr->stag = stag;
1646         iwmr->ibmr.rkey = stag;
1647         iwmr->ibmr.lkey = stag;
1648         iwmr->ibmr.pd = pd;
1649         iwmr->ibmr.device = pd->device;
1650         iwpbl = &iwmr->iwpbl;
1651         iwpbl->iwmr = iwmr;
1652         iwmr->type = IW_MEMREG_TYPE_MEM;
1653         palloc = &iwpbl->pble_alloc;
1654         iwmr->page_cnt = max_num_sg;
1655         mutex_lock(&iwdev->pbl_mutex);
1656         status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1657         mutex_unlock(&iwdev->pbl_mutex);
1658         if (status)
1659                 goto err1;
1660
1661         if (palloc->level != I40IW_LEVEL_1)
1662                 goto err2;
1663         err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1664         if (err_code)
1665                 goto err2;
1666         iwpbl->pbl_allocated = true;
1667         i40iw_add_pdusecount(iwpd);
1668         return &iwmr->ibmr;
1669 err2:
1670         i40iw_free_pble(iwdev->pble_rsrc, palloc);
1671 err1:
1672         i40iw_free_stag(iwdev, stag);
1673 err:
1674         kfree(iwmr);
1675         return ERR_PTR(err_code);
1676 }
1677
1678 /**
1679  * i40iw_set_page - populate pbl list for fmr
1680  * @ibmr: ib mem to access iwarp mr pointer
1681  * @addr: page dma address fro pbl list
1682  */
1683 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1684 {
1685         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1686         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1687         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1688         u64 *pbl;
1689
1690         if (unlikely(iwmr->npages == iwmr->page_cnt))
1691                 return -ENOMEM;
1692
1693         pbl = (u64 *)palloc->level1.addr;
1694         pbl[iwmr->npages++] = cpu_to_le64(addr);
1695         return 0;
1696 }
1697
1698 /**
1699  * i40iw_map_mr_sg - map of sg list for fmr
1700  * @ibmr: ib mem to access iwarp mr pointer
1701  * @sg: scatter gather list for fmr
1702  * @sg_nents: number of sg pages
1703  */
1704 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1705                            int sg_nents, unsigned int *sg_offset)
1706 {
1707         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1708
1709         iwmr->npages = 0;
1710         return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1711 }
1712
1713 /**
1714  * i40iw_drain_sq - drain the send queue
1715  * @ibqp: ib qp pointer
1716  */
1717 static void i40iw_drain_sq(struct ib_qp *ibqp)
1718 {
1719         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1720         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1721
1722         if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1723                 wait_for_completion(&iwqp->sq_drained);
1724 }
1725
1726 /**
1727  * i40iw_drain_rq - drain the receive queue
1728  * @ibqp: ib qp pointer
1729  */
1730 static void i40iw_drain_rq(struct ib_qp *ibqp)
1731 {
1732         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1733         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1734
1735         if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1736                 wait_for_completion(&iwqp->rq_drained);
1737 }
1738
1739 /**
1740  * i40iw_hwreg_mr - send cqp command for memory registration
1741  * @iwdev: iwarp device
1742  * @iwmr: iwarp mr pointer
1743  * @access: access for MR
1744  */
1745 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1746                           struct i40iw_mr *iwmr,
1747                           u16 access)
1748 {
1749         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1750         struct i40iw_reg_ns_stag_info *stag_info;
1751         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1752         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1753         enum i40iw_status_code status;
1754         int err = 0;
1755         struct i40iw_cqp_request *cqp_request;
1756         struct cqp_commands_info *cqp_info;
1757
1758         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1759         if (!cqp_request)
1760                 return -ENOMEM;
1761
1762         cqp_info = &cqp_request->info;
1763         stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1764         memset(stag_info, 0, sizeof(*stag_info));
1765         stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1766         stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1767         stag_info->stag_key = (u8)iwmr->stag;
1768         stag_info->total_len = iwmr->length;
1769         stag_info->access_rights = access;
1770         stag_info->pd_id = iwpd->sc_pd.pd_id;
1771         stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1772         stag_info->page_size = iwmr->page_size;
1773
1774         if (iwpbl->pbl_allocated) {
1775                 if (palloc->level == I40IW_LEVEL_1) {
1776                         stag_info->first_pm_pbl_index = palloc->level1.idx;
1777                         stag_info->chunk_size = 1;
1778                 } else {
1779                         stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1780                         stag_info->chunk_size = 3;
1781                 }
1782         } else {
1783                 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1784         }
1785
1786         cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1787         cqp_info->post_sq = 1;
1788         cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1789         cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1790
1791         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1792         if (status) {
1793                 err = -ENOMEM;
1794                 i40iw_pr_err("CQP-OP MR Reg fail");
1795         }
1796         return err;
1797 }
1798
1799 /**
1800  * i40iw_reg_user_mr - Register a user memory region
1801  * @pd: ptr of pd
1802  * @start: virtual start address
1803  * @length: length of mr
1804  * @virt: virtual address
1805  * @acc: access of mr
1806  * @udata: user data
1807  */
1808 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1809                                        u64 start,
1810                                        u64 length,
1811                                        u64 virt,
1812                                        int acc,
1813                                        struct ib_udata *udata)
1814 {
1815         struct i40iw_pd *iwpd = to_iwpd(pd);
1816         struct i40iw_device *iwdev = to_iwdev(pd->device);
1817         struct i40iw_ucontext *ucontext;
1818         struct i40iw_pble_alloc *palloc;
1819         struct i40iw_pbl *iwpbl;
1820         struct i40iw_mr *iwmr;
1821         struct ib_umem *region;
1822         struct i40iw_mem_reg_req req;
1823         u64 pbl_depth = 0;
1824         u32 stag = 0;
1825         u16 access;
1826         u64 region_length;
1827         bool use_pbles = false;
1828         unsigned long flags;
1829         int err = -ENOSYS;
1830         int ret;
1831         int pg_shift;
1832
1833         if (iwdev->closing)
1834                 return ERR_PTR(-ENODEV);
1835
1836         if (length > I40IW_MAX_MR_SIZE)
1837                 return ERR_PTR(-EINVAL);
1838         region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1839         if (IS_ERR(region))
1840                 return (struct ib_mr *)region;
1841
1842         if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1843                 ib_umem_release(region);
1844                 return ERR_PTR(-EFAULT);
1845         }
1846
1847         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1848         if (!iwmr) {
1849                 ib_umem_release(region);
1850                 return ERR_PTR(-ENOMEM);
1851         }
1852
1853         iwpbl = &iwmr->iwpbl;
1854         iwpbl->iwmr = iwmr;
1855         iwmr->region = region;
1856         iwmr->ibmr.pd = pd;
1857         iwmr->ibmr.device = pd->device;
1858         ucontext = to_ucontext(pd->uobject->context);
1859
1860         iwmr->page_size = region->page_size;
1861         iwmr->page_msk = PAGE_MASK;
1862
1863         if (region->hugetlb && (req.reg_type == IW_MEMREG_TYPE_MEM))
1864                 i40iw_set_hugetlb_values(start, iwmr);
1865
1866         region_length = region->length + (start & (iwmr->page_size - 1));
1867         pg_shift = ffs(iwmr->page_size) - 1;
1868         pbl_depth = region_length >> pg_shift;
1869         pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
1870         iwmr->length = region->length;
1871
1872         iwpbl->user_base = virt;
1873         palloc = &iwpbl->pble_alloc;
1874
1875         iwmr->type = req.reg_type;
1876         iwmr->page_cnt = (u32)pbl_depth;
1877
1878         switch (req.reg_type) {
1879         case IW_MEMREG_TYPE_QP:
1880                 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1881                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1882                 if (err)
1883                         goto error;
1884                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1885                 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1886                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1887                 break;
1888         case IW_MEMREG_TYPE_CQ:
1889                 use_pbles = (req.cq_pages > 1);
1890                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1891                 if (err)
1892                         goto error;
1893
1894                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1895                 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1896                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1897                 break;
1898         case IW_MEMREG_TYPE_MEM:
1899                 use_pbles = (iwmr->page_cnt != 1);
1900                 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1901
1902                 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1903                 if (err)
1904                         goto error;
1905
1906                 if (use_pbles) {
1907                         ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
1908                         if (ret) {
1909                                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1910                                 iwpbl->pbl_allocated = false;
1911                         }
1912                 }
1913
1914                 access |= i40iw_get_user_access(acc);
1915                 stag = i40iw_create_stag(iwdev);
1916                 if (!stag) {
1917                         err = -ENOMEM;
1918                         goto error;
1919                 }
1920
1921                 iwmr->stag = stag;
1922                 iwmr->ibmr.rkey = stag;
1923                 iwmr->ibmr.lkey = stag;
1924
1925                 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1926                 if (err) {
1927                         i40iw_free_stag(iwdev, stag);
1928                         goto error;
1929                 }
1930
1931                 break;
1932         default:
1933                 goto error;
1934         }
1935
1936         iwmr->type = req.reg_type;
1937         if (req.reg_type == IW_MEMREG_TYPE_MEM)
1938                 i40iw_add_pdusecount(iwpd);
1939         return &iwmr->ibmr;
1940
1941 error:
1942         if (palloc->level != I40IW_LEVEL_0 && iwpbl->pbl_allocated)
1943                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1944         ib_umem_release(region);
1945         kfree(iwmr);
1946         return ERR_PTR(err);
1947 }
1948
1949 /**
1950  * i40iw_reg_phys_mr - register kernel physical memory
1951  * @pd: ibpd pointer
1952  * @addr: physical address of memory to register
1953  * @size: size of memory to register
1954  * @acc: Access rights
1955  * @iova_start: start of virtual address for physical buffers
1956  */
1957 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1958                                 u64 addr,
1959                                 u64 size,
1960                                 int acc,
1961                                 u64 *iova_start)
1962 {
1963         struct i40iw_pd *iwpd = to_iwpd(pd);
1964         struct i40iw_device *iwdev = to_iwdev(pd->device);
1965         struct i40iw_pbl *iwpbl;
1966         struct i40iw_mr *iwmr;
1967         enum i40iw_status_code status;
1968         u32 stag;
1969         u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1970         int ret;
1971
1972         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1973         if (!iwmr)
1974                 return ERR_PTR(-ENOMEM);
1975         iwmr->ibmr.pd = pd;
1976         iwmr->ibmr.device = pd->device;
1977         iwpbl = &iwmr->iwpbl;
1978         iwpbl->iwmr = iwmr;
1979         iwmr->type = IW_MEMREG_TYPE_MEM;
1980         iwpbl->user_base = *iova_start;
1981         stag = i40iw_create_stag(iwdev);
1982         if (!stag) {
1983                 ret = -EOVERFLOW;
1984                 goto err;
1985         }
1986         access |= i40iw_get_user_access(acc);
1987         iwmr->stag = stag;
1988         iwmr->ibmr.rkey = stag;
1989         iwmr->ibmr.lkey = stag;
1990         iwmr->page_cnt = 1;
1991         iwmr->pgaddrmem[0]  = addr;
1992         iwmr->length = size;
1993         status = i40iw_hwreg_mr(iwdev, iwmr, access);
1994         if (status) {
1995                 i40iw_free_stag(iwdev, stag);
1996                 ret = -ENOMEM;
1997                 goto err;
1998         }
1999
2000         i40iw_add_pdusecount(iwpd);
2001         return &iwmr->ibmr;
2002  err:
2003         kfree(iwmr);
2004         return ERR_PTR(ret);
2005 }
2006
2007 /**
2008  * i40iw_get_dma_mr - register physical mem
2009  * @pd: ptr of pd
2010  * @acc: access for memory
2011  */
2012 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
2013 {
2014         u64 kva = 0;
2015
2016         return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
2017 }
2018
2019 /**
2020  * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
2021  * @iwmr: iwmr for IB's user page addresses
2022  * @ucontext: ptr to user context
2023  */
2024 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
2025                               struct i40iw_ucontext *ucontext)
2026 {
2027         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2028         unsigned long flags;
2029
2030         switch (iwmr->type) {
2031         case IW_MEMREG_TYPE_CQ:
2032                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2033                 if (!list_empty(&ucontext->cq_reg_mem_list))
2034                         list_del(&iwpbl->list);
2035                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2036                 break;
2037         case IW_MEMREG_TYPE_QP:
2038                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2039                 if (!list_empty(&ucontext->qp_reg_mem_list))
2040                         list_del(&iwpbl->list);
2041                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2042                 break;
2043         default:
2044                 break;
2045         }
2046 }
2047
2048 /**
2049  * i40iw_dereg_mr - deregister mr
2050  * @ib_mr: mr ptr for dereg
2051  */
2052 static int i40iw_dereg_mr(struct ib_mr *ib_mr)
2053 {
2054         struct ib_pd *ibpd = ib_mr->pd;
2055         struct i40iw_pd *iwpd = to_iwpd(ibpd);
2056         struct i40iw_mr *iwmr = to_iwmr(ib_mr);
2057         struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
2058         enum i40iw_status_code status;
2059         struct i40iw_dealloc_stag_info *info;
2060         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2061         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
2062         struct i40iw_cqp_request *cqp_request;
2063         struct cqp_commands_info *cqp_info;
2064         u32 stag_idx;
2065
2066         if (iwmr->region)
2067                 ib_umem_release(iwmr->region);
2068
2069         if (iwmr->type != IW_MEMREG_TYPE_MEM) {
2070                 if (ibpd->uobject) {
2071                         struct i40iw_ucontext *ucontext;
2072
2073                         ucontext = to_ucontext(ibpd->uobject->context);
2074                         i40iw_del_memlist(iwmr, ucontext);
2075                 }
2076                 if (iwpbl->pbl_allocated)
2077                         i40iw_free_pble(iwdev->pble_rsrc, palloc);
2078                 kfree(iwmr);
2079                 return 0;
2080         }
2081
2082         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
2083         if (!cqp_request)
2084                 return -ENOMEM;
2085
2086         cqp_info = &cqp_request->info;
2087         info = &cqp_info->in.u.dealloc_stag.info;
2088         memset(info, 0, sizeof(*info));
2089
2090         info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
2091         info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
2092         stag_idx = info->stag_idx;
2093         info->mr = true;
2094         if (iwpbl->pbl_allocated)
2095                 info->dealloc_pbl = true;
2096
2097         cqp_info->cqp_cmd = OP_DEALLOC_STAG;
2098         cqp_info->post_sq = 1;
2099         cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
2100         cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2101         status = i40iw_handle_cqp_op(iwdev, cqp_request);
2102         if (status)
2103                 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
2104         i40iw_rem_pdusecount(iwpd, iwdev);
2105         i40iw_free_stag(iwdev, iwmr->stag);
2106         if (iwpbl->pbl_allocated)
2107                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2108         kfree(iwmr);
2109         return 0;
2110 }
2111
2112 /**
2113  * i40iw_show_rev
2114  */
2115 static ssize_t i40iw_show_rev(struct device *dev,
2116                               struct device_attribute *attr, char *buf)
2117 {
2118         struct i40iw_ib_device *iwibdev = container_of(dev,
2119                                                        struct i40iw_ib_device,
2120                                                        ibdev.dev);
2121         u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2122
2123         return sprintf(buf, "%x\n", hw_rev);
2124 }
2125
2126 /**
2127  * i40iw_show_hca
2128  */
2129 static ssize_t i40iw_show_hca(struct device *dev,
2130                               struct device_attribute *attr, char *buf)
2131 {
2132         return sprintf(buf, "I40IW\n");
2133 }
2134
2135 /**
2136  * i40iw_show_board
2137  */
2138 static ssize_t i40iw_show_board(struct device *dev,
2139                                 struct device_attribute *attr,
2140                                 char *buf)
2141 {
2142         return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2143 }
2144
2145 static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
2146 static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
2147 static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
2148
2149 static struct device_attribute *i40iw_dev_attributes[] = {
2150         &dev_attr_hw_rev,
2151         &dev_attr_hca_type,
2152         &dev_attr_board_id
2153 };
2154
2155 /**
2156  * i40iw_copy_sg_list - copy sg list for qp
2157  * @sg_list: copied into sg_list
2158  * @sgl: copy from sgl
2159  * @num_sges: count of sg entries
2160  */
2161 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2162 {
2163         unsigned int i;
2164
2165         for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2166                 sg_list[i].tag_off = sgl[i].addr;
2167                 sg_list[i].len = sgl[i].length;
2168                 sg_list[i].stag = sgl[i].lkey;
2169         }
2170 }
2171
2172 /**
2173  * i40iw_post_send -  kernel application wr
2174  * @ibqp: qp ptr for wr
2175  * @ib_wr: work request ptr
2176  * @bad_wr: return of bad wr if err
2177  */
2178 static int i40iw_post_send(struct ib_qp *ibqp,
2179                            struct ib_send_wr *ib_wr,
2180                            struct ib_send_wr **bad_wr)
2181 {
2182         struct i40iw_qp *iwqp;
2183         struct i40iw_qp_uk *ukqp;
2184         struct i40iw_post_sq_info info;
2185         enum i40iw_status_code ret;
2186         int err = 0;
2187         unsigned long flags;
2188         bool inv_stag;
2189
2190         iwqp = (struct i40iw_qp *)ibqp;
2191         ukqp = &iwqp->sc_qp.qp_uk;
2192
2193         spin_lock_irqsave(&iwqp->lock, flags);
2194         while (ib_wr) {
2195                 inv_stag = false;
2196                 memset(&info, 0, sizeof(info));
2197                 info.wr_id = (u64)(ib_wr->wr_id);
2198                 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2199                         info.signaled = true;
2200                 if (ib_wr->send_flags & IB_SEND_FENCE)
2201                         info.read_fence = true;
2202
2203                 switch (ib_wr->opcode) {
2204                 case IB_WR_SEND:
2205                         /* fall-through */
2206                 case IB_WR_SEND_WITH_INV:
2207                         if (ib_wr->opcode == IB_WR_SEND) {
2208                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2209                                         info.op_type = I40IW_OP_TYPE_SEND_SOL;
2210                                 else
2211                                         info.op_type = I40IW_OP_TYPE_SEND;
2212                         } else {
2213                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2214                                         info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2215                                 else
2216                                         info.op_type = I40IW_OP_TYPE_SEND_INV;
2217                         }
2218
2219                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2220                                 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2221                                 info.op.inline_send.len = ib_wr->sg_list[0].length;
2222                                 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2223                         } else {
2224                                 info.op.send.num_sges = ib_wr->num_sge;
2225                                 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2226                                 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2227                         }
2228
2229                         if (ret) {
2230                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2231                                         err = -ENOMEM;
2232                                 else
2233                                         err = -EINVAL;
2234                         }
2235                         break;
2236                 case IB_WR_RDMA_WRITE:
2237                         info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2238
2239                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2240                                 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2241                                 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2242                                 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2243                                 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2244                                 info.op.inline_rdma_write.rem_addr.len = ib_wr->sg_list->length;
2245                                 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2246                         } else {
2247                                 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2248                                 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2249                                 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2250                                 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2251                                 info.op.rdma_write.rem_addr.len = ib_wr->sg_list->length;
2252                                 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2253                         }
2254
2255                         if (ret) {
2256                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2257                                         err = -ENOMEM;
2258                                 else
2259                                         err = -EINVAL;
2260                         }
2261                         break;
2262                 case IB_WR_RDMA_READ_WITH_INV:
2263                         inv_stag = true;
2264                         /* fall-through*/
2265                 case IB_WR_RDMA_READ:
2266                         if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2267                                 err = -EINVAL;
2268                                 break;
2269                         }
2270                         info.op_type = I40IW_OP_TYPE_RDMA_READ;
2271                         info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2272                         info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2273                         info.op.rdma_read.rem_addr.len = ib_wr->sg_list->length;
2274                         info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2275                         info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2276                         info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2277                         ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2278                         if (ret) {
2279                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2280                                         err = -ENOMEM;
2281                                 else
2282                                         err = -EINVAL;
2283                         }
2284                         break;
2285                 case IB_WR_LOCAL_INV:
2286                         info.op_type = I40IW_OP_TYPE_INV_STAG;
2287                         info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2288                         ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2289                         if (ret)
2290                                 err = -ENOMEM;
2291                         break;
2292                 case IB_WR_REG_MR:
2293                 {
2294                         struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2295                         int flags = reg_wr(ib_wr)->access;
2296                         struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2297                         struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2298                         struct i40iw_fast_reg_stag_info info;
2299
2300                         memset(&info, 0, sizeof(info));
2301                         info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2302                         info.access_rights |= i40iw_get_user_access(flags);
2303                         info.stag_key = reg_wr(ib_wr)->key & 0xff;
2304                         info.stag_idx = reg_wr(ib_wr)->key >> 8;
2305                         info.page_size = reg_wr(ib_wr)->mr->page_size;
2306                         info.wr_id = ib_wr->wr_id;
2307
2308                         info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2309                         info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2310                         info.total_len = iwmr->ibmr.length;
2311                         info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2312                         info.first_pm_pbl_index = palloc->level1.idx;
2313                         info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2314                         info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2315
2316                         if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2317                                 info.chunk_size = 1;
2318
2319                         ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2320                         if (ret)
2321                                 err = -ENOMEM;
2322                         break;
2323                 }
2324                 default:
2325                         err = -EINVAL;
2326                         i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2327                                      ib_wr->opcode);
2328                         break;
2329                 }
2330
2331                 if (err)
2332                         break;
2333                 ib_wr = ib_wr->next;
2334         }
2335
2336         if (err)
2337                 *bad_wr = ib_wr;
2338         else
2339                 ukqp->ops.iw_qp_post_wr(ukqp);
2340         spin_unlock_irqrestore(&iwqp->lock, flags);
2341
2342         return err;
2343 }
2344
2345 /**
2346  * i40iw_post_recv - post receive wr for kernel application
2347  * @ibqp: ib qp pointer
2348  * @ib_wr: work request for receive
2349  * @bad_wr: bad wr caused an error
2350  */
2351 static int i40iw_post_recv(struct ib_qp *ibqp,
2352                            struct ib_recv_wr *ib_wr,
2353                            struct ib_recv_wr **bad_wr)
2354 {
2355         struct i40iw_qp *iwqp;
2356         struct i40iw_qp_uk *ukqp;
2357         struct i40iw_post_rq_info post_recv;
2358         struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2359         enum i40iw_status_code ret = 0;
2360         unsigned long flags;
2361         int err = 0;
2362
2363         iwqp = (struct i40iw_qp *)ibqp;
2364         ukqp = &iwqp->sc_qp.qp_uk;
2365
2366         memset(&post_recv, 0, sizeof(post_recv));
2367         spin_lock_irqsave(&iwqp->lock, flags);
2368         while (ib_wr) {
2369                 post_recv.num_sges = ib_wr->num_sge;
2370                 post_recv.wr_id = ib_wr->wr_id;
2371                 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2372                 post_recv.sg_list = sg_list;
2373                 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2374                 if (ret) {
2375                         i40iw_pr_err(" post_recv err %d\n", ret);
2376                         if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2377                                 err = -ENOMEM;
2378                         else
2379                                 err = -EINVAL;
2380                         *bad_wr = ib_wr;
2381                         goto out;
2382                 }
2383                 ib_wr = ib_wr->next;
2384         }
2385  out:
2386         spin_unlock_irqrestore(&iwqp->lock, flags);
2387         return err;
2388 }
2389
2390 /**
2391  * i40iw_poll_cq - poll cq for completion (kernel apps)
2392  * @ibcq: cq to poll
2393  * @num_entries: number of entries to poll
2394  * @entry: wr of entry completed
2395  */
2396 static int i40iw_poll_cq(struct ib_cq *ibcq,
2397                          int num_entries,
2398                          struct ib_wc *entry)
2399 {
2400         struct i40iw_cq *iwcq;
2401         int cqe_count = 0;
2402         struct i40iw_cq_poll_info cq_poll_info;
2403         enum i40iw_status_code ret;
2404         struct i40iw_cq_uk *ukcq;
2405         struct i40iw_sc_qp *qp;
2406         struct i40iw_qp *iwqp;
2407         unsigned long flags;
2408
2409         iwcq = (struct i40iw_cq *)ibcq;
2410         ukcq = &iwcq->sc_cq.cq_uk;
2411
2412         spin_lock_irqsave(&iwcq->lock, flags);
2413         while (cqe_count < num_entries) {
2414                 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2415                 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2416                         break;
2417                 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2418                         continue;
2419                 } else if (ret) {
2420                         if (!cqe_count)
2421                                 cqe_count = -1;
2422                         break;
2423                 }
2424                 entry->wc_flags = 0;
2425                 entry->wr_id = cq_poll_info.wr_id;
2426                 if (cq_poll_info.error) {
2427                         entry->status = IB_WC_WR_FLUSH_ERR;
2428                         entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2429                 } else {
2430                         entry->status = IB_WC_SUCCESS;
2431                 }
2432
2433                 switch (cq_poll_info.op_type) {
2434                 case I40IW_OP_TYPE_RDMA_WRITE:
2435                         entry->opcode = IB_WC_RDMA_WRITE;
2436                         break;
2437                 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2438                 case I40IW_OP_TYPE_RDMA_READ:
2439                         entry->opcode = IB_WC_RDMA_READ;
2440                         break;
2441                 case I40IW_OP_TYPE_SEND_SOL:
2442                 case I40IW_OP_TYPE_SEND_SOL_INV:
2443                 case I40IW_OP_TYPE_SEND_INV:
2444                 case I40IW_OP_TYPE_SEND:
2445                         entry->opcode = IB_WC_SEND;
2446                         break;
2447                 case I40IW_OP_TYPE_REC:
2448                         entry->opcode = IB_WC_RECV;
2449                         break;
2450                 default:
2451                         entry->opcode = IB_WC_RECV;
2452                         break;
2453                 }
2454
2455                 entry->ex.imm_data = 0;
2456                 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2457                 entry->qp = (struct ib_qp *)qp->back_qp;
2458                 entry->src_qp = cq_poll_info.qp_id;
2459                 iwqp = (struct i40iw_qp *)qp->back_qp;
2460                 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2461                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2462                                 complete(&iwqp->sq_drained);
2463                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2464                                 complete(&iwqp->rq_drained);
2465                 }
2466                 entry->byte_len = cq_poll_info.bytes_xfered;
2467                 entry++;
2468                 cqe_count++;
2469         }
2470         spin_unlock_irqrestore(&iwcq->lock, flags);
2471         return cqe_count;
2472 }
2473
2474 /**
2475  * i40iw_req_notify_cq - arm cq kernel application
2476  * @ibcq: cq to arm
2477  * @notify_flags: notofication flags
2478  */
2479 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2480                                enum ib_cq_notify_flags notify_flags)
2481 {
2482         struct i40iw_cq *iwcq;
2483         struct i40iw_cq_uk *ukcq;
2484         unsigned long flags;
2485         enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2486
2487         iwcq = (struct i40iw_cq *)ibcq;
2488         ukcq = &iwcq->sc_cq.cq_uk;
2489         if (notify_flags == IB_CQ_SOLICITED)
2490                 cq_notify = IW_CQ_COMPL_SOLICITED;
2491         spin_lock_irqsave(&iwcq->lock, flags);
2492         ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2493         spin_unlock_irqrestore(&iwcq->lock, flags);
2494         return 0;
2495 }
2496
2497 /**
2498  * i40iw_port_immutable - return port's immutable data
2499  * @ibdev: ib dev struct
2500  * @port_num: port number
2501  * @immutable: immutable data for the port return
2502  */
2503 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2504                                 struct ib_port_immutable *immutable)
2505 {
2506         struct ib_port_attr attr;
2507         int err;
2508
2509         err = i40iw_query_port(ibdev, port_num, &attr);
2510
2511         if (err)
2512                 return err;
2513
2514         immutable->pkey_tbl_len = attr.pkey_tbl_len;
2515         immutable->gid_tbl_len = attr.gid_tbl_len;
2516         immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2517
2518         return 0;
2519 }
2520
2521 static const char * const i40iw_hw_stat_names[] = {
2522         // 32bit names
2523         [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2524         [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2525         [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2526         [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2527         [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2528         [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2529         [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2530         [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2531         [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2532         // 64bit names
2533         [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2534                 "ip4InOctets",
2535         [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2536                 "ip4InPkts",
2537         [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2538                 "ip4InReasmRqd",
2539         [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2540                 "ip4InMcastPkts",
2541         [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2542                 "ip4OutOctets",
2543         [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2544                 "ip4OutPkts",
2545         [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2546                 "ip4OutSegRqd",
2547         [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2548                 "ip4OutMcastPkts",
2549         [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2550                 "ip6InOctets",
2551         [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2552                 "ip6InPkts",
2553         [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2554                 "ip6InReasmRqd",
2555         [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2556                 "ip6InMcastPkts",
2557         [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2558                 "ip6OutOctets",
2559         [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2560                 "ip6OutPkts",
2561         [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2562                 "ip6OutSegRqd",
2563         [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2564                 "ip6OutMcastPkts",
2565         [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2566                 "tcpInSegs",
2567         [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2568                 "tcpOutSegs",
2569         [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2570                 "iwInRdmaReads",
2571         [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2572                 "iwInRdmaSends",
2573         [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2574                 "iwInRdmaWrites",
2575         [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2576                 "iwOutRdmaReads",
2577         [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2578                 "iwOutRdmaSends",
2579         [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2580                 "iwOutRdmaWrites",
2581         [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2582                 "iwRdmaBnd",
2583         [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2584                 "iwRdmaInv"
2585 };
2586
2587 static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str,
2588                                  size_t str_len)
2589 {
2590         u32 firmware_version = I40IW_FW_VERSION;
2591
2592         snprintf(str, str_len, "%u.%u", firmware_version,
2593                        (firmware_version & 0x000000ff));
2594 }
2595
2596 /**
2597  * i40iw_alloc_hw_stats - Allocate a hw stats structure
2598  * @ibdev: device pointer from stack
2599  * @port_num: port number
2600  */
2601 static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2602                                                   u8 port_num)
2603 {
2604         struct i40iw_device *iwdev = to_iwdev(ibdev);
2605         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2606         int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2607                 I40IW_HW_STAT_INDEX_MAX_64;
2608         unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2609
2610         BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2611                      (I40IW_HW_STAT_INDEX_MAX_32 +
2612                       I40IW_HW_STAT_INDEX_MAX_64));
2613
2614         /*
2615          * PFs get the default update lifespan, but VFs only update once
2616          * per second
2617          */
2618         if (!dev->is_pf)
2619                 lifespan = 1000;
2620         return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2621                                           lifespan);
2622 }
2623
2624 /**
2625  * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2626  * @ibdev: device pointer from stack
2627  * @stats: stats pointer from stack
2628  * @port_num: port number
2629  * @index: which hw counter the stack is requesting we update
2630  */
2631 static int i40iw_get_hw_stats(struct ib_device *ibdev,
2632                               struct rdma_hw_stats *stats,
2633                               u8 port_num, int index)
2634 {
2635         struct i40iw_device *iwdev = to_iwdev(ibdev);
2636         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2637         struct i40iw_vsi_pestat *devstat = iwdev->vsi.pestat;
2638         struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2639
2640         if (dev->is_pf) {
2641                 i40iw_hw_stats_read_all(devstat, &devstat->hw_stats);
2642         } else {
2643                 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2644                         return -ENOSYS;
2645         }
2646
2647         memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
2648
2649         return stats->num_counters;
2650 }
2651
2652 /**
2653  * i40iw_query_gid - Query port GID
2654  * @ibdev: device pointer from stack
2655  * @port: port number
2656  * @index: Entry index
2657  * @gid: Global ID
2658  */
2659 static int i40iw_query_gid(struct ib_device *ibdev,
2660                            u8 port,
2661                            int index,
2662                            union ib_gid *gid)
2663 {
2664         struct i40iw_device *iwdev = to_iwdev(ibdev);
2665
2666         memset(gid->raw, 0, sizeof(gid->raw));
2667         ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2668         return 0;
2669 }
2670
2671 /**
2672  * i40iw_modify_port  Modify port properties
2673  * @ibdev: device pointer from stack
2674  * @port: port number
2675  * @port_modify_mask: mask for port modifications
2676  * @props: port properties
2677  */
2678 static int i40iw_modify_port(struct ib_device *ibdev,
2679                              u8 port,
2680                              int port_modify_mask,
2681                              struct ib_port_modify *props)
2682 {
2683         return -ENOSYS;
2684 }
2685
2686 /**
2687  * i40iw_query_pkey - Query partition key
2688  * @ibdev: device pointer from stack
2689  * @port: port number
2690  * @index: index of pkey
2691  * @pkey: pointer to store the pkey
2692  */
2693 static int i40iw_query_pkey(struct ib_device *ibdev,
2694                             u8 port,
2695                             u16 index,
2696                             u16 *pkey)
2697 {
2698         *pkey = 0;
2699         return 0;
2700 }
2701
2702 /**
2703  * i40iw_create_ah - create address handle
2704  * @ibpd: ptr of pd
2705  * @ah_attr: address handle attributes
2706  */
2707 static struct ib_ah *i40iw_create_ah(struct ib_pd *ibpd,
2708                                      struct ib_ah_attr *attr,
2709                                      struct ib_udata *udata)
2710
2711 {
2712         return ERR_PTR(-ENOSYS);
2713 }
2714
2715 /**
2716  * i40iw_destroy_ah - Destroy address handle
2717  * @ah: pointer to address handle
2718  */
2719 static int i40iw_destroy_ah(struct ib_ah *ah)
2720 {
2721         return -ENOSYS;
2722 }
2723
2724 /**
2725  * i40iw_init_rdma_device - initialization of iwarp device
2726  * @iwdev: iwarp device
2727  */
2728 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2729 {
2730         struct i40iw_ib_device *iwibdev;
2731         struct net_device *netdev = iwdev->netdev;
2732         struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2733
2734         iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2735         if (!iwibdev) {
2736                 i40iw_pr_err("iwdev == NULL\n");
2737                 return NULL;
2738         }
2739         strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2740         iwibdev->ibdev.owner = THIS_MODULE;
2741         iwdev->iwibdev = iwibdev;
2742         iwibdev->iwdev = iwdev;
2743
2744         iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2745         ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2746
2747         iwibdev->ibdev.uverbs_cmd_mask =
2748             (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2749             (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2750             (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2751             (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2752             (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2753             (1ull << IB_USER_VERBS_CMD_REG_MR) |
2754             (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2755             (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2756             (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2757             (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2758             (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2759             (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2760             (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2761             (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2762             (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2763             (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2764             (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2765             (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2766             (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2767             (1ull << IB_USER_VERBS_CMD_POST_SEND);
2768         iwibdev->ibdev.phys_port_cnt = 1;
2769         iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
2770         iwibdev->ibdev.dma_device = &pcidev->dev;
2771         iwibdev->ibdev.dev.parent = &pcidev->dev;
2772         iwibdev->ibdev.query_port = i40iw_query_port;
2773         iwibdev->ibdev.modify_port = i40iw_modify_port;
2774         iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2775         iwibdev->ibdev.query_gid = i40iw_query_gid;
2776         iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2777         iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2778         iwibdev->ibdev.mmap = i40iw_mmap;
2779         iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2780         iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2781         iwibdev->ibdev.create_qp = i40iw_create_qp;
2782         iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2783         iwibdev->ibdev.query_qp = i40iw_query_qp;
2784         iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2785         iwibdev->ibdev.create_cq = i40iw_create_cq;
2786         iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2787         iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2788         iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2789         iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
2790         iwibdev->ibdev.alloc_hw_stats = i40iw_alloc_hw_stats;
2791         iwibdev->ibdev.get_hw_stats = i40iw_get_hw_stats;
2792         iwibdev->ibdev.query_device = i40iw_query_device;
2793         iwibdev->ibdev.create_ah = i40iw_create_ah;
2794         iwibdev->ibdev.destroy_ah = i40iw_destroy_ah;
2795         iwibdev->ibdev.drain_sq = i40iw_drain_sq;
2796         iwibdev->ibdev.drain_rq = i40iw_drain_rq;
2797         iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2798         iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
2799         iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2800         if (!iwibdev->ibdev.iwcm) {
2801                 ib_dealloc_device(&iwibdev->ibdev);
2802                 return NULL;
2803         }
2804
2805         iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2806         iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2807         iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2808         iwibdev->ibdev.iwcm->connect = i40iw_connect;
2809         iwibdev->ibdev.iwcm->accept = i40iw_accept;
2810         iwibdev->ibdev.iwcm->reject = i40iw_reject;
2811         iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2812         iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
2813         memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2814                sizeof(iwibdev->ibdev.iwcm->ifname));
2815         iwibdev->ibdev.get_port_immutable   = i40iw_port_immutable;
2816         iwibdev->ibdev.get_dev_fw_str       = i40iw_get_dev_fw_str;
2817         iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2818         iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2819         iwibdev->ibdev.post_send = i40iw_post_send;
2820         iwibdev->ibdev.post_recv = i40iw_post_recv;
2821
2822         return iwibdev;
2823 }
2824
2825 /**
2826  * i40iw_port_ibevent - indicate port event
2827  * @iwdev: iwarp device
2828  */
2829 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2830 {
2831         struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2832         struct ib_event event;
2833
2834         event.device = &iwibdev->ibdev;
2835         event.element.port_num = 1;
2836         event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2837         ib_dispatch_event(&event);
2838 }
2839
2840 /**
2841  * i40iw_unregister_rdma_device - unregister of iwarp from IB
2842  * @iwibdev: rdma device ptr
2843  */
2844 static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2845 {
2846         int i;
2847
2848         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2849                 device_remove_file(&iwibdev->ibdev.dev,
2850                                    i40iw_dev_attributes[i]);
2851         ib_unregister_device(&iwibdev->ibdev);
2852 }
2853
2854 /**
2855  * i40iw_destroy_rdma_device - destroy rdma device and free resources
2856  * @iwibdev: IB device ptr
2857  */
2858 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2859 {
2860         if (!iwibdev)
2861                 return;
2862
2863         i40iw_unregister_rdma_device(iwibdev);
2864         kfree(iwibdev->ibdev.iwcm);
2865         iwibdev->ibdev.iwcm = NULL;
2866         wait_event_timeout(iwibdev->iwdev->close_wq,
2867                            !atomic64_read(&iwibdev->iwdev->use_count),
2868                            I40IW_EVENT_TIMEOUT);
2869         ib_dealloc_device(&iwibdev->ibdev);
2870 }
2871
2872 /**
2873  * i40iw_register_rdma_device - register iwarp device to IB
2874  * @iwdev: iwarp device
2875  */
2876 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2877 {
2878         int i, ret;
2879         struct i40iw_ib_device *iwibdev;
2880
2881         iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2882         if (!iwdev->iwibdev)
2883                 return -ENOMEM;
2884         iwibdev = iwdev->iwibdev;
2885
2886         ret = ib_register_device(&iwibdev->ibdev, NULL);
2887         if (ret)
2888                 goto error;
2889
2890         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2891                 ret =
2892                     device_create_file(&iwibdev->ibdev.dev,
2893                                        i40iw_dev_attributes[i]);
2894                 if (ret) {
2895                         while (i > 0) {
2896                                 i--;
2897                                 device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2898                         }
2899                         ib_unregister_device(&iwibdev->ibdev);
2900                         goto error;
2901                 }
2902         }
2903         return 0;
2904 error:
2905         kfree(iwdev->iwibdev->ibdev.iwcm);
2906         iwdev->iwibdev->ibdev.iwcm = NULL;
2907         ib_dealloc_device(&iwdev->iwibdev->ibdev);
2908         return ret;
2909 }