drivers/infiniband/hw/ipath/ipath_driver.c

   1 /*
   2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/spinlock.h>
  35 #include <linux/idr.h>
  36 #include <linux/pci.h>
  37 #include <linux/delay.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/vmalloc.h>
  40
  41 #include "ipath_kernel.h"
  42 #include "ipath_verbs.h"
  43 #include "ipath_common.h"
  44
  45 static void ipath_update_pio_bufs(struct ipath_devdata *);
  46
  47 const char *ipath_get_unit_name(int unit)
  48 {
  49         static char iname[16];
  50         snprintf(iname, sizeof iname, "infinipath%u", unit);
  51         return iname;
  52 }
  53
  54 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
  55 #define PFX IPATH_DRV_NAME ": "
  56
  57 /*
  58  * The size has to be longer than this string, so we can append
  59  * board/chip information to it in the init code.
  60  */
  61 const char ib_ipath_version[] = IPATH_IDSTR "\n";
  62
  63 static struct idr unit_table;
  64 DEFINE_SPINLOCK(ipath_devs_lock);
  65 LIST_HEAD(ipath_dev_list);
  66
  67 wait_queue_head_t ipath_state_wait;
  68
  69 unsigned ipath_debug = __IPATH_INFO;
  70
  71 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
  72 MODULE_PARM_DESC(debug, "mask for debug prints");
  73 EXPORT_SYMBOL_GPL(ipath_debug);
  74
  75 MODULE_LICENSE("GPL");
  76 MODULE_AUTHOR("QLogic <support@pathscale.com>");
  77 MODULE_DESCRIPTION("QLogic InfiniPath driver");
  78
  79 const char *ipath_ibcstatus_str[] = {
  80         "Disabled",
  81         "LinkUp",
  82         "PollActive",
  83         "PollQuiet",
  84         "SleepDelay",
  85         "SleepQuiet",
  86         "LState6",              /* unused */
  87         "LState7",              /* unused */
  88         "CfgDebounce",
  89         "CfgRcvfCfg",
  90         "CfgWaitRmt",
  91         "CfgIdle",
  92         "RecovRetrain",
  93         "LState0xD",            /* unused */
  94         "RecovWaitRmt",
  95         "RecovIdle",
  96 };
  97
  98 /*
  99  * These variables are initialized in the chip-specific files
 100  * but are defined here.
 101  */
 102 u16 ipath_gpio_sda_num, ipath_gpio_scl_num;
 103 u64 ipath_gpio_sda, ipath_gpio_scl;
 104 u64 infinipath_i_bitsextant;
 105 ipath_err_t infinipath_e_bitsextant, infinipath_hwe_bitsextant;
 106 u32 infinipath_i_rcvavail_mask, infinipath_i_rcvurg_mask;
 107
 108 static void __devexit ipath_remove_one(struct pci_dev *);
 109 static int __devinit ipath_init_one(struct pci_dev *,
 110                                     const struct pci_device_id *);
 111
 112 /* Only needed for registration, nothing else needs this info */
 113 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
 114 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
 115 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
 116
 117 static const struct pci_device_id ipath_pci_tbl[] = {
 118         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
 119         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_PE800) },
 120         { 0, }
 121 };
 122
 123 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
 124
 125 static struct pci_driver ipath_driver = {
 126         .name = IPATH_DRV_NAME,
 127         .probe = ipath_init_one,
 128         .remove = __devexit_p(ipath_remove_one),
 129         .id_table = ipath_pci_tbl,
 130 };
 131
 132
 133 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
 134                              u32 *bar0, u32 *bar1)
 135 {
 136         int ret;
 137
 138         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 139         if (ret)
 140                 ipath_dev_err(dd, "failed to read bar0 before enable: "
 141                               "error %d\n", -ret);
 142
 143         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
 144         if (ret)
 145                 ipath_dev_err(dd, "failed to read bar1 before enable: "
 146                               "error %d\n", -ret);
 147
 148         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
 149 }
 150
 151 static void ipath_free_devdata(struct pci_dev *pdev,
 152                                struct ipath_devdata *dd)
 153 {
 154         unsigned long flags;
 155
 156         pci_set_drvdata(pdev, NULL);
 157
 158         if (dd->ipath_unit != -1) {
 159                 spin_lock_irqsave(&ipath_devs_lock, flags);
 160                 idr_remove(&unit_table, dd->ipath_unit);
 161                 list_del(&dd->ipath_list);
 162                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
 163         }
 164         vfree(dd);
 165 }
 166
 167 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
 168 {
 169         unsigned long flags;
 170         struct ipath_devdata *dd;
 171         int ret;
 172
 173         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
 174                 dd = ERR_PTR(-ENOMEM);
 175                 goto bail;
 176         }
 177
 178         dd = vmalloc(sizeof(*dd));
 179         if (!dd) {
 180                 dd = ERR_PTR(-ENOMEM);
 181                 goto bail;
 182         }
 183         memset(dd, 0, sizeof(*dd));
 184         dd->ipath_unit = -1;
 185
 186         spin_lock_irqsave(&ipath_devs_lock, flags);
 187
 188         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
 189         if (ret < 0) {
 190                 printk(KERN_ERR IPATH_DRV_NAME
 191                        ": Could not allocate unit ID: error %d\n", -ret);
 192                 ipath_free_devdata(pdev, dd);
 193                 dd = ERR_PTR(ret);
 194                 goto bail_unlock;
 195         }
 196
 197         dd->pcidev = pdev;
 198         pci_set_drvdata(pdev, dd);
 199
 200         list_add(&dd->ipath_list, &ipath_dev_list);
 201
 202 bail_unlock:
 203         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 204
 205 bail:
 206         return dd;
 207 }
 208
 209 static inline struct ipath_devdata *__ipath_lookup(int unit)
 210 {
 211         return idr_find(&unit_table, unit);
 212 }
 213
 214 struct ipath_devdata *ipath_lookup(int unit)
 215 {
 216         struct ipath_devdata *dd;
 217         unsigned long flags;
 218
 219         spin_lock_irqsave(&ipath_devs_lock, flags);
 220         dd = __ipath_lookup(unit);
 221         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 222
 223         return dd;
 224 }
 225
 226 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp)
 227 {
 228         int nunits, npresent, nup;
 229         struct ipath_devdata *dd;
 230         unsigned long flags;
 231         u32 maxports;
 232
 233         nunits = npresent = nup = maxports = 0;
 234
 235         spin_lock_irqsave(&ipath_devs_lock, flags);
 236
 237         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 238                 nunits++;
 239                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
 240                         npresent++;
 241                 if (dd->ipath_lid &&
 242                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
 243                                          | IPATH_LINKUNK)))
 244                         nup++;
 245                 if (dd->ipath_cfgports > maxports)
 246                         maxports = dd->ipath_cfgports;
 247         }
 248
 249         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 250
 251         if (npresentp)
 252                 *npresentp = npresent;
 253         if (nupp)
 254                 *nupp = nup;
 255         if (maxportsp)
 256                 *maxportsp = maxports;
 257
 258         return nunits;
 259 }
 260
 261 /*
 262  * These next two routines are placeholders in case we don't have per-arch
 263  * code for controlling write combining.  If explicit control of write
 264  * combining is not available, performance will probably be awful.
 265  */
 266
 267 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
 268 {
 269         return -EOPNOTSUPP;
 270 }
 271
 272 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
 273 {
 274 }
 275
 276 static int __devinit ipath_init_one(struct pci_dev *pdev,
 277                                     const struct pci_device_id *ent)
 278 {
 279         int ret, len, j;
 280         struct ipath_devdata *dd;
 281         unsigned long long addr;
 282         u32 bar0 = 0, bar1 = 0;
 283         u8 rev;
 284
 285         dd = ipath_alloc_devdata(pdev);
 286         if (IS_ERR(dd)) {
 287                 ret = PTR_ERR(dd);
 288                 printk(KERN_ERR IPATH_DRV_NAME
 289                        ": Could not allocate devdata: error %d\n", -ret);
 290                 goto bail;
 291         }
 292
 293         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
 294
 295         read_bars(dd, pdev, &bar0, &bar1);
 296
 297         ret = pci_enable_device(pdev);
 298         if (ret) {
 299                 /* This can happen iff:
 300                  *
 301                  * We did a chip reset, and then failed to reprogram the
 302                  * BAR, or the chip reset due to an internal error.  We then
 303                  * unloaded the driver and reloaded it.
 304                  *
 305                  * Both reset cases set the BAR back to initial state.  For
 306                  * the latter case, the AER sticky error bit at offset 0x718
 307                  * should be set, but the Linux kernel doesn't yet know
 308                  * about that, it appears.  If the original BAR was retained
 309                  * in the kernel data structures, this may be OK.
 310                  */
 311                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
 312                               dd->ipath_unit, -ret);
 313                 goto bail_devdata;
 314         }
 315         addr = pci_resource_start(pdev, 0);
 316         len = pci_resource_len(pdev, 0);
 317         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d irq %x, vend %x/%x "
 318                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
 319                    ent->device, ent->driver_data);
 320
 321         read_bars(dd, pdev, &bar0, &bar1);
 322
 323         if (!bar1 && !(bar0 & ~0xf)) {
 324                 if (addr) {
 325                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
 326                                  "rewriting as %llx\n", addr);
 327                         ret = pci_write_config_dword(
 328                                 pdev, PCI_BASE_ADDRESS_0, addr);
 329                         if (ret) {
 330                                 ipath_dev_err(dd, "rewrite of BAR0 "
 331                                               "failed: err %d\n", -ret);
 332                                 goto bail_disable;
 333                         }
 334                         ret = pci_write_config_dword(
 335                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
 336                         if (ret) {
 337                                 ipath_dev_err(dd, "rewrite of BAR1 "
 338                                               "failed: err %d\n", -ret);
 339                                 goto bail_disable;
 340                         }
 341                 } else {
 342                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
 343                                       "not usable until reboot\n");
 344                         ret = -ENODEV;
 345                         goto bail_disable;
 346                 }
 347         }
 348
 349         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
 350         if (ret) {
 351                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
 352                          "err %d\n", dd->ipath_unit, -ret);
 353                 goto bail_disable;
 354         }
 355
 356         ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 357         if (ret) {
 358                 /*
 359                  * if the 64 bit setup fails, try 32 bit.  Some systems
 360                  * do not setup 64 bit maps on systems with 2GB or less
 361                  * memory installed.
 362                  */
 363                 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 364                 if (ret) {
 365                         dev_info(&pdev->dev,
 366                                 "Unable to set DMA mask for unit %u: %d\n",
 367                                 dd->ipath_unit, ret);
 368                         goto bail_regions;
 369                 }
 370                 else {
 371                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
 372                         ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 373                         if (ret)
 374                                 dev_info(&pdev->dev,
 375                                         "Unable to set DMA consistent mask "
 376                                         "for unit %u: %d\n",
 377                                         dd->ipath_unit, ret);
 378
 379                 }
 380         }
 381         else {
 382                 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 383                 if (ret)
 384                         dev_info(&pdev->dev,
 385                                 "Unable to set DMA consistent mask "
 386                                 "for unit %u: %d\n",
 387                                 dd->ipath_unit, ret);
 388         }
 389
 390         pci_set_master(pdev);
 391
 392         /*
 393          * Save BARs to rewrite after device reset.  Save all 64 bits of
 394          * BAR, just in case.
 395          */
 396         dd->ipath_pcibar0 = addr;
 397         dd->ipath_pcibar1 = addr >> 32;
 398         dd->ipath_deviceid = ent->device;       /* save for later use */
 399         dd->ipath_vendorid = ent->vendor;
 400
 401         /* setup the chip-specific functions, as early as possible. */
 402         switch (ent->device) {
 403         case PCI_DEVICE_ID_INFINIPATH_HT:
 404                 ipath_init_iba6110_funcs(dd);
 405                 break;
 406         case PCI_DEVICE_ID_INFINIPATH_PE800:
 407                 ipath_init_iba6120_funcs(dd);
 408                 break;
 409         default:
 410                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
 411                               "failing\n", ent->device);
 412                 return -ENODEV;
 413         }
 414
 415         for (j = 0; j < 6; j++) {
 416                 if (!pdev->resource[j].start)
 417                         continue;
 418                 ipath_cdbg(VERBOSE, "BAR %d start %llx, end %llx, len %llx\n",
 419                            j, (unsigned long long)pdev->resource[j].start,
 420                            (unsigned long long)pdev->resource[j].end,
 421                            (unsigned long long)pci_resource_len(pdev, j));
 422         }
 423
 424         if (!addr) {
 425                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
 426                 ret = -ENODEV;
 427                 goto bail_regions;
 428         }
 429
 430         dd->ipath_deviceid = ent->device;       /* save for later use */
 431         dd->ipath_vendorid = ent->vendor;
 432
 433         ret = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
 434         if (ret) {
 435                 ipath_dev_err(dd, "Failed to read PCI revision ID unit "
 436                               "%u: err %d\n", dd->ipath_unit, -ret);
 437                 goto bail_regions;      /* shouldn't ever happen */
 438         }
 439         dd->ipath_pcirev = rev;
 440
 441 #if defined(__powerpc__)
 442         /* There isn't a generic way to specify writethrough mappings */
 443         dd->ipath_kregbase = __ioremap(addr, len,
 444                 (_PAGE_NO_CACHE|_PAGE_WRITETHRU));
 445 #else
 446         dd->ipath_kregbase = ioremap_nocache(addr, len);
 447 #endif
 448
 449         if (!dd->ipath_kregbase) {
 450                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
 451                           addr);
 452                 ret = -ENOMEM;
 453                 goto bail_iounmap;
 454         }
 455         dd->ipath_kregend = (u64 __iomem *)
 456                 ((void __iomem *)dd->ipath_kregbase + len);
 457         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
 458         /* for user mmap */
 459         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
 460                    addr, dd->ipath_kregbase);
 461
 462         /*
 463          * clear ipath_flags here instead of in ipath_init_chip as it is set
 464          * by ipath_setup_htconfig.
 465          */
 466         dd->ipath_flags = 0;
 467         dd->ipath_lli_counter = 0;
 468         dd->ipath_lli_errors = 0;
 469
 470         if (dd->ipath_f_bus(dd, pdev))
 471                 ipath_dev_err(dd, "Failed to setup config space; "
 472                               "continuing anyway\n");
 473
 474         /*
 475          * set up our interrupt handler; IRQF_SHARED probably not needed,
 476          * since MSI interrupts shouldn't be shared but won't  hurt for now.
 477          * check 0 irq after we return from chip-specific bus setup, since
 478          * that can affect this due to setup
 479          */
 480         if (!pdev->irq)
 481                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
 482                               "work\n");
 483         else {
 484                 ret = request_irq(pdev->irq, ipath_intr, IRQF_SHARED,
 485                                   IPATH_DRV_NAME, dd);
 486                 if (ret) {
 487                         ipath_dev_err(dd, "Couldn't setup irq handler, "
 488                                       "irq=%u: %d\n", pdev->irq, ret);
 489                         goto bail_iounmap;
 490                 }
 491         }
 492
 493         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
 494         if (ret)
 495                 goto bail_iounmap;
 496
 497         ret = ipath_enable_wc(dd);
 498
 499         if (ret) {
 500                 ipath_dev_err(dd, "Write combining not enabled "
 501                               "(err %d): performance may be poor\n",
 502                               -ret);
 503                 ret = 0;
 504         }
 505
 506         ipath_device_create_group(&pdev->dev, dd);
 507         ipathfs_add_device(dd);
 508         ipath_user_add(dd);
 509         ipath_diag_add(dd);
 510         ipath_register_ib_device(dd);
 511
 512         goto bail;
 513
 514 bail_iounmap:
 515         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 516
 517 bail_regions:
 518         pci_release_regions(pdev);
 519
 520 bail_disable:
 521         pci_disable_device(pdev);
 522
 523 bail_devdata:
 524         ipath_free_devdata(pdev, dd);
 525
 526 bail:
 527         return ret;
 528 }
 529
 530 static void __devexit ipath_remove_one(struct pci_dev *pdev)
 531 {
 532         struct ipath_devdata *dd;
 533
 534         ipath_cdbg(VERBOSE, "removing, pdev=%p\n", pdev);
 535         if (!pdev)
 536                 return;
 537
 538         dd = pci_get_drvdata(pdev);
 539
 540         if (dd->verbs_dev) {
 541                 ipath_unregister_ib_device(dd->verbs_dev);
 542                 dd->verbs_dev = NULL;
 543         }
 544
 545         ipath_diag_remove(dd);
 546         ipath_user_remove(dd);
 547         ipathfs_remove_device(dd);
 548         ipath_device_remove_group(&pdev->dev, dd);
 549         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
 550                    "unit %u\n", dd, (u32) dd->ipath_unit);
 551         if (dd->ipath_kregbase) {
 552                 ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n",
 553                            dd->ipath_kregbase);
 554                 iounmap((volatile void __iomem *) dd->ipath_kregbase);
 555                 dd->ipath_kregbase = NULL;
 556         }
 557         pci_release_regions(pdev);
 558         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
 559         pci_disable_device(pdev);
 560
 561         ipath_free_devdata(pdev, dd);
 562 }
 563
 564 /* general driver use */
 565 DEFINE_MUTEX(ipath_mutex);
 566
 567 static DEFINE_SPINLOCK(ipath_pioavail_lock);
 568
 569 /**
 570  * ipath_disarm_piobufs - cancel a range of PIO buffers
 571  * @dd: the infinipath device
 572  * @first: the first PIO buffer to cancel
 573  * @cnt: the number of PIO buffers to cancel
 574  *
 575  * cancel a range of PIO buffers, used when they might be armed, but
 576  * not triggered.  Used at init to ensure buffer state, and also user
 577  * process close, in case it died while writing to a PIO buffer
 578  * Also after errors.
 579  */
 580 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
 581                           unsigned cnt)
 582 {
 583         unsigned i, last = first + cnt;
 584         u64 sendctrl, sendorig;
 585
 586         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
 587         sendorig = dd->ipath_sendctrl | INFINIPATH_S_DISARM;
 588         for (i = first; i < last; i++) {
 589                 sendctrl = sendorig |
 590                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT);
 591                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 592                                  sendctrl);
 593         }
 594
 595         /*
 596          * Write it again with current value, in case ipath_sendctrl changed
 597          * while we were looping; no critical bits that would require
 598          * locking.
 599          *
 600          * Write a 0, and then the original value, reading scratch in
 601          * between.  This seems to avoid a chip timing race that causes
 602          * pioavail updates to memory to stop.
 603          */
 604         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 605                          0);
 606         sendorig = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 607         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 608                          dd->ipath_sendctrl);
 609 }
 610
 611 /**
 612  * ipath_wait_linkstate - wait for an IB link state change to occur
 613  * @dd: the infinipath device
 614  * @state: the state to wait for
 615  * @msecs: the number of milliseconds to wait
 616  *
 617  * wait up to msecs milliseconds for IB link state change to occur for
 618  * now, take the easy polling route.  Currently used only by
 619  * ipath_set_linkstate.  Returns 0 if state reached, otherwise
 620  * -ETIMEDOUT state can have multiple states set, for any of several
 621  * transitions.
 622  */
 623 static int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state,
 624                                 int msecs)
 625 {
 626         dd->ipath_state_wanted = state;
 627         wait_event_interruptible_timeout(ipath_state_wait,
 628                                          (dd->ipath_flags & state),
 629                                          msecs_to_jiffies(msecs));
 630         dd->ipath_state_wanted = 0;
 631
 632         if (!(dd->ipath_flags & state)) {
 633                 u64 val;
 634                 ipath_cdbg(VERBOSE, "Didn't reach linkstate %s within %u"
 635                            " ms\n",
 636                            /* test INIT ahead of DOWN, both can be set */
 637                            (state & IPATH_LINKINIT) ? "INIT" :
 638                            ((state & IPATH_LINKDOWN) ? "DOWN" :
 639                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
 640                            msecs);
 641                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 642                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
 643                            (unsigned long long) ipath_read_kreg64(
 644                                    dd, dd->ipath_kregs->kr_ibcctrl),
 645                            (unsigned long long) val,
 646                            ipath_ibcstatus_str[val & 0xf]);
 647         }
 648         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
 649 }
 650
 651 void ipath_decode_err(char *buf, size_t blen, ipath_err_t err)
 652 {
 653         *buf = '\0';
 654         if (err & INFINIPATH_E_RHDRLEN)
 655                 strlcat(buf, "rhdrlen ", blen);
 656         if (err & INFINIPATH_E_RBADTID)
 657                 strlcat(buf, "rbadtid ", blen);
 658         if (err & INFINIPATH_E_RBADVERSION)
 659                 strlcat(buf, "rbadversion ", blen);
 660         if (err & INFINIPATH_E_RHDR)
 661                 strlcat(buf, "rhdr ", blen);
 662         if (err & INFINIPATH_E_RLONGPKTLEN)
 663                 strlcat(buf, "rlongpktlen ", blen);
 664         if (err & INFINIPATH_E_RSHORTPKTLEN)
 665                 strlcat(buf, "rshortpktlen ", blen);
 666         if (err & INFINIPATH_E_RMAXPKTLEN)
 667                 strlcat(buf, "rmaxpktlen ", blen);
 668         if (err & INFINIPATH_E_RMINPKTLEN)
 669                 strlcat(buf, "rminpktlen ", blen);
 670         if (err & INFINIPATH_E_RFORMATERR)
 671                 strlcat(buf, "rformaterr ", blen);
 672         if (err & INFINIPATH_E_RUNSUPVL)
 673                 strlcat(buf, "runsupvl ", blen);
 674         if (err & INFINIPATH_E_RUNEXPCHAR)
 675                 strlcat(buf, "runexpchar ", blen);
 676         if (err & INFINIPATH_E_RIBFLOW)
 677                 strlcat(buf, "ribflow ", blen);
 678         if (err & INFINIPATH_E_REBP)
 679                 strlcat(buf, "EBP ", blen);
 680         if (err & INFINIPATH_E_SUNDERRUN)
 681                 strlcat(buf, "sunderrun ", blen);
 682         if (err & INFINIPATH_E_SPIOARMLAUNCH)
 683                 strlcat(buf, "spioarmlaunch ", blen);
 684         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
 685                 strlcat(buf, "sunexperrpktnum ", blen);
 686         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
 687                 strlcat(buf, "sdroppeddatapkt ", blen);
 688         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
 689                 strlcat(buf, "sdroppedsmppkt ", blen);
 690         if (err & INFINIPATH_E_SMAXPKTLEN)
 691                 strlcat(buf, "smaxpktlen ", blen);
 692         if (err & INFINIPATH_E_SMINPKTLEN)
 693                 strlcat(buf, "sminpktlen ", blen);
 694         if (err & INFINIPATH_E_SUNSUPVL)
 695                 strlcat(buf, "sunsupVL ", blen);
 696         if (err & INFINIPATH_E_SPKTLEN)
 697                 strlcat(buf, "spktlen ", blen);
 698         if (err & INFINIPATH_E_INVALIDADDR)
 699                 strlcat(buf, "invalidaddr ", blen);
 700         if (err & INFINIPATH_E_RICRC)
 701                 strlcat(buf, "CRC ", blen);
 702         if (err & INFINIPATH_E_RVCRC)
 703                 strlcat(buf, "VCRC ", blen);
 704         if (err & INFINIPATH_E_RRCVEGRFULL)
 705                 strlcat(buf, "rcvegrfull ", blen);
 706         if (err & INFINIPATH_E_RRCVHDRFULL)
 707                 strlcat(buf, "rcvhdrfull ", blen);
 708         if (err & INFINIPATH_E_IBSTATUSCHANGED)
 709                 strlcat(buf, "ibcstatuschg ", blen);
 710         if (err & INFINIPATH_E_RIBLOSTLINK)
 711                 strlcat(buf, "riblostlink ", blen);
 712         if (err & INFINIPATH_E_HARDWARE)
 713                 strlcat(buf, "hardware ", blen);
 714         if (err & INFINIPATH_E_RESET)
 715                 strlcat(buf, "reset ", blen);
 716 }
 717
 718 /**
 719  * get_rhf_errstring - decode RHF errors
 720  * @err: the err number
 721  * @msg: the output buffer
 722  * @len: the length of the output buffer
 723  *
 724  * only used one place now, may want more later
 725  */
 726 static void get_rhf_errstring(u32 err, char *msg, size_t len)
 727 {
 728         /* if no errors, and so don't need to check what's first */
 729         *msg = '\0';
 730
 731         if (err & INFINIPATH_RHF_H_ICRCERR)
 732                 strlcat(msg, "icrcerr ", len);
 733         if (err & INFINIPATH_RHF_H_VCRCERR)
 734                 strlcat(msg, "vcrcerr ", len);
 735         if (err & INFINIPATH_RHF_H_PARITYERR)
 736                 strlcat(msg, "parityerr ", len);
 737         if (err & INFINIPATH_RHF_H_LENERR)
 738                 strlcat(msg, "lenerr ", len);
 739         if (err & INFINIPATH_RHF_H_MTUERR)
 740                 strlcat(msg, "mtuerr ", len);
 741         if (err & INFINIPATH_RHF_H_IHDRERR)
 742                 /* infinipath hdr checksum error */
 743                 strlcat(msg, "ipathhdrerr ", len);
 744         if (err & INFINIPATH_RHF_H_TIDERR)
 745                 strlcat(msg, "tiderr ", len);
 746         if (err & INFINIPATH_RHF_H_MKERR)
 747                 /* bad port, offset, etc. */
 748                 strlcat(msg, "invalid ipathhdr ", len);
 749         if (err & INFINIPATH_RHF_H_IBERR)
 750                 strlcat(msg, "iberr ", len);
 751         if (err & INFINIPATH_RHF_L_SWA)
 752                 strlcat(msg, "swA ", len);
 753         if (err & INFINIPATH_RHF_L_SWB)
 754                 strlcat(msg, "swB ", len);
 755 }
 756
 757 /**
 758  * ipath_get_egrbuf - get an eager buffer
 759  * @dd: the infinipath device
 760  * @bufnum: the eager buffer to get
 761  * @err: unused
 762  *
 763  * must only be called if ipath_pd[port] is known to be allocated
 764  */
 765 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum,
 766                                      int err)
 767 {
 768         return dd->ipath_port0_skbs ?
 769                 (void *)dd->ipath_port0_skbs[bufnum]->data : NULL;
 770 }
 771
 772 /**
 773  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
 774  * @dd: the infinipath device
 775  * @gfp_mask: the sk_buff SFP mask
 776  */
 777 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
 778                                 gfp_t gfp_mask)
 779 {
 780         struct sk_buff *skb;
 781         u32 len;
 782
 783         /*
 784          * Only fully supported way to handle this is to allocate lots
 785          * extra, align as needed, and then do skb_reserve().  That wastes
 786          * a lot of memory...  I'll have to hack this into infinipath_copy
 787          * also.
 788          */
 789
 790         /*
 791          * We need 4 extra bytes for unaligned transfer copying
 792          */
 793         if (dd->ipath_flags & IPATH_4BYTE_TID) {
 794                 /* we need a 4KB multiple alignment, and there is no way
 795                  * to do it except to allocate extra and then skb_reserve
 796                  * enough to bring it up to the right alignment.
 797                  */
 798                 len = dd->ipath_ibmaxlen + 4 + (1 << 11) - 1;
 799         }
 800         else
 801                 len = dd->ipath_ibmaxlen + 4;
 802         skb = __dev_alloc_skb(len, gfp_mask);
 803         if (!skb) {
 804                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
 805                               len);
 806                 goto bail;
 807         }
 808         if (dd->ipath_flags & IPATH_4BYTE_TID) {
 809                 u32 una = ((1 << 11) - 1) & (unsigned long)(skb->data + 4);
 810                 if (una)
 811                         skb_reserve(skb, 4 + (1 << 11) - una);
 812                 else
 813                         skb_reserve(skb, 4);
 814         } else
 815                 skb_reserve(skb, 4);
 816
 817 bail:
 818         return skb;
 819 }
 820
 821 static void ipath_rcv_hdrerr(struct ipath_devdata *dd,
 822                              u32 eflags,
 823                              u32 l,
 824                              u32 etail,
 825                              u64 *rc)
 826 {
 827         char emsg[128];
 828         struct ipath_message_header *hdr;
 829
 830         get_rhf_errstring(eflags, emsg, sizeof emsg);
 831         hdr = (struct ipath_message_header *)&rc[1];
 832         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
 833                    "tlen=%x opcode=%x egridx=%x: %s\n",
 834                    eflags, l,
 835                    ipath_hdrget_rcv_type((__le32 *) rc),
 836                    ipath_hdrget_length_in_bytes((__le32 *) rc),
 837                    be32_to_cpu(hdr->bth[0]) >> 24,
 838                    etail, emsg);
 839
 840         /* Count local link integrity errors. */
 841         if (eflags & (INFINIPATH_RHF_H_ICRCERR | INFINIPATH_RHF_H_VCRCERR)) {
 842                 u8 n = (dd->ipath_ibcctrl >>
 843                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
 844                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
 845
 846                 if (++dd->ipath_lli_counter > n) {
 847                         dd->ipath_lli_counter = 0;
 848                         dd->ipath_lli_errors++;
 849                 }
 850         }
 851 }
 852
 853 /*
 854  * ipath_kreceive - receive a packet
 855  * @dd: the infinipath device
 856  *
 857  * called from interrupt handler for errors or receive interrupt
 858  */
 859 void ipath_kreceive(struct ipath_devdata *dd)
 860 {
 861         u64 *rc;
 862         void *ebuf;
 863         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
 864         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
 865         u32 etail = -1, l, hdrqtail;
 866         struct ipath_message_header *hdr;
 867         u32 eflags, i, etype, tlen, pkttot = 0, updegr=0, reloop=0;
 868         static u64 totcalls;    /* stats, may eventually remove */
 869
 870         if (!dd->ipath_hdrqtailptr) {
 871                 ipath_dev_err(dd,
 872                               "hdrqtailptr not set, can't do receives\n");
 873                 goto bail;
 874         }
 875
 876         /* There is already a thread processing this queue. */
 877         if (test_and_set_bit(0, &dd->ipath_rcv_pending))
 878                 goto bail;
 879
 880         l = dd->ipath_port0head;
 881         hdrqtail = (u32) le64_to_cpu(*dd->ipath_hdrqtailptr);
 882         if (l == hdrqtail)
 883                 goto done;
 884
 885 reloop:
 886         for (i = 0; l != hdrqtail; i++) {
 887                 u32 qp;
 888                 u8 *bthbytes;
 889
 890                 rc = (u64 *) (dd->ipath_pd[0]->port_rcvhdrq + (l << 2));
 891                 hdr = (struct ipath_message_header *)&rc[1];
 892                 /*
 893                  * could make a network order version of IPATH_KD_QP, and
 894                  * do the obvious shift before masking to speed this up.
 895                  */
 896                 qp = ntohl(hdr->bth[1]) & 0xffffff;
 897                 bthbytes = (u8 *) hdr->bth;
 898
 899                 eflags = ipath_hdrget_err_flags((__le32 *) rc);
 900                 etype = ipath_hdrget_rcv_type((__le32 *) rc);
 901                 /* total length */
 902                 tlen = ipath_hdrget_length_in_bytes((__le32 *) rc);
 903                 ebuf = NULL;
 904                 if (etype != RCVHQ_RCV_TYPE_EXPECTED) {
 905                         /*
 906                          * it turns out that the chips uses an eager buffer
 907                          * for all non-expected packets, whether it "needs"
 908                          * one or not.  So always get the index, but don't
 909                          * set ebuf (so we try to copy data) unless the
 910                          * length requires it.
 911                          */
 912                         etail = ipath_hdrget_index((__le32 *) rc);
 913                         if (tlen > sizeof(*hdr) ||
 914                             etype == RCVHQ_RCV_TYPE_NON_KD)
 915                                 ebuf = ipath_get_egrbuf(dd, etail, 0);
 916                 }
 917
 918                 /*
 919                  * both tiderr and ipathhdrerr are set for all plain IB
 920                  * packets; only ipathhdrerr should be set.
 921                  */
 922
 923                 if (etype != RCVHQ_RCV_TYPE_NON_KD && etype !=
 924                     RCVHQ_RCV_TYPE_ERROR && ipath_hdrget_ipath_ver(
 925                             hdr->iph.ver_port_tid_offset) !=
 926                     IPS_PROTO_VERSION) {
 927                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
 928                                    "%x\n", etype);
 929                 }
 930
 931                 if (unlikely(eflags))
 932                         ipath_rcv_hdrerr(dd, eflags, l, etail, rc);
 933                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
 934                         ipath_ib_rcv(dd->verbs_dev, rc + 1, ebuf, tlen);
 935                         if (dd->ipath_lli_counter)
 936                                 dd->ipath_lli_counter--;
 937                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
 938                                    "qp=%x), len %x; ignored\n",
 939                                    etype, bthbytes[0], qp, tlen);
 940                 }
 941                 else if (etype == RCVHQ_RCV_TYPE_EAGER)
 942                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
 943                                    "qp=%x), len %x; ignored\n",
 944                                    etype, bthbytes[0], qp, tlen);
 945                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
 946                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
 947                                   be32_to_cpu(hdr->bth[0]) & 0xff);
 948                 else {
 949                         /*
 950                          * error packet, type of error  unknown.
 951                          * Probably type 3, but we don't know, so don't
 952                          * even try to print the opcode, etc.
 953                          */
 954                         ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
 955                                   "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
 956                                   "hdr %llx %llx %llx %llx %llx\n",
 957                                   etail, tlen, (unsigned long) rc, l,
 958                                   (unsigned long long) rc[0],
 959                                   (unsigned long long) rc[1],
 960                                   (unsigned long long) rc[2],
 961                                   (unsigned long long) rc[3],
 962                                   (unsigned long long) rc[4],
 963                                   (unsigned long long) rc[5]);
 964                 }
 965                 l += rsize;
 966                 if (l >= maxcnt)
 967                         l = 0;
 968                 if (etype != RCVHQ_RCV_TYPE_EXPECTED)
 969                     updegr = 1;
 970                 /*
 971                  * update head regs on last packet, and every 16 packets.
 972                  * Reduce bus traffic, while still trying to prevent
 973                  * rcvhdrq overflows, for when the queue is nearly full
 974                  */
 975                 if (l == hdrqtail || (i && !(i&0xf))) {
 976                         u64 lval;
 977                         if (l == hdrqtail)
 978                                 /* request IBA6120 interrupt only on last */
 979                                 lval = dd->ipath_rhdrhead_intr_off | l;
 980                         else
 981                                 lval = l;
 982                         (void)ipath_write_ureg(dd, ur_rcvhdrhead, lval, 0);
 983                         if (updegr) {
 984                                 (void)ipath_write_ureg(dd, ur_rcvegrindexhead,
 985                                                        etail, 0);
 986                                 updegr = 0;
 987                         }
 988                 }
 989         }
 990
 991         if (!dd->ipath_rhdrhead_intr_off && !reloop) {
 992                 /* IBA6110 workaround; we can have a race clearing chip
 993                  * interrupt with another interrupt about to be delivered,
 994                  * and can clear it before it is delivered on the GPIO
 995                  * workaround.  By doing the extra check here for the
 996                  * in-memory tail register updating while we were doing
 997                  * earlier packets, we "almost" guarantee we have covered
 998                  * that case.
 999                  */
1000                 u32 hqtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr);
1001                 if (hqtail != hdrqtail) {
1002                         hdrqtail = hqtail;
1003                         reloop = 1; /* loop 1 extra time at most */
1004                         goto reloop;
1005                 }
1006         }
1007
1008         pkttot += i;
1009
1010         dd->ipath_port0head = l;
1011
1012         if (pkttot > ipath_stats.sps_maxpkts_call)
1013                 ipath_stats.sps_maxpkts_call = pkttot;
1014         ipath_stats.sps_port0pkts += pkttot;
1015         ipath_stats.sps_avgpkts_call =
1016                 ipath_stats.sps_port0pkts / ++totcalls;
1017
1018 done:
1019         clear_bit(0, &dd->ipath_rcv_pending);
1020         smp_mb__after_clear_bit();
1021
1022 bail:;
1023 }
1024
1025 /**
1026  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1027  * @dd: the infinipath device
1028  *
1029  * called whenever our local copy indicates we have run out of send buffers
1030  * NOTE: This can be called from interrupt context by some code
1031  * and from non-interrupt context by ipath_getpiobuf().
1032  */
1033
1034 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1035 {
1036         unsigned long flags;
1037         int i;
1038         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1039
1040         /* If the generation (check) bits have changed, then we update the
1041          * busy bit for the corresponding PIO buffer.  This algorithm will
1042          * modify positions to the value they already have in some cases
1043          * (i.e., no change), but it's faster than changing only the bits
1044          * that have changed.
1045          *
1046          * We would like to do this atomicly, to avoid spinlocks in the
1047          * critical send path, but that's not really possible, given the
1048          * type of changes, and that this routine could be called on
1049          * multiple cpu's simultaneously, so we lock in this routine only,
1050          * to avoid conflicting updates; all we change is the shadow, and
1051          * it's a single 64 bit memory location, so by definition the update
1052          * is atomic in terms of what other cpu's can see in testing the
1053          * bits.  The spin_lock overhead isn't too bad, since it only
1054          * happens when all buffers are in use, so only cpu overhead, not
1055          * latency or bandwidth is affected.
1056          */
1057 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1058         if (!dd->ipath_pioavailregs_dma) {
1059                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1060                 return;
1061         }
1062         if (ipath_debug & __IPATH_VERBDBG) {
1063                 /* only if packet debug and verbose */
1064                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1065                 unsigned long *shadow = dd->ipath_pioavailshadow;
1066
1067                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1068                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1069                            "s3=%lx\n",
1070                            (unsigned long long) le64_to_cpu(dma[0]),
1071                            shadow[0],
1072                            (unsigned long long) le64_to_cpu(dma[1]),
1073                            shadow[1],
1074                            (unsigned long long) le64_to_cpu(dma[2]),
1075                            shadow[2],
1076                            (unsigned long long) le64_to_cpu(dma[3]),
1077                            shadow[3]);
1078                 if (piobregs > 4)
1079                         ipath_cdbg(
1080                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1081                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1082                                 "d7=%llx s7=%lx\n",
1083                                 (unsigned long long) le64_to_cpu(dma[4]),
1084                                 shadow[4],
1085                                 (unsigned long long) le64_to_cpu(dma[5]),
1086                                 shadow[5],
1087                                 (unsigned long long) le64_to_cpu(dma[6]),
1088                                 shadow[6],
1089                                 (unsigned long long) le64_to_cpu(dma[7]),
1090                                 shadow[7]);
1091         }
1092         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1093         for (i = 0; i < piobregs; i++) {
1094                 u64 pchbusy, pchg, piov, pnew;
1095                 /*
1096                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1097                  */
1098                 if (i > 3) {
1099                         if (i & 1)
1100                                 piov = le64_to_cpu(
1101                                         dd->ipath_pioavailregs_dma[i - 1]);
1102                         else
1103                                 piov = le64_to_cpu(
1104                                         dd->ipath_pioavailregs_dma[i + 1]);
1105                 } else
1106                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1107                 pchg = _IPATH_ALL_CHECKBITS &
1108                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1109                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1110                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1111                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1112                         pnew |= piov & pchbusy;
1113                         dd->ipath_pioavailshadow[i] = pnew;
1114                 }
1115         }
1116         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1117 }
1118
1119 /**
1120  * ipath_setrcvhdrsize - set the receive header size
1121  * @dd: the infinipath device
1122  * @rhdrsize: the receive header size
1123  *
1124  * called from user init code, and also layered driver init
1125  */
1126 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1127 {
1128         int ret = 0;
1129
1130         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1131                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1132                         dev_info(&dd->pcidev->dev,
1133                                  "Error: can't set protocol header "
1134                                  "size %u, already %u\n",
1135                                  rhdrsize, dd->ipath_rcvhdrsize);
1136                         ret = -EAGAIN;
1137                 } else
1138                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1139                                    "size %u\n", dd->ipath_rcvhdrsize);
1140         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1141                                (sizeof(u64) / sizeof(u32)))) {
1142                 ipath_dbg("Error: can't set protocol header size %u "
1143                           "(> max %u)\n", rhdrsize,
1144                           dd->ipath_rcvhdrentsize -
1145                           (u32) (sizeof(u64) / sizeof(u32)));
1146                 ret = -EOVERFLOW;
1147         } else {
1148                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1149                 dd->ipath_rcvhdrsize = rhdrsize;
1150                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1151                                  dd->ipath_rcvhdrsize);
1152                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1153                            dd->ipath_rcvhdrsize);
1154         }
1155         return ret;
1156 }
1157
1158 /**
1159  * ipath_getpiobuf - find an available pio buffer
1160  * @dd: the infinipath device
1161  * @pbufnum: the buffer number is placed here
1162  *
1163  * do appropriate marking as busy, etc.
1164  * returns buffer number if one found (>=0), negative number is error.
1165  * Used by ipath_layer_send
1166  */
1167 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 * pbufnum)
1168 {
1169         int i, j, starti, updated = 0;
1170         unsigned piobcnt, iter;
1171         unsigned long flags;
1172         unsigned long *shadow = dd->ipath_pioavailshadow;
1173         u32 __iomem *buf;
1174
1175         piobcnt = (unsigned)(dd->ipath_piobcnt2k
1176                              + dd->ipath_piobcnt4k);
1177         starti = dd->ipath_lastport_piobuf;
1178         iter = piobcnt - starti;
1179         if (dd->ipath_upd_pio_shadow) {
1180                 /*
1181                  * Minor optimization.  If we had no buffers on last call,
1182                  * start out by doing the update; continue and do scan even
1183                  * if no buffers were updated, to be paranoid
1184                  */
1185                 ipath_update_pio_bufs(dd);
1186                 /* we scanned here, don't do it at end of scan */
1187                 updated = 1;
1188                 i = starti;
1189         } else
1190                 i = dd->ipath_lastpioindex;
1191
1192 rescan:
1193         /*
1194          * while test_and_set_bit() is atomic, we do that and then the
1195          * change_bit(), and the pair is not.  See if this is the cause
1196          * of the remaining armlaunch errors.
1197          */
1198         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1199         for (j = 0; j < iter; j++, i++) {
1200                 if (i >= piobcnt)
1201                         i = starti;
1202                 /*
1203                  * To avoid bus lock overhead, we first find a candidate
1204                  * buffer, then do the test and set, and continue if that
1205                  * fails.
1206                  */
1207                 if (test_bit((2 * i) + 1, shadow) ||
1208                     test_and_set_bit((2 * i) + 1, shadow))
1209                         continue;
1210                 /* flip generation bit */
1211                 change_bit(2 * i, shadow);
1212                 break;
1213         }
1214         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1215
1216         if (j == iter) {
1217                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1218
1219                 /*
1220                  * first time through; shadow exhausted, but may be real
1221                  * buffers available, so go see; if any updated, rescan
1222                  * (once)
1223                  */
1224                 if (!updated) {
1225                         ipath_update_pio_bufs(dd);
1226                         updated = 1;
1227                         i = starti;
1228                         goto rescan;
1229                 }
1230                 dd->ipath_upd_pio_shadow = 1;
1231                 /*
1232                  * not atomic, but if we lose one once in a while, that's OK
1233                  */
1234                 ipath_stats.sps_nopiobufs++;
1235                 if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1236                         ipath_dbg(
1237                                 "%u pio sends with no bufavail; dmacopy: "
1238                                 "%llx %llx %llx %llx; shadow:  "
1239                                 "%lx %lx %lx %lx\n",
1240                                 dd->ipath_consec_nopiobuf,
1241                                 (unsigned long long) le64_to_cpu(dma[0]),
1242                                 (unsigned long long) le64_to_cpu(dma[1]),
1243                                 (unsigned long long) le64_to_cpu(dma[2]),
1244                                 (unsigned long long) le64_to_cpu(dma[3]),
1245                                 shadow[0], shadow[1], shadow[2],
1246                                 shadow[3]);
1247                         /*
1248                          * 4 buffers per byte, 4 registers above, cover rest
1249                          * below
1250                          */
1251                         if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1252                             (sizeof(shadow[0]) * 4 * 4))
1253                                 ipath_dbg("2nd group: dmacopy: %llx %llx "
1254                                           "%llx %llx; shadow: %lx %lx "
1255                                           "%lx %lx\n",
1256                                           (unsigned long long)
1257                                           le64_to_cpu(dma[4]),
1258                                           (unsigned long long)
1259                                           le64_to_cpu(dma[5]),
1260                                           (unsigned long long)
1261                                           le64_to_cpu(dma[6]),
1262                                           (unsigned long long)
1263                                           le64_to_cpu(dma[7]),
1264                                           shadow[4], shadow[5],
1265                                           shadow[6], shadow[7]);
1266                 }
1267                 buf = NULL;
1268                 goto bail;
1269         }
1270
1271         /*
1272          * set next starting place.  Since it's just an optimization,
1273          * it doesn't matter who wins on this, so no locking
1274          */
1275         dd->ipath_lastpioindex = i + 1;
1276         if (dd->ipath_upd_pio_shadow)
1277                 dd->ipath_upd_pio_shadow = 0;
1278         if (dd->ipath_consec_nopiobuf)
1279                 dd->ipath_consec_nopiobuf = 0;
1280         if (i < dd->ipath_piobcnt2k)
1281                 buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1282                                        i * dd->ipath_palign);
1283         else
1284                 buf = (u32 __iomem *)
1285                         (dd->ipath_pio4kbase +
1286                          (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1287         ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1288                    i, (i < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1289         if (pbufnum)
1290                 *pbufnum = i;
1291
1292 bail:
1293         return buf;
1294 }
1295
1296 /**
1297  * ipath_create_rcvhdrq - create a receive header queue
1298  * @dd: the infinipath device
1299  * @pd: the port data
1300  *
1301  * this must be contiguous memory (from an i/o perspective), and must be
1302  * DMA'able (which means for some systems, it will go through an IOMMU,
1303  * or be forced into a low address range).
1304  */
1305 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1306                          struct ipath_portdata *pd)
1307 {
1308         int ret = 0;
1309
1310         if (!pd->port_rcvhdrq) {
1311                 dma_addr_t phys_hdrqtail;
1312                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1313                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1314                                 sizeof(u32), PAGE_SIZE);
1315
1316                 pd->port_rcvhdrq = dma_alloc_coherent(
1317                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1318                         gfp_flags);
1319
1320                 if (!pd->port_rcvhdrq) {
1321                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1322                                       "for port %u rcvhdrq failed\n",
1323                                       amt, pd->port_port);
1324                         ret = -ENOMEM;
1325                         goto bail;
1326                 }
1327                 pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1328                         &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, GFP_KERNEL);
1329                 if (!pd->port_rcvhdrtail_kvaddr) {
1330                         ipath_dev_err(dd, "attempt to allocate 1 page "
1331                                       "for port %u rcvhdrqtailaddr failed\n",
1332                                       pd->port_port);
1333                         ret = -ENOMEM;
1334                         dma_free_coherent(&dd->pcidev->dev, amt,
1335                                           pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
1336                         pd->port_rcvhdrq = NULL;
1337                         goto bail;
1338                 }
1339                 pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1340
1341                 pd->port_rcvhdrq_size = amt;
1342
1343                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1344                            "for port %u rcvhdr Q\n",
1345                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1346                            (unsigned long) pd->port_rcvhdrq_phys,
1347                            (unsigned long) pd->port_rcvhdrq_size,
1348                            pd->port_port);
1349
1350                 ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx physical\n",
1351                            pd->port_port,
1352                            (unsigned long long) phys_hdrqtail);
1353         }
1354         else
1355                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1356                            "hdrtailaddr@%p %llx physical\n",
1357                            pd->port_port, pd->port_rcvhdrq,
1358                            pd->port_rcvhdrq_phys, pd->port_rcvhdrtail_kvaddr,
1359                            (unsigned long long)pd->port_rcvhdrqtailaddr_phys);
1360
1361         /* clear for security and sanity on each use */
1362         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1363         memset((void *)pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1364
1365         /*
1366          * tell chip each time we init it, even if we are re-using previous
1367          * memory (we zero the register at process close)
1368          */
1369         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1370                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1371         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1372                               pd->port_port, pd->port_rcvhdrq_phys);
1373
1374         ret = 0;
1375 bail:
1376         return ret;
1377 }
1378
1379 int ipath_waitfor_complete(struct ipath_devdata *dd, ipath_kreg reg_id,
1380                            u64 bits_to_wait_for, u64 * valp)
1381 {
1382         unsigned long timeout;
1383         u64 lastval, val;
1384         int ret;
1385
1386         lastval = ipath_read_kreg64(dd, reg_id);
1387         /* wait a ridiculously long time */
1388         timeout = jiffies + msecs_to_jiffies(5);
1389         do {
1390                 val = ipath_read_kreg64(dd, reg_id);
1391                 /* set so they have something, even on failures. */
1392                 *valp = val;
1393                 if ((val & bits_to_wait_for) == bits_to_wait_for) {
1394                         ret = 0;
1395                         break;
1396                 }
1397                 if (val != lastval)
1398                         ipath_cdbg(VERBOSE, "Changed from %llx to %llx, "
1399                                    "waiting for %llx bits\n",
1400                                    (unsigned long long) lastval,
1401                                    (unsigned long long) val,
1402                                    (unsigned long long) bits_to_wait_for);
1403                 cond_resched();
1404                 if (time_after(jiffies, timeout)) {
1405                         ipath_dbg("Didn't get bits %llx in register 0x%x, "
1406                                   "got %llx\n",
1407                                   (unsigned long long) bits_to_wait_for,
1408                                   reg_id, (unsigned long long) *valp);
1409                         ret = -ENODEV;
1410                         break;
1411                 }
1412         } while (1);
1413
1414         return ret;
1415 }
1416
1417 /**
1418  * ipath_waitfor_mdio_cmdready - wait for last command to complete
1419  * @dd: the infinipath device
1420  *
1421  * Like ipath_waitfor_complete(), but we wait for the CMDVALID bit to go
1422  * away indicating the last command has completed.  It doesn't return data
1423  */
1424 int ipath_waitfor_mdio_cmdready(struct ipath_devdata *dd)
1425 {
1426         unsigned long timeout;
1427         u64 val;
1428         int ret;
1429
1430         /* wait a ridiculously long time */
1431         timeout = jiffies + msecs_to_jiffies(5);
1432         do {
1433                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_mdio);
1434                 if (!(val & IPATH_MDIO_CMDVALID)) {
1435                         ret = 0;
1436                         break;
1437                 }
1438                 cond_resched();
1439                 if (time_after(jiffies, timeout)) {
1440                         ipath_dbg("CMDVALID stuck in mdio reg? (%llx)\n",
1441                                   (unsigned long long) val);
1442                         ret = -ENODEV;
1443                         break;
1444                 }
1445         } while (1);
1446
1447         return ret;
1448 }
1449
1450 static void ipath_set_ib_lstate(struct ipath_devdata *dd, int which)
1451 {
1452         static const char *what[4] = {
1453                 [0] = "DOWN",
1454                 [INFINIPATH_IBCC_LINKCMD_INIT] = "INIT",
1455                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1456                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1457         };
1458         int linkcmd = (which >> INFINIPATH_IBCC_LINKCMD_SHIFT) &
1459                         INFINIPATH_IBCC_LINKCMD_MASK;
1460
1461         ipath_cdbg(VERBOSE, "Trying to move unit %u to %s, current ltstate "
1462                    "is %s\n", dd->ipath_unit,
1463                    what[linkcmd],
1464                    ipath_ibcstatus_str[
1465                            (ipath_read_kreg64
1466                             (dd, dd->ipath_kregs->kr_ibcstatus) >>
1467                             INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1468                            INFINIPATH_IBCS_LINKTRAININGSTATE_MASK]);
1469         /* flush all queued sends when going to DOWN or INIT, to be sure that
1470          * they don't block MAD packets */
1471         if (!linkcmd || linkcmd == INFINIPATH_IBCC_LINKCMD_INIT) {
1472                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1473                                  INFINIPATH_S_ABORT);
1474                 ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf,
1475                                     (unsigned)(dd->ipath_piobcnt2k +
1476                                     dd->ipath_piobcnt4k) -
1477                                     dd->ipath_lastport_piobuf);
1478         }
1479
1480         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1481                          dd->ipath_ibcctrl | which);
1482 }
1483
1484 int ipath_set_linkstate(struct ipath_devdata *dd, u8 newstate)
1485 {
1486         u32 lstate;
1487         int ret;
1488
1489         switch (newstate) {
1490         case IPATH_IB_LINKDOWN:
1491                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_POLL <<
1492                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1493                 /* don't wait */
1494                 ret = 0;
1495                 goto bail;
1496
1497         case IPATH_IB_LINKDOWN_SLEEP:
1498                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_SLEEP <<
1499                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1500                 /* don't wait */
1501                 ret = 0;
1502                 goto bail;
1503
1504         case IPATH_IB_LINKDOWN_DISABLE:
1505                 ipath_set_ib_lstate(dd,
1506                                     INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
1507                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1508                 /* don't wait */
1509                 ret = 0;
1510                 goto bail;
1511
1512         case IPATH_IB_LINKINIT:
1513                 if (dd->ipath_flags & IPATH_LINKINIT) {
1514                         ret = 0;
1515                         goto bail;
1516                 }
1517                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_INIT <<
1518                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1519                 lstate = IPATH_LINKINIT;
1520                 break;
1521
1522         case IPATH_IB_LINKARM:
1523                 if (dd->ipath_flags & IPATH_LINKARMED) {
1524                         ret = 0;
1525                         goto bail;
1526                 }
1527                 if (!(dd->ipath_flags &
1528                       (IPATH_LINKINIT | IPATH_LINKACTIVE))) {
1529                         ret = -EINVAL;
1530                         goto bail;
1531                 }
1532                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ARMED <<
1533                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1534                 /*
1535                  * Since the port can transition to ACTIVE by receiving
1536                  * a non VL 15 packet, wait for either state.
1537                  */
1538                 lstate = IPATH_LINKARMED | IPATH_LINKACTIVE;
1539                 break;
1540
1541         case IPATH_IB_LINKACTIVE:
1542                 if (dd->ipath_flags & IPATH_LINKACTIVE) {
1543                         ret = 0;
1544                         goto bail;
1545                 }
1546                 if (!(dd->ipath_flags & IPATH_LINKARMED)) {
1547                         ret = -EINVAL;
1548                         goto bail;
1549                 }
1550                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ACTIVE <<
1551                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1552                 lstate = IPATH_LINKACTIVE;
1553                 break;
1554
1555         default:
1556                 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate);
1557                 ret = -EINVAL;
1558                 goto bail;
1559         }
1560         ret = ipath_wait_linkstate(dd, lstate, 2000);
1561
1562 bail:
1563         return ret;
1564 }
1565
1566 /**
1567  * ipath_set_mtu - set the MTU
1568  * @dd: the infinipath device
1569  * @arg: the new MTU
1570  *
1571  * we can handle "any" incoming size, the issue here is whether we
1572  * need to restrict our outgoing size.   For now, we don't do any
1573  * sanity checking on this, and we don't deal with what happens to
1574  * programs that are already running when the size changes.
1575  * NOTE: changing the MTU will usually cause the IBC to go back to
1576  * link initialize (IPATH_IBSTATE_INIT) state...
1577  */
1578 int ipath_set_mtu(struct ipath_devdata *dd, u16 arg)
1579 {
1580         u32 piosize;
1581         int changed = 0;
1582         int ret;
1583
1584         /*
1585          * mtu is IB data payload max.  It's the largest power of 2 less
1586          * than piosize (or even larger, since it only really controls the
1587          * largest we can receive; we can send the max of the mtu and
1588          * piosize).  We check that it's one of the valid IB sizes.
1589          */
1590         if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
1591             arg != 4096) {
1592                 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg);
1593                 ret = -EINVAL;
1594                 goto bail;
1595         }
1596         if (dd->ipath_ibmtu == arg) {
1597                 ret = 0;        /* same as current */
1598                 goto bail;
1599         }
1600
1601         piosize = dd->ipath_ibmaxlen;
1602         dd->ipath_ibmtu = arg;
1603
1604         if (arg >= (piosize - IPATH_PIO_MAXIBHDR)) {
1605                 /* Only if it's not the initial value (or reset to it) */
1606                 if (piosize != dd->ipath_init_ibmaxlen) {
1607                         dd->ipath_ibmaxlen = piosize;
1608                         changed = 1;
1609                 }
1610         } else if ((arg + IPATH_PIO_MAXIBHDR) != dd->ipath_ibmaxlen) {
1611                 piosize = arg + IPATH_PIO_MAXIBHDR;
1612                 ipath_cdbg(VERBOSE, "ibmaxlen was 0x%x, setting to 0x%x "
1613                            "(mtu 0x%x)\n", dd->ipath_ibmaxlen, piosize,
1614                            arg);
1615                 dd->ipath_ibmaxlen = piosize;
1616                 changed = 1;
1617         }
1618
1619         if (changed) {
1620                 /*
1621                  * set the IBC maxpktlength to the size of our pio
1622                  * buffers in words
1623                  */
1624                 u64 ibc = dd->ipath_ibcctrl;
1625                 ibc &= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK <<
1626                          INFINIPATH_IBCC_MAXPKTLEN_SHIFT);
1627
1628                 piosize = piosize - 2 * sizeof(u32);    /* ignore pbc */
1629                 dd->ipath_ibmaxlen = piosize;
1630                 piosize /= sizeof(u32); /* in words */
1631                 /*
1632                  * for ICRC, which we only send in diag test pkt mode, and
1633                  * we don't need to worry about that for mtu
1634                  */
1635                 piosize += 1;
1636
1637                 ibc |= piosize << INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
1638                 dd->ipath_ibcctrl = ibc;
1639                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1640                                  dd->ipath_ibcctrl);
1641                 dd->ipath_f_tidtemplate(dd);
1642         }
1643
1644         ret = 0;
1645
1646 bail:
1647         return ret;
1648 }
1649
1650 int ipath_set_lid(struct ipath_devdata *dd, u32 arg, u8 lmc)
1651 {
1652         dd->ipath_lid = arg;
1653         dd->ipath_lmc = lmc;
1654
1655         return 0;
1656 }
1657
1658 /**
1659  * ipath_read_kreg64_port - read a device's per-port 64-bit kernel register
1660  * @dd: the infinipath device
1661  * @regno: the register number to read
1662  * @port: the port containing the register
1663  *
1664  * Registers that vary with the chip implementation constants (port)
1665  * use this routine.
1666  */
1667 u64 ipath_read_kreg64_port(const struct ipath_devdata *dd, ipath_kreg regno,
1668                            unsigned port)
1669 {
1670         u16 where;
1671
1672         if (port < dd->ipath_portcnt &&
1673             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1674              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1675                 where = regno + port;
1676         else
1677                 where = -1;
1678
1679         return ipath_read_kreg64(dd, where);
1680 }
1681
1682 /**
1683  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1684  * @dd: the infinipath device
1685  * @regno: the register number to write
1686  * @port: the port containing the register
1687  * @value: the value to write
1688  *
1689  * Registers that vary with the chip implementation constants (port)
1690  * use this routine.
1691  */
1692 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
1693                           unsigned port, u64 value)
1694 {
1695         u16 where;
1696
1697         if (port < dd->ipath_portcnt &&
1698             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1699              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1700                 where = regno + port;
1701         else
1702                 where = -1;
1703
1704         ipath_write_kreg(dd, where, value);
1705 }
1706
1707 /**
1708  * ipath_shutdown_device - shut down a device
1709  * @dd: the infinipath device
1710  *
1711  * This is called to make the device quiet when we are about to
1712  * unload the driver, and also when the device is administratively
1713  * disabled.   It does not free any data structures.
1714  * Everything it does has to be setup again by ipath_init_chip(dd,1)
1715  */
1716 void ipath_shutdown_device(struct ipath_devdata *dd)
1717 {
1718         u64 val;
1719
1720         ipath_dbg("Shutting down the device\n");
1721
1722         dd->ipath_flags |= IPATH_LINKUNK;
1723         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
1724                              IPATH_LINKINIT | IPATH_LINKARMED |
1725                              IPATH_LINKACTIVE);
1726         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
1727                                 IPATH_STATUS_IB_READY);
1728
1729         /* mask interrupts, but not errors */
1730         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
1731
1732         dd->ipath_rcvctrl = 0;
1733         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
1734                          dd->ipath_rcvctrl);
1735
1736         /*
1737          * gracefully stop all sends allowing any in progress to trickle out
1738          * first.
1739          */
1740         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 0ULL);
1741         /* flush it */
1742         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1743         /*
1744          * enough for anything that's going to trickle out to have actually
1745          * done so.
1746          */
1747         udelay(5);
1748
1749         /*
1750          * abort any armed or launched PIO buffers that didn't go. (self
1751          * clearing).  Will cause any packet currently being transmitted to
1752          * go out with an EBP, and may also cause a short packet error on
1753          * the receiver.
1754          */
1755         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1756                          INFINIPATH_S_ABORT);
1757
1758         ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
1759                             INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1760
1761         /* disable IBC */
1762         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
1763         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1764                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
1765
1766         /*
1767          * clear SerdesEnable and turn the leds off; do this here because
1768          * we are unloading, so don't count on interrupts to move along
1769          * Turn the LEDs off explictly for the same reason.
1770          */
1771         dd->ipath_f_quiet_serdes(dd);
1772         dd->ipath_f_setextled(dd, 0, 0);
1773
1774         if (dd->ipath_stats_timer_active) {
1775                 del_timer_sync(&dd->ipath_stats_timer);
1776                 dd->ipath_stats_timer_active = 0;
1777         }
1778
1779         /*
1780          * clear all interrupts and errors, so that the next time the driver
1781          * is loaded or device is enabled, we know that whatever is set
1782          * happened while we were unloaded
1783          */
1784         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
1785                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
1786         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
1787         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
1788 }
1789
1790 /**
1791  * ipath_free_pddata - free a port's allocated data
1792  * @dd: the infinipath device
1793  * @pd: the portdata structure
1794  *
1795  * free up any allocated data for a port
1796  * This should not touch anything that would affect a simultaneous
1797  * re-allocation of port data, because it is called after ipath_mutex
1798  * is released (and can be called from reinit as well).
1799  * It should never change any chip state, or global driver state.
1800  * (The only exception to global state is freeing the port0 port0_skbs.)
1801  */
1802 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
1803 {
1804         if (!pd)
1805                 return;
1806
1807         if (pd->port_rcvhdrq) {
1808                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
1809                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
1810                            (unsigned long) pd->port_rcvhdrq_size);
1811                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
1812                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
1813                 pd->port_rcvhdrq = NULL;
1814                 if (pd->port_rcvhdrtail_kvaddr) {
1815                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1816                                          (void *)pd->port_rcvhdrtail_kvaddr,
1817                                          pd->port_rcvhdrqtailaddr_phys);
1818                         pd->port_rcvhdrtail_kvaddr = NULL;
1819                 }
1820         }
1821         if (pd->port_port && pd->port_rcvegrbuf) {
1822                 unsigned e;
1823
1824                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
1825                         void *base = pd->port_rcvegrbuf[e];
1826                         size_t size = pd->port_rcvegrbuf_size;
1827
1828                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
1829                                    "chunk %u/%u\n", base,
1830                                    (unsigned long) size,
1831                                    e, pd->port_rcvegrbuf_chunks);
1832                         dma_free_coherent(&dd->pcidev->dev, size,
1833                                 base, pd->port_rcvegrbuf_phys[e]);
1834                 }
1835                 kfree(pd->port_rcvegrbuf);
1836                 pd->port_rcvegrbuf = NULL;
1837                 kfree(pd->port_rcvegrbuf_phys);
1838                 pd->port_rcvegrbuf_phys = NULL;
1839                 pd->port_rcvegrbuf_chunks = 0;
1840         } else if (pd->port_port == 0 && dd->ipath_port0_skbs) {
1841                 unsigned e;
1842                 struct sk_buff **skbs = dd->ipath_port0_skbs;
1843
1844                 dd->ipath_port0_skbs = NULL;
1845                 ipath_cdbg(VERBOSE, "free closed port %d ipath_port0_skbs "
1846                            "@ %p\n", pd->port_port, skbs);
1847                 for (e = 0; e < dd->ipath_rcvegrcnt; e++)
1848                         if (skbs[e])
1849                                 dev_kfree_skb(skbs[e]);
1850                 vfree(skbs);
1851         }
1852         kfree(pd->port_tid_pg_list);
1853         vfree(pd->subport_uregbase);
1854         vfree(pd->subport_rcvegrbuf);
1855         vfree(pd->subport_rcvhdr_base);
1856         kfree(pd);
1857 }
1858
1859 static int __init infinipath_init(void)
1860 {
1861         int ret;
1862
1863         ipath_dbg(KERN_INFO DRIVER_LOAD_MSG "%s", ib_ipath_version);
1864
1865         /*
1866          * These must be called before the driver is registered with
1867          * the PCI subsystem.
1868          */
1869         idr_init(&unit_table);
1870         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
1871                 ret = -ENOMEM;
1872                 goto bail;
1873         }
1874
1875         ret = pci_register_driver(&ipath_driver);
1876         if (ret < 0) {
1877                 printk(KERN_ERR IPATH_DRV_NAME
1878                        ": Unable to register driver: error %d\n", -ret);
1879                 goto bail_unit;
1880         }
1881
1882         ret = ipath_driver_create_group(&ipath_driver.driver);
1883         if (ret < 0) {
1884                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create driver "
1885                        "sysfs entries: error %d\n", -ret);
1886                 goto bail_pci;
1887         }
1888
1889         ret = ipath_init_ipathfs();
1890         if (ret < 0) {
1891                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
1892                        "ipathfs: error %d\n", -ret);
1893                 goto bail_group;
1894         }
1895
1896         ret = ipath_diagpkt_add();
1897         if (ret < 0) {
1898                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
1899                        "diag data device: error %d\n", -ret);
1900                 goto bail_ipathfs;
1901         }
1902
1903         goto bail;
1904
1905 bail_ipathfs:
1906         ipath_exit_ipathfs();
1907
1908 bail_group:
1909         ipath_driver_remove_group(&ipath_driver.driver);
1910
1911 bail_pci:
1912         pci_unregister_driver(&ipath_driver);
1913
1914 bail_unit:
1915         idr_destroy(&unit_table);
1916
1917 bail:
1918         return ret;
1919 }
1920
1921 static void cleanup_device(struct ipath_devdata *dd)
1922 {
1923         int port;
1924
1925         ipath_shutdown_device(dd);
1926
1927         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
1928                 /* can't do anything more with chip; needs re-init */
1929                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
1930                 if (dd->ipath_kregbase) {
1931                         /*
1932                          * if we haven't already cleaned up before these are
1933                          * to ensure any register reads/writes "fail" until
1934                          * re-init
1935                          */
1936                         dd->ipath_kregbase = NULL;
1937                         dd->ipath_uregbase = 0;
1938                         dd->ipath_sregbase = 0;
1939                         dd->ipath_cregbase = 0;
1940                         dd->ipath_kregsize = 0;
1941                 }
1942                 ipath_disable_wc(dd);
1943         }
1944
1945         if (dd->ipath_pioavailregs_dma) {
1946                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1947                                   (void *) dd->ipath_pioavailregs_dma,
1948                                   dd->ipath_pioavailregs_phys);
1949                 dd->ipath_pioavailregs_dma = NULL;
1950         }
1951         if (dd->ipath_dummy_hdrq) {
1952                 dma_free_coherent(&dd->pcidev->dev,
1953                         dd->ipath_pd[0]->port_rcvhdrq_size,
1954                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
1955                 dd->ipath_dummy_hdrq = NULL;
1956         }
1957
1958         if (dd->ipath_pageshadow) {
1959                 struct page **tmpp = dd->ipath_pageshadow;
1960                 int i, cnt = 0;
1961
1962                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
1963                            "locked\n");
1964                 for (port = 0; port < dd->ipath_cfgports; port++) {
1965                         int port_tidbase = port * dd->ipath_rcvtidcnt;
1966                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
1967                         for (i = port_tidbase; i < maxtid; i++) {
1968                                 if (!tmpp[i])
1969                                         continue;
1970                                 ipath_release_user_pages(&tmpp[i], 1);
1971                                 tmpp[i] = NULL;
1972                                 cnt++;
1973                         }
1974                 }
1975                 if (cnt) {
1976                         ipath_stats.sps_pageunlocks += cnt;
1977                         ipath_cdbg(VERBOSE, "There were still %u expTID "
1978                                    "entries locked\n", cnt);
1979                 }
1980                 if (ipath_stats.sps_pagelocks ||
1981                     ipath_stats.sps_pageunlocks)
1982                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
1983                                    "unlocked via ipath_m{un}lock\n",
1984                                    (unsigned long long)
1985                                    ipath_stats.sps_pagelocks,
1986                                    (unsigned long long)
1987                                    ipath_stats.sps_pageunlocks);
1988
1989                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
1990                            dd->ipath_pageshadow);
1991                 vfree(dd->ipath_pageshadow);
1992                 dd->ipath_pageshadow = NULL;
1993         }
1994
1995         /*
1996          * free any resources still in use (usually just kernel ports)
1997          * at unload; we do for portcnt, not cfgports, because cfgports
1998          * could have changed while we were loaded.
1999          */
2000         for (port = 0; port < dd->ipath_portcnt; port++) {
2001                 struct ipath_portdata *pd = dd->ipath_pd[port];
2002                 dd->ipath_pd[port] = NULL;
2003                 ipath_free_pddata(dd, pd);
2004         }
2005         kfree(dd->ipath_pd);
2006         /*
2007          * debuggability, in case some cleanup path tries to use it
2008          * after this
2009          */
2010         dd->ipath_pd = NULL;
2011 }
2012
2013 static void __exit infinipath_cleanup(void)
2014 {
2015         struct ipath_devdata *dd, *tmp;
2016         unsigned long flags;
2017
2018         ipath_diagpkt_remove();
2019
2020         ipath_exit_ipathfs();
2021
2022         ipath_driver_remove_group(&ipath_driver.driver);
2023
2024         spin_lock_irqsave(&ipath_devs_lock, flags);
2025
2026         /*
2027          * turn off rcv, send, and interrupts for all ports, all drivers
2028          * should also hard reset the chip here?
2029          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
2030          * for all versions of the driver, if they were allocated
2031          */
2032         list_for_each_entry_safe(dd, tmp, &ipath_dev_list, ipath_list) {
2033                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
2034
2035                 if (dd->verbs_dev) {
2036                         ipath_unregister_ib_device(dd->verbs_dev);
2037                         dd->verbs_dev = NULL;
2038                 }
2039
2040                 if (dd->ipath_kregbase)
2041                         cleanup_device(dd);
2042
2043                 if (dd->pcidev) {
2044                         if (dd->pcidev->irq) {
2045                                 ipath_cdbg(VERBOSE,
2046                                            "unit %u free_irq of irq %x\n",
2047                                            dd->ipath_unit, dd->pcidev->irq);
2048                                 free_irq(dd->pcidev->irq, dd);
2049                         } else
2050                                 ipath_dbg("irq is 0, not doing free_irq "
2051                                           "for unit %u\n", dd->ipath_unit);
2052
2053                         /*
2054                          * we check for NULL here, because it's outside
2055                          * the kregbase check, and we need to call it
2056                          * after the free_irq.  Thus it's possible that
2057                          * the function pointers were never initialized.
2058                          */
2059                         if (dd->ipath_f_cleanup)
2060                                 /* clean up chip-specific stuff */
2061                                 dd->ipath_f_cleanup(dd);
2062
2063                         dd->pcidev = NULL;
2064                 }
2065                 spin_lock_irqsave(&ipath_devs_lock, flags);
2066         }
2067
2068         spin_unlock_irqrestore(&ipath_devs_lock, flags);
2069
2070         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
2071         pci_unregister_driver(&ipath_driver);
2072
2073         idr_destroy(&unit_table);
2074 }
2075
2076 /**
2077  * ipath_reset_device - reset the chip if possible
2078  * @unit: the device to reset
2079  *
2080  * Whether or not reset is successful, we attempt to re-initialize the chip
2081  * (that is, much like a driver unload/reload).  We clear the INITTED flag
2082  * so that the various entry points will fail until we reinitialize.  For
2083  * now, we only allow this if no user ports are open that use chip resources
2084  */
2085 int ipath_reset_device(int unit)
2086 {
2087         int ret, i;
2088         struct ipath_devdata *dd = ipath_lookup(unit);
2089
2090         if (!dd) {
2091                 ret = -ENODEV;
2092                 goto bail;
2093         }
2094
2095         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
2096
2097         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
2098                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
2099                          "not initialized or not present\n", unit);
2100                 ret = -ENXIO;
2101                 goto bail;
2102         }
2103
2104         if (dd->ipath_pd)
2105                 for (i = 1; i < dd->ipath_cfgports; i++) {
2106                         if (dd->ipath_pd[i] && dd->ipath_pd[i]->port_cnt) {
2107                                 ipath_dbg("unit %u port %d is in use "
2108                                           "(PID %u cmd %s), can't reset\n",
2109                                           unit, i,
2110                                           dd->ipath_pd[i]->port_pid,
2111                                           dd->ipath_pd[i]->port_comm);
2112                                 ret = -EBUSY;
2113                                 goto bail;
2114                         }
2115                 }
2116
2117         dd->ipath_flags &= ~IPATH_INITTED;
2118         ret = dd->ipath_f_reset(dd);
2119         if (ret != 1)
2120                 ipath_dbg("reset was not successful\n");
2121         ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
2122                   unit);
2123         ret = ipath_init_chip(dd, 1);
2124         if (ret)
2125                 ipath_dev_err(dd, "Reinitialize unit %u after "
2126                               "reset failed with %d\n", unit, ret);
2127         else
2128                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
2129                          "resetting\n", unit);
2130
2131 bail:
2132         return ret;
2133 }
2134
2135 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv)
2136 {
2137         u64 val;
2138         if ( new_pol_inv > INFINIPATH_XGXS_RX_POL_MASK ) {
2139                 return -1;
2140         }
2141         if ( dd->ipath_rx_pol_inv != new_pol_inv ) {
2142                 dd->ipath_rx_pol_inv = new_pol_inv;
2143                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
2144                 val &= ~(INFINIPATH_XGXS_RX_POL_MASK <<
2145                          INFINIPATH_XGXS_RX_POL_SHIFT);
2146                 val |= ((u64)dd->ipath_rx_pol_inv) <<
2147                         INFINIPATH_XGXS_RX_POL_SHIFT;
2148                 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
2149         }
2150         return 0;
2151 }
2152 module_init(infinipath_init);
2153 module_exit(infinipath_cleanup);