drivers/infiniband/hw/ipath/ipath_init_chip.c

   1 /*
   2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/pci.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/vmalloc.h>
  37
  38 #include "ipath_kernel.h"
  39 #include "ipath_common.h"
  40
  41 /*
  42  * min buffers we want to have per port, after driver
  43  */
  44 #define IPATH_MIN_USER_PORT_BUFCNT 8
  45
  46 /*
  47  * Number of ports we are configured to use (to allow for more pio
  48  * buffers per port, etc.)  Zero means use chip value.
  49  */
  50 static ushort ipath_cfgports;
  51
  52 module_param_named(cfgports, ipath_cfgports, ushort, S_IRUGO);
  53 MODULE_PARM_DESC(cfgports, "Set max number of ports to use");
  54
  55 /*
  56  * Number of buffers reserved for driver (verbs and layered drivers.)
  57  * Reserved at end of buffer list.   Initialized based on
  58  * number of PIO buffers if not set via module interface.
  59  * The problem with this is that it's global, but we'll use different
  60  * numbers for different chip types.  So the default value is not
  61  * very useful.  I've redefined it for the 1.3 release so that it's
  62  * zero unless set by the user to something else, in which case we
  63  * try to respect it.
  64  */
  65 static ushort ipath_kpiobufs;
  66
  67 static int ipath_set_kpiobufs(const char *val, struct kernel_param *kp);
  68
  69 module_param_call(kpiobufs, ipath_set_kpiobufs, param_get_ushort,
  70                   &ipath_kpiobufs, S_IWUSR | S_IRUGO);
  71 MODULE_PARM_DESC(kpiobufs, "Set number of PIO buffers for driver");
  72
  73 /**
  74  * create_port0_egr - allocate the eager TID buffers
  75  * @dd: the infinipath device
  76  *
  77  * This code is now quite different for user and kernel, because
  78  * the kernel uses skb's, for the accelerated network performance.
  79  * This is the kernel (port0) version.
  80  *
  81  * Allocate the eager TID buffers and program them into infinipath.
  82  * We use the network layer alloc_skb() allocator to allocate the
  83  * memory, and either use the buffers as is for things like verbs
  84  * packets, or pass the buffers up to the ipath layered driver and
  85  * thence the network layer, replacing them as we do so (see
  86  * ipath_rcv_layer()).
  87  */
  88 static int create_port0_egr(struct ipath_devdata *dd)
  89 {
  90         unsigned e, egrcnt;
  91         struct ipath_skbinfo *skbinfo;
  92         int ret;
  93
  94         egrcnt = dd->ipath_p0_rcvegrcnt;
  95
  96         skbinfo = vmalloc(sizeof(*dd->ipath_port0_skbinfo) * egrcnt);
  97         if (skbinfo == NULL) {
  98                 ipath_dev_err(dd, "allocation error for eager TID "
  99                               "skb array\n");
 100                 ret = -ENOMEM;
 101                 goto bail;
 102         }
 103         for (e = 0; e < egrcnt; e++) {
 104                 /*
 105                  * This is a bit tricky in that we allocate extra
 106                  * space for 2 bytes of the 14 byte ethernet header.
 107                  * These two bytes are passed in the ipath header so
 108                  * the rest of the data is word aligned.  We allocate
 109                  * 4 bytes so that the data buffer stays word aligned.
 110                  * See ipath_kreceive() for more details.
 111                  */
 112                 skbinfo[e].skb = ipath_alloc_skb(dd, GFP_KERNEL);
 113                 if (!skbinfo[e].skb) {
 114                         ipath_dev_err(dd, "SKB allocation error for "
 115                                       "eager TID %u\n", e);
 116                         while (e != 0)
 117                                 dev_kfree_skb(skbinfo[--e].skb);
 118                         vfree(skbinfo);
 119                         ret = -ENOMEM;
 120                         goto bail;
 121                 }
 122         }
 123         /*
 124          * After loop above, so we can test non-NULL to see if ready
 125          * to use at receive, etc.
 126          */
 127         dd->ipath_port0_skbinfo = skbinfo;
 128
 129         for (e = 0; e < egrcnt; e++) {
 130                 dd->ipath_port0_skbinfo[e].phys =
 131                   ipath_map_single(dd->pcidev,
 132                                    dd->ipath_port0_skbinfo[e].skb->data,
 133                                    dd->ipath_ibmaxlen, PCI_DMA_FROMDEVICE);
 134                 dd->ipath_f_put_tid(dd, e + (u64 __iomem *)
 135                                     ((char __iomem *) dd->ipath_kregbase +
 136                                      dd->ipath_rcvegrbase),
 137                                     RCVHQ_RCV_TYPE_EAGER,
 138                                     dd->ipath_port0_skbinfo[e].phys);
 139         }
 140
 141         ret = 0;
 142
 143 bail:
 144         return ret;
 145 }
 146
 147 static int bringup_link(struct ipath_devdata *dd)
 148 {
 149         u64 val, ibc;
 150         int ret = 0;
 151
 152         /* hold IBC in reset */
 153         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
 154         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
 155                          dd->ipath_control);
 156
 157         /*
 158          * set initial max size pkt IBC will send, including ICRC; it's the
 159          * PIO buffer size in dwords, less 1; also see ipath_set_mtu()
 160          */
 161         val = (dd->ipath_ibmaxlen >> 2) + 1;
 162         ibc = val << dd->ibcc_mpl_shift;
 163
 164         /* flowcontrolwatermark is in units of KBytes */
 165         ibc |= 0x5ULL << INFINIPATH_IBCC_FLOWCTRLWATERMARK_SHIFT;
 166         /*
 167          * How often flowctrl sent.  More or less in usecs; balance against
 168          * watermark value, so that in theory senders always get a flow
 169          * control update in time to not let the IB link go idle.
 170          */
 171         ibc |= 0x3ULL << INFINIPATH_IBCC_FLOWCTRLPERIOD_SHIFT;
 172         /* max error tolerance */
 173         ibc |= 0xfULL << INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT;
 174         /* use "real" buffer space for */
 175         ibc |= 4ULL << INFINIPATH_IBCC_CREDITSCALE_SHIFT;
 176         /* IB credit flow control. */
 177         ibc |= 0xfULL << INFINIPATH_IBCC_OVERRUNTHRESHOLD_SHIFT;
 178         /* initially come up waiting for TS1, without sending anything. */
 179         dd->ipath_ibcctrl = ibc;
 180         /*
 181          * Want to start out with both LINKCMD and LINKINITCMD in NOP
 182          * (0 and 0).  Don't put linkinitcmd in ipath_ibcctrl, want that
 183          * to stay a NOP. Flag that we are disabled, for the (unlikely)
 184          * case that some recovery path is trying to bring the link up
 185          * before we are ready.
 186          */
 187         ibc |= INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
 188                 INFINIPATH_IBCC_LINKINITCMD_SHIFT;
 189         dd->ipath_flags |= IPATH_IB_LINK_DISABLED;
 190         ipath_cdbg(VERBOSE, "Writing 0x%llx to ibcctrl\n",
 191                    (unsigned long long) ibc);
 192         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl, ibc);
 193
 194         // be sure chip saw it
 195         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 196
 197         ret = dd->ipath_f_bringup_serdes(dd);
 198
 199         if (ret)
 200                 dev_info(&dd->pcidev->dev, "Could not initialize SerDes, "
 201                          "not usable\n");
 202         else {
 203                 /* enable IBC */
 204                 dd->ipath_control |= INFINIPATH_C_LINKENABLE;
 205                 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
 206                                  dd->ipath_control);
 207         }
 208
 209         return ret;
 210 }
 211
 212 static struct ipath_portdata *create_portdata0(struct ipath_devdata *dd)
 213 {
 214         struct ipath_portdata *pd = NULL;
 215
 216         pd = kzalloc(sizeof(*pd), GFP_KERNEL);
 217         if (pd) {
 218                 pd->port_dd = dd;
 219                 pd->port_cnt = 1;
 220                 /* The port 0 pkey table is used by the layer interface. */
 221                 pd->port_pkeys[0] = IPATH_DEFAULT_P_KEY;
 222         }
 223         return pd;
 224 }
 225
 226 static int init_chip_first(struct ipath_devdata *dd,
 227                            struct ipath_portdata **pdp)
 228 {
 229         struct ipath_portdata *pd = NULL;
 230         int ret = 0;
 231         u64 val;
 232
 233         /*
 234          * skip cfgports stuff because we are not allocating memory,
 235          * and we don't want problems if the portcnt changed due to
 236          * cfgports.  We do still check and report a difference, if
 237          * not same (should be impossible).
 238          */
 239         dd->ipath_f_config_ports(dd, ipath_cfgports);
 240         if (!ipath_cfgports)
 241                 dd->ipath_cfgports = dd->ipath_portcnt;
 242         else if (ipath_cfgports <= dd->ipath_portcnt) {
 243                 dd->ipath_cfgports = ipath_cfgports;
 244                 ipath_dbg("Configured to use %u ports out of %u in chip\n",
 245                           dd->ipath_cfgports, dd->ipath_portcnt);
 246         } else {
 247                 dd->ipath_cfgports = dd->ipath_portcnt;
 248                 ipath_dbg("Tried to configured to use %u ports; chip "
 249                           "only supports %u\n", ipath_cfgports,
 250                           dd->ipath_portcnt);
 251         }
 252         /*
 253          * Allocate full portcnt array, rather than just cfgports, because
 254          * cleanup iterates across all possible ports.
 255          */
 256         dd->ipath_pd = kzalloc(sizeof(*dd->ipath_pd) * dd->ipath_portcnt,
 257                                GFP_KERNEL);
 258
 259         if (!dd->ipath_pd) {
 260                 ipath_dev_err(dd, "Unable to allocate portdata array, "
 261                               "failing\n");
 262                 ret = -ENOMEM;
 263                 goto done;
 264         }
 265
 266         pd = create_portdata0(dd);
 267         if (!pd) {
 268                 ipath_dev_err(dd, "Unable to allocate portdata for port "
 269                               "0, failing\n");
 270                 ret = -ENOMEM;
 271                 goto done;
 272         }
 273         dd->ipath_pd[0] = pd;
 274
 275         dd->ipath_rcvtidcnt =
 276                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
 277         dd->ipath_rcvtidbase =
 278                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
 279         dd->ipath_rcvegrcnt =
 280                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
 281         dd->ipath_rcvegrbase =
 282                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
 283         dd->ipath_palign =
 284                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_pagealign);
 285         dd->ipath_piobufbase =
 286                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufbase);
 287         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiosize);
 288         dd->ipath_piosize2k = val & ~0U;
 289         dd->ipath_piosize4k = val >> 32;
 290         if (dd->ipath_piosize4k == 0 && ipath_mtu4096)
 291                 ipath_mtu4096 = 0; /* 4KB not supported by this chip */
 292         dd->ipath_ibmtu = ipath_mtu4096 ? 4096 : 2048;
 293         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufcnt);
 294         dd->ipath_piobcnt2k = val & ~0U;
 295         dd->ipath_piobcnt4k = val >> 32;
 296         dd->ipath_pio2kbase =
 297                 (u32 __iomem *) (((char __iomem *) dd->ipath_kregbase) +
 298                                  (dd->ipath_piobufbase & 0xffffffff));
 299         if (dd->ipath_piobcnt4k) {
 300                 dd->ipath_pio4kbase = (u32 __iomem *)
 301                         (((char __iomem *) dd->ipath_kregbase) +
 302                          (dd->ipath_piobufbase >> 32));
 303                 /*
 304                  * 4K buffers take 2 pages; we use roundup just to be
 305                  * paranoid; we calculate it once here, rather than on
 306                  * ever buf allocate
 307                  */
 308                 dd->ipath_4kalign = ALIGN(dd->ipath_piosize4k,
 309                                           dd->ipath_palign);
 310                 ipath_dbg("%u 2k(%x) piobufs @ %p, %u 4k(%x) @ %p "
 311                           "(%x aligned)\n",
 312                           dd->ipath_piobcnt2k, dd->ipath_piosize2k,
 313                           dd->ipath_pio2kbase, dd->ipath_piobcnt4k,
 314                           dd->ipath_piosize4k, dd->ipath_pio4kbase,
 315                           dd->ipath_4kalign);
 316         }
 317         else ipath_dbg("%u 2k piobufs @ %p\n",
 318                        dd->ipath_piobcnt2k, dd->ipath_pio2kbase);
 319
 320         spin_lock_init(&dd->ipath_tid_lock);
 321         spin_lock_init(&dd->ipath_sendctrl_lock);
 322         spin_lock_init(&dd->ipath_gpio_lock);
 323         spin_lock_init(&dd->ipath_eep_st_lock);
 324         mutex_init(&dd->ipath_eep_lock);
 325
 326 done:
 327         *pdp = pd;
 328         return ret;
 329 }
 330
 331 /**
 332  * init_chip_reset - re-initialize after a reset, or enable
 333  * @dd: the infinipath device
 334  * @pdp: output for port data
 335  *
 336  * sanity check at least some of the values after reset, and
 337  * ensure no receive or transmit (explictly, in case reset
 338  * failed
 339  */
 340 static int init_chip_reset(struct ipath_devdata *dd,
 341                            struct ipath_portdata **pdp)
 342 {
 343         u32 rtmp;
 344
 345         *pdp = dd->ipath_pd[0];
 346         /* ensure chip does no sends or receives while we re-initialize */
 347         dd->ipath_control = dd->ipath_sendctrl = dd->ipath_rcvctrl = 0U;
 348         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, dd->ipath_rcvctrl);
 349         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
 350         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, dd->ipath_control);
 351
 352         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
 353         if (dd->ipath_portcnt != rtmp)
 354                 dev_info(&dd->pcidev->dev, "portcnt was %u before "
 355                          "reset, now %u, using original\n",
 356                          dd->ipath_portcnt, rtmp);
 357         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
 358         if (rtmp != dd->ipath_rcvtidcnt)
 359                 dev_info(&dd->pcidev->dev, "tidcnt was %u before "
 360                          "reset, now %u, using original\n",
 361                          dd->ipath_rcvtidcnt, rtmp);
 362         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
 363         if (rtmp != dd->ipath_rcvtidbase)
 364                 dev_info(&dd->pcidev->dev, "tidbase was %u before "
 365                          "reset, now %u, using original\n",
 366                          dd->ipath_rcvtidbase, rtmp);
 367         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
 368         if (rtmp != dd->ipath_rcvegrcnt)
 369                 dev_info(&dd->pcidev->dev, "egrcnt was %u before "
 370                          "reset, now %u, using original\n",
 371                          dd->ipath_rcvegrcnt, rtmp);
 372         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
 373         if (rtmp != dd->ipath_rcvegrbase)
 374                 dev_info(&dd->pcidev->dev, "egrbase was %u before "
 375                          "reset, now %u, using original\n",
 376                          dd->ipath_rcvegrbase, rtmp);
 377
 378         return 0;
 379 }
 380
 381 static int init_pioavailregs(struct ipath_devdata *dd)
 382 {
 383         int ret;
 384
 385         dd->ipath_pioavailregs_dma = dma_alloc_coherent(
 386                 &dd->pcidev->dev, PAGE_SIZE, &dd->ipath_pioavailregs_phys,
 387                 GFP_KERNEL);
 388         if (!dd->ipath_pioavailregs_dma) {
 389                 ipath_dev_err(dd, "failed to allocate PIOavail reg area "
 390                               "in memory\n");
 391                 ret = -ENOMEM;
 392                 goto done;
 393         }
 394
 395         /*
 396          * we really want L2 cache aligned, but for current CPUs of
 397          * interest, they are the same.
 398          */
 399         dd->ipath_statusp = (u64 *)
 400                 ((char *)dd->ipath_pioavailregs_dma +
 401                  ((2 * L1_CACHE_BYTES +
 402                    dd->ipath_pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
 403         /* copy the current value now that it's really allocated */
 404         *dd->ipath_statusp = dd->_ipath_status;
 405         /*
 406          * setup buffer to hold freeze msg, accessible to apps,
 407          * following statusp
 408          */
 409         dd->ipath_freezemsg = (char *)&dd->ipath_statusp[1];
 410         /* and its length */
 411         dd->ipath_freezelen = L1_CACHE_BYTES - sizeof(dd->ipath_statusp[0]);
 412
 413         ret = 0;
 414
 415 done:
 416         return ret;
 417 }
 418
 419 /**
 420  * init_shadow_tids - allocate the shadow TID array
 421  * @dd: the infinipath device
 422  *
 423  * allocate the shadow TID array, so we can ipath_munlock previous
 424  * entries.  It may make more sense to move the pageshadow to the
 425  * port data structure, so we only allocate memory for ports actually
 426  * in use, since we at 8k per port, now.
 427  */
 428 static void init_shadow_tids(struct ipath_devdata *dd)
 429 {
 430         struct page **pages;
 431         dma_addr_t *addrs;
 432
 433         pages = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
 434                         sizeof(struct page *));
 435         if (!pages) {
 436                 ipath_dev_err(dd, "failed to allocate shadow page * "
 437                               "array, no expected sends!\n");
 438                 dd->ipath_pageshadow = NULL;
 439                 return;
 440         }
 441
 442         addrs = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
 443                         sizeof(dma_addr_t));
 444         if (!addrs) {
 445                 ipath_dev_err(dd, "failed to allocate shadow dma handle "
 446                               "array, no expected sends!\n");
 447                 vfree(dd->ipath_pageshadow);
 448                 dd->ipath_pageshadow = NULL;
 449                 return;
 450         }
 451
 452         memset(pages, 0, dd->ipath_cfgports * dd->ipath_rcvtidcnt *
 453                sizeof(struct page *));
 454
 455         dd->ipath_pageshadow = pages;
 456         dd->ipath_physshadow = addrs;
 457 }
 458
 459 static void enable_chip(struct ipath_devdata *dd,
 460                         struct ipath_portdata *pd, int reinit)
 461 {
 462         u32 val;
 463         unsigned long flags;
 464         int i;
 465
 466         if (!reinit)
 467                 init_waitqueue_head(&ipath_state_wait);
 468
 469         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
 470                          dd->ipath_rcvctrl);
 471
 472         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 473         /* Enable PIO send, and update of PIOavail regs to memory. */
 474         dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE |
 475                 INFINIPATH_S_PIOBUFAVAILUPD;
 476         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
 477         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 478         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 479
 480         /*
 481          * enable port 0 receive, and receive interrupt.  other ports
 482          * done as user opens and inits them.
 483          */
 484         dd->ipath_rcvctrl = (1ULL << dd->ipath_r_tailupd_shift) |
 485                 (1ULL << dd->ipath_r_portenable_shift) |
 486                 (1ULL << dd->ipath_r_intravail_shift);
 487         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
 488                          dd->ipath_rcvctrl);
 489
 490         /*
 491          * now ready for use.  this should be cleared whenever we
 492          * detect a reset, or initiate one.
 493          */
 494         dd->ipath_flags |= IPATH_INITTED;
 495
 496         /*
 497          * init our shadow copies of head from tail values, and write
 498          * head values to match.
 499          */
 500         val = ipath_read_ureg32(dd, ur_rcvegrindextail, 0);
 501         ipath_write_ureg(dd, ur_rcvegrindexhead, val, 0);
 502
 503         /* Initialize so we interrupt on next packet received */
 504         ipath_write_ureg(dd, ur_rcvhdrhead,
 505                          dd->ipath_rhdrhead_intr_off |
 506                          dd->ipath_pd[0]->port_head, 0);
 507
 508         /*
 509          * by now pioavail updates to memory should have occurred, so
 510          * copy them into our working/shadow registers; this is in
 511          * case something went wrong with abort, but mostly to get the
 512          * initial values of the generation bit correct.
 513          */
 514         for (i = 0; i < dd->ipath_pioavregs; i++) {
 515                 __le64 pioavail;
 516
 517                 /*
 518                  * Chip Errata bug 6641; even and odd qwords>3 are swapped.
 519                  */
 520                 if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS))
 521                         pioavail = dd->ipath_pioavailregs_dma[i ^ 1];
 522                 else
 523                         pioavail = dd->ipath_pioavailregs_dma[i];
 524                 dd->ipath_pioavailshadow[i] = le64_to_cpu(pioavail) |
 525                         (~dd->ipath_pioavailkernel[i] <<
 526                         INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT);
 527         }
 528         /* can get counters, stats, etc. */
 529         dd->ipath_flags |= IPATH_PRESENT;
 530 }
 531
 532 static int init_housekeeping(struct ipath_devdata *dd,
 533                              struct ipath_portdata **pdp, int reinit)
 534 {
 535         char boardn[32];
 536         int ret = 0;
 537
 538         /*
 539          * have to clear shadow copies of registers at init that are
 540          * not otherwise set here, or all kinds of bizarre things
 541          * happen with driver on chip reset
 542          */
 543         dd->ipath_rcvhdrsize = 0;
 544
 545         /*
 546          * Don't clear ipath_flags as 8bit mode was set before
 547          * entering this func. However, we do set the linkstate to
 548          * unknown, so we can watch for a transition.
 549          * PRESENT is set because we want register reads to work,
 550          * and the kernel infrastructure saw it in config space;
 551          * We clear it if we have failures.
 552          */
 553         dd->ipath_flags |= IPATH_LINKUNK | IPATH_PRESENT;
 554         dd->ipath_flags &= ~(IPATH_LINKACTIVE | IPATH_LINKARMED |
 555                              IPATH_LINKDOWN | IPATH_LINKINIT);
 556
 557         ipath_cdbg(VERBOSE, "Try to read spc chip revision\n");
 558         dd->ipath_revision =
 559                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_revision);
 560
 561         /*
 562          * set up fundamental info we need to use the chip; we assume
 563          * if the revision reg and these regs are OK, we don't need to
 564          * special case the rest
 565          */
 566         dd->ipath_sregbase =
 567                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_sendregbase);
 568         dd->ipath_cregbase =
 569                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_counterregbase);
 570         dd->ipath_uregbase =
 571                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_userregbase);
 572         ipath_cdbg(VERBOSE, "ipath_kregbase %p, sendbase %x usrbase %x, "
 573                    "cntrbase %x\n", dd->ipath_kregbase, dd->ipath_sregbase,
 574                    dd->ipath_uregbase, dd->ipath_cregbase);
 575         if ((dd->ipath_revision & 0xffffffff) == 0xffffffff
 576             || (dd->ipath_sregbase & 0xffffffff) == 0xffffffff
 577             || (dd->ipath_cregbase & 0xffffffff) == 0xffffffff
 578             || (dd->ipath_uregbase & 0xffffffff) == 0xffffffff) {
 579                 ipath_dev_err(dd, "Register read failures from chip, "
 580                               "giving up initialization\n");
 581                 dd->ipath_flags &= ~IPATH_PRESENT;
 582                 ret = -ENODEV;
 583                 goto done;
 584         }
 585
 586
 587         /* clear diagctrl register, in case diags were running and crashed */
 588         ipath_write_kreg (dd, dd->ipath_kregs->kr_hwdiagctrl, 0);
 589
 590         /* clear the initial reset flag, in case first driver load */
 591         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
 592                          INFINIPATH_E_RESET);
 593
 594         if (reinit)
 595                 ret = init_chip_reset(dd, pdp);
 596         else
 597                 ret = init_chip_first(dd, pdp);
 598
 599         if (ret)
 600                 goto done;
 601
 602         ipath_cdbg(VERBOSE, "Revision %llx (PCI %x), %u ports, %u tids, "
 603                    "%u egrtids\n", (unsigned long long) dd->ipath_revision,
 604                    dd->ipath_pcirev, dd->ipath_portcnt, dd->ipath_rcvtidcnt,
 605                    dd->ipath_rcvegrcnt);
 606
 607         if (((dd->ipath_revision >> INFINIPATH_R_SOFTWARE_SHIFT) &
 608              INFINIPATH_R_SOFTWARE_MASK) != IPATH_CHIP_SWVERSION) {
 609                 ipath_dev_err(dd, "Driver only handles version %d, "
 610                               "chip swversion is %d (%llx), failng\n",
 611                               IPATH_CHIP_SWVERSION,
 612                               (int)(dd->ipath_revision >>
 613                                     INFINIPATH_R_SOFTWARE_SHIFT) &
 614                               INFINIPATH_R_SOFTWARE_MASK,
 615                               (unsigned long long) dd->ipath_revision);
 616                 ret = -ENOSYS;
 617                 goto done;
 618         }
 619         dd->ipath_majrev = (u8) ((dd->ipath_revision >>
 620                                   INFINIPATH_R_CHIPREVMAJOR_SHIFT) &
 621                                  INFINIPATH_R_CHIPREVMAJOR_MASK);
 622         dd->ipath_minrev = (u8) ((dd->ipath_revision >>
 623                                   INFINIPATH_R_CHIPREVMINOR_SHIFT) &
 624                                  INFINIPATH_R_CHIPREVMINOR_MASK);
 625         dd->ipath_boardrev = (u8) ((dd->ipath_revision >>
 626                                     INFINIPATH_R_BOARDID_SHIFT) &
 627                                    INFINIPATH_R_BOARDID_MASK);
 628
 629         ret = dd->ipath_f_get_boardname(dd, boardn, sizeof boardn);
 630
 631         snprintf(dd->ipath_boardversion, sizeof(dd->ipath_boardversion),
 632                  "ChipABI %u.%u, %s, InfiniPath%u %u.%u, PCI %u, "
 633                  "SW Compat %u\n",
 634                  IPATH_CHIP_VERS_MAJ, IPATH_CHIP_VERS_MIN, boardn,
 635                  (unsigned)(dd->ipath_revision >> INFINIPATH_R_ARCH_SHIFT) &
 636                  INFINIPATH_R_ARCH_MASK,
 637                  dd->ipath_majrev, dd->ipath_minrev, dd->ipath_pcirev,
 638                  (unsigned)(dd->ipath_revision >>
 639                             INFINIPATH_R_SOFTWARE_SHIFT) &
 640                  INFINIPATH_R_SOFTWARE_MASK);
 641
 642         ipath_dbg("%s", dd->ipath_boardversion);
 643
 644 done:
 645         return ret;
 646 }
 647
 648
 649 /**
 650  * ipath_init_chip - do the actual initialization sequence on the chip
 651  * @dd: the infinipath device
 652  * @reinit: reinitializing, so don't allocate new memory
 653  *
 654  * Do the actual initialization sequence on the chip.  This is done
 655  * both from the init routine called from the PCI infrastructure, and
 656  * when we reset the chip, or detect that it was reset internally,
 657  * or it's administratively re-enabled.
 658  *
 659  * Memory allocation here and in called routines is only done in
 660  * the first case (reinit == 0).  We have to be careful, because even
 661  * without memory allocation, we need to re-write all the chip registers
 662  * TIDs, etc. after the reset or enable has completed.
 663  */
 664 int ipath_init_chip(struct ipath_devdata *dd, int reinit)
 665 {
 666         int ret = 0;
 667         u32 val32, kpiobufs;
 668         u32 piobufs, uports;
 669         u64 val;
 670         struct ipath_portdata *pd = NULL; /* keep gcc4 happy */
 671         gfp_t gfp_flags = GFP_USER | __GFP_COMP;
 672         unsigned long flags;
 673
 674         ret = init_housekeeping(dd, &pd, reinit);
 675         if (ret)
 676                 goto done;
 677
 678         /*
 679          * we ignore most issues after reporting them, but have to specially
 680          * handle hardware-disabled chips.
 681          */
 682         if (ret == 2) {
 683                 /* unique error, known to ipath_init_one */
 684                 ret = -EPERM;
 685                 goto done;
 686         }
 687
 688         /*
 689          * We could bump this to allow for full rcvegrcnt + rcvtidcnt,
 690          * but then it no longer nicely fits power of two, and since
 691          * we now use routines that backend onto __get_free_pages, the
 692          * rest would be wasted.
 693          */
 694         dd->ipath_rcvhdrcnt = dd->ipath_rcvegrcnt;
 695         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrcnt,
 696                          dd->ipath_rcvhdrcnt);
 697
 698         /*
 699          * Set up the shadow copies of the piobufavail registers,
 700          * which we compare against the chip registers for now, and
 701          * the in memory DMA'ed copies of the registers.  This has to
 702          * be done early, before we calculate lastport, etc.
 703          */
 704         piobufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
 705         /*
 706          * calc number of pioavail registers, and save it; we have 2
 707          * bits per buffer.
 708          */
 709         dd->ipath_pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2)
 710                 / (sizeof(u64) * BITS_PER_BYTE / 2);
 711         uports = dd->ipath_cfgports ? dd->ipath_cfgports - 1 : 0;
 712         if (ipath_kpiobufs == 0) {
 713                 /* not set by user (this is default) */
 714                 if (piobufs > 144)
 715                         kpiobufs = 32;
 716                 else
 717                         kpiobufs = 16;
 718         }
 719         else
 720                 kpiobufs = ipath_kpiobufs;
 721
 722         if (kpiobufs + (uports * IPATH_MIN_USER_PORT_BUFCNT) > piobufs) {
 723                 int i = (int) piobufs -
 724                         (int) (uports * IPATH_MIN_USER_PORT_BUFCNT);
 725                 if (i < 0)
 726                         i = 0;
 727                 dev_info(&dd->pcidev->dev, "Allocating %d PIO bufs of "
 728                          "%d for kernel leaves too few for %d user ports "
 729                          "(%d each); using %u\n", kpiobufs,
 730                          piobufs, uports, IPATH_MIN_USER_PORT_BUFCNT, i);
 731                 /*
 732                  * shouldn't change ipath_kpiobufs, because could be
 733                  * different for different devices...
 734                  */
 735                 kpiobufs = i;
 736         }
 737         dd->ipath_lastport_piobuf = piobufs - kpiobufs;
 738         dd->ipath_pbufsport =
 739                 uports ? dd->ipath_lastport_piobuf / uports : 0;
 740         val32 = dd->ipath_lastport_piobuf - (dd->ipath_pbufsport * uports);
 741         if (val32 > 0) {
 742                 ipath_dbg("allocating %u pbufs/port leaves %u unused, "
 743                           "add to kernel\n", dd->ipath_pbufsport, val32);
 744                 dd->ipath_lastport_piobuf -= val32;
 745                 ipath_dbg("%u pbufs/port leaves %u unused, add to kernel\n",
 746                           dd->ipath_pbufsport, val32);
 747         }
 748         dd->ipath_lastpioindex = 0;
 749         dd->ipath_lastpioindexl = dd->ipath_piobcnt2k;
 750         ipath_chg_pioavailkernel(dd, 0, piobufs, 1);
 751         ipath_cdbg(VERBOSE, "%d PIO bufs for kernel out of %d total %u "
 752                    "each for %u user ports\n", kpiobufs,
 753                    piobufs, dd->ipath_pbufsport, uports);
 754
 755         dd->ipath_f_early_init(dd);
 756         /*
 757          * cancel any possible active sends from early driver load.
 758          * Follows early_init because some chips have to initialize
 759          * PIO buffers in early_init to avoid false parity errors.
 760          */
 761         ipath_cancel_sends(dd, 0);
 762
 763         /* early_init sets rcvhdrentsize and rcvhdrsize, so this must be
 764          * done after early_init */
 765         dd->ipath_hdrqlast =
 766                 dd->ipath_rcvhdrentsize * (dd->ipath_rcvhdrcnt - 1);
 767         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrentsize,
 768                          dd->ipath_rcvhdrentsize);
 769         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
 770                          dd->ipath_rcvhdrsize);
 771
 772         if (!reinit) {
 773                 ret = init_pioavailregs(dd);
 774                 init_shadow_tids(dd);
 775                 if (ret)
 776                         goto done;
 777         }
 778
 779         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr,
 780                          dd->ipath_pioavailregs_phys);
 781         /*
 782          * this is to detect s/w errors, which the h/w works around by
 783          * ignoring the low 6 bits of address, if it wasn't aligned.
 784          */
 785         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpioavailaddr);
 786         if (val != dd->ipath_pioavailregs_phys) {
 787                 ipath_dev_err(dd, "Catastrophic software error, "
 788                               "SendPIOAvailAddr written as %lx, "
 789                               "read back as %llx\n",
 790                               (unsigned long) dd->ipath_pioavailregs_phys,
 791                               (unsigned long long) val);
 792                 ret = -EINVAL;
 793                 goto done;
 794         }
 795
 796         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvbthqp, IPATH_KD_QP);
 797
 798         /*
 799          * make sure we are not in freeze, and PIO send enabled, so
 800          * writes to pbc happen
 801          */
 802         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask, 0ULL);
 803         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
 804                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
 805         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL);
 806
 807         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 808         dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE;
 809         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
 810         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 811         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 812
 813         /*
 814          * before error clears, since we expect serdes pll errors during
 815          * this, the first time after reset
 816          */
 817         if (bringup_link(dd)) {
 818                 dev_info(&dd->pcidev->dev, "Failed to bringup IB link\n");
 819                 ret = -ENETDOWN;
 820                 goto done;
 821         }
 822
 823         /*
 824          * clear any "expected" hwerrs from reset and/or initialization
 825          * clear any that aren't enabled (at least this once), and then
 826          * set the enable mask
 827          */
 828         dd->ipath_f_init_hwerrors(dd);
 829         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
 830                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
 831         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
 832                          dd->ipath_hwerrmask);
 833
 834         /* clear all */
 835         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
 836         /* enable errors that are masked, at least this first time. */
 837         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 838                          ~dd->ipath_maskederrs);
 839         dd->ipath_errormask = ipath_read_kreg64(dd,
 840                 dd->ipath_kregs->kr_errormask);
 841         /* clear any interrupts up to this point (ints still not enabled) */
 842         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
 843
 844         /*
 845          * Set up the port 0 (kernel) rcvhdr q and egr TIDs.  If doing
 846          * re-init, the simplest way to handle this is to free
 847          * existing, and re-allocate.
 848          * Need to re-create rest of port 0 portdata as well.
 849          */
 850         if (reinit) {
 851                 /* Alloc and init new ipath_portdata for port0,
 852                  * Then free old pd. Could lead to fragmentation, but also
 853                  * makes later support for hot-swap easier.
 854                  */
 855                 struct ipath_portdata *npd;
 856                 npd = create_portdata0(dd);
 857                 if (npd) {
 858                         ipath_free_pddata(dd, pd);
 859                         dd->ipath_pd[0] = pd = npd;
 860                 } else {
 861                         ipath_dev_err(dd, "Unable to allocate portdata for"
 862                                       "  port 0, failing\n");
 863                         ret = -ENOMEM;
 864                         goto done;
 865                 }
 866         }
 867         dd->ipath_f_tidtemplate(dd);
 868         ret = ipath_create_rcvhdrq(dd, pd);
 869         if (!ret) {
 870                 dd->ipath_hdrqtailptr =
 871                         (volatile __le64 *)pd->port_rcvhdrtail_kvaddr;
 872                 ret = create_port0_egr(dd);
 873         }
 874         if (ret)
 875                 ipath_dev_err(dd, "failed to allocate port 0 (kernel) "
 876                               "rcvhdrq and/or egr bufs\n");
 877         else
 878                 enable_chip(dd, pd, reinit);
 879
 880
 881         if (!ret && !reinit) {
 882             /* used when we close a port, for DMA already in flight at close */
 883                 dd->ipath_dummy_hdrq = dma_alloc_coherent(
 884                         &dd->pcidev->dev, pd->port_rcvhdrq_size,
 885                         &dd->ipath_dummy_hdrq_phys,
 886                         gfp_flags);
 887                 if (!dd->ipath_dummy_hdrq ) {
 888                         dev_info(&dd->pcidev->dev,
 889                                 "Couldn't allocate 0x%lx bytes for dummy hdrq\n",
 890                                 pd->port_rcvhdrq_size);
 891                         /* fallback to just 0'ing */
 892                         dd->ipath_dummy_hdrq_phys = 0UL;
 893                 }
 894         }
 895
 896         /*
 897          * cause retrigger of pending interrupts ignored during init,
 898          * even if we had errors
 899          */
 900         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
 901
 902         if(!dd->ipath_stats_timer_active) {
 903                 /*
 904                  * first init, or after an admin disable/enable
 905                  * set up stats retrieval timer, even if we had errors
 906                  * in last portion of setup
 907                  */
 908                 init_timer(&dd->ipath_stats_timer);
 909                 dd->ipath_stats_timer.function = ipath_get_faststats;
 910                 dd->ipath_stats_timer.data = (unsigned long) dd;
 911                 /* every 5 seconds; */
 912                 dd->ipath_stats_timer.expires = jiffies + 5 * HZ;
 913                 /* takes ~16 seconds to overflow at full IB 4x bandwdith */
 914                 add_timer(&dd->ipath_stats_timer);
 915                 dd->ipath_stats_timer_active = 1;
 916         }
 917
 918         /* Set up HoL state */
 919         init_timer(&dd->ipath_hol_timer);
 920         dd->ipath_hol_timer.function = ipath_hol_event;
 921         dd->ipath_hol_timer.data = (unsigned long)dd;
 922         dd->ipath_hol_state = IPATH_HOL_UP;
 923
 924 done:
 925         if (!ret) {
 926                 *dd->ipath_statusp |= IPATH_STATUS_CHIP_PRESENT;
 927                 if (!dd->ipath_f_intrsetup(dd)) {
 928                         /* now we can enable all interrupts from the chip */
 929                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
 930                                          -1LL);
 931                         /* force re-interrupt of any pending interrupts. */
 932                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear,
 933                                          0ULL);
 934                         /* chip is usable; mark it as initialized */
 935                         *dd->ipath_statusp |= IPATH_STATUS_INITTED;
 936                 } else
 937                         ipath_dev_err(dd, "No interrupts enabled, couldn't "
 938                                       "setup interrupt address\n");
 939
 940                 if (dd->ipath_cfgports > ipath_stats.sps_nports)
 941                         /*
 942                          * sps_nports is a global, so, we set it to
 943                          * the highest number of ports of any of the
 944                          * chips we find; we never decrement it, at
 945                          * least for now.  Since this might have changed
 946                          * over disable/enable or prior to reset, always
 947                          * do the check and potentially adjust.
 948                          */
 949                         ipath_stats.sps_nports = dd->ipath_cfgports;
 950         } else
 951                 ipath_dbg("Failed (%d) to initialize chip\n", ret);
 952
 953         /* if ret is non-zero, we probably should do some cleanup
 954            here... */
 955         return ret;
 956 }
 957
 958 static int ipath_set_kpiobufs(const char *str, struct kernel_param *kp)
 959 {
 960         struct ipath_devdata *dd;
 961         unsigned long flags;
 962         unsigned short val;
 963         int ret;
 964
 965         ret = ipath_parse_ushort(str, &val);
 966
 967         spin_lock_irqsave(&ipath_devs_lock, flags);
 968
 969         if (ret < 0)
 970                 goto bail;
 971
 972         if (val == 0) {
 973                 ret = -EINVAL;
 974                 goto bail;
 975         }
 976
 977         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 978                 if (dd->ipath_kregbase)
 979                         continue;
 980                 if (val > (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k -
 981                            (dd->ipath_cfgports *
 982                             IPATH_MIN_USER_PORT_BUFCNT)))
 983                 {
 984                         ipath_dev_err(
 985                                 dd,
 986                                 "Allocating %d PIO bufs for kernel leaves "
 987                                 "too few for %d user ports (%d each)\n",
 988                                 val, dd->ipath_cfgports - 1,
 989                                 IPATH_MIN_USER_PORT_BUFCNT);
 990                         ret = -EINVAL;
 991                         goto bail;
 992                 }
 993                 dd->ipath_lastport_piobuf =
 994                         dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - val;
 995         }
 996
 997         ipath_kpiobufs = val;
 998         ret = 0;
 999 bail:
1000         spin_unlock_irqrestore(&ipath_devs_lock, flags);
1001
1002         return ret;
1003 }