2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <rdma/ib_mad.h>
34 #include <rdma/ib_smi.h>
35 #include <rdma/ib_sa.h>
36 #include <rdma/ib_cache.h>
38 #include <linux/random.h>
39 #include <linux/mlx4/cmd.h>
40 #include <linux/gfp.h>
41 #include <rdma/ib_pma.h>
43 #include <linux/mlx4/driver.h>
47 MLX4_IB_VENDOR_CLASS1 = 0x9,
48 MLX4_IB_VENDOR_CLASS2 = 0xa
51 #define MLX4_TUN_SEND_WRID_SHIFT 34
52 #define MLX4_TUN_QPN_SHIFT 32
53 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
54 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
56 #define MLX4_TUN_IS_RECV(a) (((a) >> MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
57 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
59 /* Port mgmt change event handling */
61 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
62 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
63 #define NUM_IDX_IN_PKEY_TBL_BLK 32
64 #define GUID_TBL_ENTRY_SIZE 8 /* size in bytes */
65 #define GUID_TBL_BLK_NUM_ENTRIES 8
66 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
68 struct mlx4_mad_rcv_buf {
73 struct mlx4_mad_snd_buf {
77 struct mlx4_tunnel_mad {
79 struct mlx4_ib_tunnel_header hdr;
83 struct mlx4_rcv_tunnel_mad {
84 struct mlx4_rcv_tunnel_hdr hdr;
89 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
90 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
91 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
92 int block, u32 change_bitmap);
94 __be64 mlx4_ib_gen_node_guid(void)
96 #define NODE_GUID_HI ((u64) (((u64)IB_OPENIB_OUI) << 40))
97 return cpu_to_be64(NODE_GUID_HI | prandom_u32());
100 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
102 return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
103 cpu_to_be64(0xff00000000000000LL);
106 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
107 int port, const struct ib_wc *in_wc,
108 const struct ib_grh *in_grh,
109 const void *in_mad, void *response_mad)
111 struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
114 u32 in_modifier = port;
117 inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
118 if (IS_ERR(inmailbox))
119 return PTR_ERR(inmailbox);
120 inbox = inmailbox->buf;
122 outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
123 if (IS_ERR(outmailbox)) {
124 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
125 return PTR_ERR(outmailbox);
128 memcpy(inbox, in_mad, 256);
131 * Key check traps can't be generated unless we have in_wc to
132 * tell us where to send the trap.
134 if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
136 if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
138 if (mlx4_is_mfunc(dev->dev) &&
139 (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
155 memset(inbox + 256, 0, 256);
156 ext_info = inbox + 256;
158 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
159 ext_info->rqpn = cpu_to_be32(in_wc->src_qp);
160 ext_info->sl = in_wc->sl << 4;
161 ext_info->g_path = in_wc->dlid_path_bits |
162 (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
163 ext_info->pkey = cpu_to_be16(in_wc->pkey_index);
166 memcpy(ext_info->grh, in_grh, 40);
170 in_modifier |= in_wc->slid << 16;
173 err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
174 mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
175 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
176 (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
179 memcpy(response_mad, outmailbox->buf, 256);
181 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
182 mlx4_free_cmd_mailbox(dev->dev, outmailbox);
187 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
189 struct ib_ah *new_ah;
190 struct ib_ah_attr ah_attr;
193 if (!dev->send_agent[port_num - 1][0])
196 memset(&ah_attr, 0, sizeof ah_attr);
199 ah_attr.port_num = port_num;
201 new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
206 spin_lock_irqsave(&dev->sm_lock, flags);
207 if (dev->sm_ah[port_num - 1])
208 ib_destroy_ah(dev->sm_ah[port_num - 1]);
209 dev->sm_ah[port_num - 1] = new_ah;
210 spin_unlock_irqrestore(&dev->sm_lock, flags);
214 * Snoop SM MADs for port info, GUID info, and P_Key table sets, so we can
215 * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
217 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
220 struct ib_port_info *pinfo;
223 u32 bn, pkey_change_bitmap;
227 struct mlx4_ib_dev *dev = to_mdev(ibdev);
228 if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
229 mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
230 mad->mad_hdr.method == IB_MGMT_METHOD_SET)
231 switch (mad->mad_hdr.attr_id) {
232 case IB_SMP_ATTR_PORT_INFO:
233 pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
234 lid = be16_to_cpu(pinfo->lid);
236 update_sm_ah(dev, port_num,
237 be16_to_cpu(pinfo->sm_lid),
238 pinfo->neighbormtu_mastersmsl & 0xf);
240 if (pinfo->clientrereg_resv_subnetto & 0x80)
241 handle_client_rereg_event(dev, port_num);
244 handle_lid_change_event(dev, port_num);
247 case IB_SMP_ATTR_PKEY_TABLE:
248 if (!mlx4_is_mfunc(dev->dev)) {
249 mlx4_ib_dispatch_event(dev, port_num,
250 IB_EVENT_PKEY_CHANGE);
254 /* at this point, we are running in the master.
255 * Slaves do not receive SMPs.
257 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
258 base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
259 pkey_change_bitmap = 0;
260 for (i = 0; i < 32; i++) {
261 pr_debug("PKEY[%d] = x%x\n",
262 i + bn*32, be16_to_cpu(base[i]));
263 if (be16_to_cpu(base[i]) !=
264 dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
265 pkey_change_bitmap |= (1 << i);
266 dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
267 be16_to_cpu(base[i]);
270 pr_debug("PKEY Change event: port=%d, "
271 "block=0x%x, change_bitmap=0x%x\n",
272 port_num, bn, pkey_change_bitmap);
274 if (pkey_change_bitmap) {
275 mlx4_ib_dispatch_event(dev, port_num,
276 IB_EVENT_PKEY_CHANGE);
277 if (!dev->sriov.is_going_down)
278 __propagate_pkey_ev(dev, port_num, bn,
283 case IB_SMP_ATTR_GUID_INFO:
284 /* paravirtualized master's guid is guid 0 -- does not change */
285 if (!mlx4_is_master(dev->dev))
286 mlx4_ib_dispatch_event(dev, port_num,
287 IB_EVENT_GID_CHANGE);
288 /*if master, notify relevant slaves*/
289 if (mlx4_is_master(dev->dev) &&
290 !dev->sriov.is_going_down) {
291 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
292 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
293 (u8 *)(&((struct ib_smp *)mad)->data));
294 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
295 (u8 *)(&((struct ib_smp *)mad)->data));
304 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
305 int block, u32 change_bitmap)
307 int i, ix, slave, err;
310 for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
311 if (slave == mlx4_master_func_num(dev->dev))
313 if (!mlx4_is_slave_active(dev->dev, slave))
317 for (i = 0; i < 32; i++) {
318 if (!(change_bitmap & (1 << i)))
321 ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
322 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
323 [ix] == i + 32 * block) {
324 err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
325 pr_debug("propagate_pkey_ev: slave %d,"
326 " port %d, ix %d (%d)\n",
327 slave, port_num, ix, err);
338 static void node_desc_override(struct ib_device *dev,
343 if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
344 mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
345 mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
346 mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
347 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
348 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
349 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
353 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
355 int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
356 struct ib_mad_send_buf *send_buf;
357 struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
362 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
363 IB_MGMT_MAD_DATA, GFP_ATOMIC,
364 IB_MGMT_BASE_VERSION);
365 if (IS_ERR(send_buf))
368 * We rely here on the fact that MLX QPs don't use the
369 * address handle after the send is posted (this is
370 * wrong following the IB spec strictly, but we know
371 * it's OK for our devices).
373 spin_lock_irqsave(&dev->sm_lock, flags);
374 memcpy(send_buf->mad, mad, sizeof *mad);
375 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
376 ret = ib_post_send_mad(send_buf, NULL);
379 spin_unlock_irqrestore(&dev->sm_lock, flags);
382 ib_free_send_mad(send_buf);
386 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
387 struct ib_sa_mad *sa_mad)
391 /* dispatch to different sa handlers */
392 switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
393 case IB_SA_ATTR_MC_MEMBER_REC:
394 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
402 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
404 struct mlx4_ib_dev *dev = to_mdev(ibdev);
407 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
408 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
415 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
416 u8 port, u16 pkey, u16 *ix)
419 u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
422 if (slave == mlx4_master_func_num(dev->dev))
423 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
425 unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
427 for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
428 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
431 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
433 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
436 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
437 if (slot_pkey & 0x8000) {
441 /* take first partial pkey index found */
442 if (partial_ix == 0xFF)
443 partial_ix = pkey_ix;
448 if (partial_ix < 0xFF) {
449 *ix = (u16) partial_ix;
456 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
457 enum ib_qp_type dest_qpt, struct ib_wc *wc,
458 struct ib_grh *grh, struct ib_mad *mad)
462 struct ib_send_wr *bad_wr;
463 struct mlx4_ib_demux_pv_ctx *tun_ctx;
464 struct mlx4_ib_demux_pv_qp *tun_qp;
465 struct mlx4_rcv_tunnel_mad *tun_mad;
466 struct ib_ah_attr attr;
468 struct ib_qp *src_qp = NULL;
469 unsigned tun_tx_ix = 0;
474 u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
476 if (dest_qpt > IB_QPT_GSI)
479 tun_ctx = dev->sriov.demux[port-1].tun[slave];
481 /* check if proxy qp created */
482 if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
486 tun_qp = &tun_ctx->qp[0];
488 tun_qp = &tun_ctx->qp[1];
490 /* compute P_Key index to put in tunnel header for slave */
493 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
497 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
500 tun_pkey_ix = pkey_ix;
502 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
504 dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
506 /* get tunnel tx data buf for slave */
509 /* create ah. Just need an empty one with the port num for the post send.
510 * The driver will set the force loopback bit in post_send */
511 memset(&attr, 0, sizeof attr);
512 attr.port_num = port;
514 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
515 attr.ah_flags = IB_AH_GRH;
517 ah = ib_create_ah(tun_ctx->pd, &attr);
521 /* allocate tunnel tx buf after pass failure returns */
522 spin_lock(&tun_qp->tx_lock);
523 if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
524 (MLX4_NUM_TUNNEL_BUFS - 1))
527 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
528 spin_unlock(&tun_qp->tx_lock);
532 tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
533 if (tun_qp->tx_ring[tun_tx_ix].ah)
534 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
535 tun_qp->tx_ring[tun_tx_ix].ah = ah;
536 ib_dma_sync_single_for_cpu(&dev->ib_dev,
537 tun_qp->tx_ring[tun_tx_ix].buf.map,
538 sizeof (struct mlx4_rcv_tunnel_mad),
541 /* copy over to tunnel buffer */
543 memcpy(&tun_mad->grh, grh, sizeof *grh);
544 memcpy(&tun_mad->mad, mad, sizeof *mad);
546 /* adjust tunnel data */
547 tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
548 tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
549 tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
553 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
556 if (vlan != wc->vlan_id)
557 /* Packet vlan is not the VST-assigned vlan.
562 /* Remove the vlan tag before forwarding
563 * the packet to the VF.
570 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
571 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
572 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
574 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
575 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
578 ib_dma_sync_single_for_device(&dev->ib_dev,
579 tun_qp->tx_ring[tun_tx_ix].buf.map,
580 sizeof (struct mlx4_rcv_tunnel_mad),
583 list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
584 list.length = sizeof (struct mlx4_rcv_tunnel_mad);
585 list.lkey = tun_ctx->pd->local_dma_lkey;
589 wr.remote_qkey = IB_QP_SET_QKEY;
590 wr.remote_qpn = dqpn;
592 wr.wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
593 wr.wr.sg_list = &list;
595 wr.wr.opcode = IB_WR_SEND;
596 wr.wr.send_flags = IB_SEND_SIGNALED;
598 ret = ib_post_send(src_qp, &wr.wr, &bad_wr);
605 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
606 struct ib_wc *wc, struct ib_grh *grh,
609 struct mlx4_ib_dev *dev = to_mdev(ibdev);
615 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
621 if (!(wc->wc_flags & IB_WC_GRH)) {
622 mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
625 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
626 mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
629 err = mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave);
630 if (err && mlx4_is_mf_bonded(dev->dev)) {
631 other_port = (port == 1) ? 2 : 1;
632 err = mlx4_get_slave_from_roce_gid(dev->dev, other_port, grh->dgid.raw, &slave);
635 pr_debug("resolved slave %d from gid %pI6 wire port %d other %d\n",
636 slave, grh->dgid.raw, port, other_port);
640 mlx4_ib_warn(ibdev, "failed matching grh\n");
643 if (slave >= dev->dev->caps.sqp_demux) {
644 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
645 slave, dev->dev->caps.sqp_demux);
649 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
652 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
654 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
659 /* Initially assume that this mad is for us */
660 slave = mlx4_master_func_num(dev->dev);
662 /* See if the slave id is encoded in a response mad */
663 if (mad->mad_hdr.method & 0x80) {
664 slave_id = (u8 *) &mad->mad_hdr.tid;
666 if (slave != 255) /*255 indicates the dom0*/
667 *slave_id = 0; /* remap tid */
670 /* If a grh is present, we demux according to it */
671 if (wc->wc_flags & IB_WC_GRH) {
672 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
674 mlx4_ib_warn(ibdev, "failed matching grh\n");
678 /* Class-specific handling */
679 switch (mad->mad_hdr.mgmt_class) {
680 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
681 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
682 /* 255 indicates the dom0 */
683 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
684 if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
686 /* for a VF. drop unsolicited MADs */
687 if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
688 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
689 slave, mad->mad_hdr.mgmt_class,
690 mad->mad_hdr.method);
695 case IB_MGMT_CLASS_SUBN_ADM:
696 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
697 (struct ib_sa_mad *) mad))
700 case IB_MGMT_CLASS_CM:
701 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
704 case IB_MGMT_CLASS_DEVICE_MGMT:
705 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
709 /* Drop unsupported classes for slaves in tunnel mode */
710 if (slave != mlx4_master_func_num(dev->dev)) {
711 pr_debug("dropping unsupported ingress mad from class:%d "
712 "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
716 /*make sure that no slave==255 was not handled yet.*/
717 if (slave >= dev->dev->caps.sqp_demux) {
718 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
719 slave, dev->dev->caps.sqp_demux);
723 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
725 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
730 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
731 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
732 const struct ib_mad *in_mad, struct ib_mad *out_mad)
734 u16 slid, prev_lid = 0;
736 struct ib_port_attr pattr;
738 if (in_wc && in_wc->qp->qp_num) {
739 pr_debug("received MAD: slid:%d sqpn:%d "
740 "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
741 in_wc->slid, in_wc->src_qp,
742 in_wc->dlid_path_bits,
745 in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
746 be16_to_cpu(in_mad->mad_hdr.attr_id));
747 if (in_wc->wc_flags & IB_WC_GRH) {
748 pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
749 be64_to_cpu(in_grh->sgid.global.subnet_prefix),
750 be64_to_cpu(in_grh->sgid.global.interface_id));
751 pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
752 be64_to_cpu(in_grh->dgid.global.subnet_prefix),
753 be64_to_cpu(in_grh->dgid.global.interface_id));
757 slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
759 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
760 forward_trap(to_mdev(ibdev), port_num, in_mad);
761 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
764 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
765 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
766 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
767 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
768 in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
769 return IB_MAD_RESULT_SUCCESS;
772 * Don't process SMInfo queries -- the SMA can't handle them.
774 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
775 return IB_MAD_RESULT_SUCCESS;
776 } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
777 in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 ||
778 in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2 ||
779 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
780 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
781 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
782 return IB_MAD_RESULT_SUCCESS;
784 return IB_MAD_RESULT_SUCCESS;
786 if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
787 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
788 in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
789 in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
790 !ib_query_port(ibdev, port_num, &pattr))
791 prev_lid = pattr.lid;
793 err = mlx4_MAD_IFC(to_mdev(ibdev),
794 (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
795 (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
796 MLX4_MAD_IFC_NET_VIEW,
797 port_num, in_wc, in_grh, in_mad, out_mad);
799 return IB_MAD_RESULT_FAILURE;
801 if (!out_mad->mad_hdr.status) {
802 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
803 smp_snoop(ibdev, port_num, in_mad, prev_lid);
804 /* slaves get node desc from FW */
805 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
806 node_desc_override(ibdev, out_mad);
809 /* set return bit in status of directed route responses */
810 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
811 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
813 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
814 /* no response for trap repress */
815 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
817 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
820 static void edit_counter(struct mlx4_counter *cnt, void *counters,
824 case IB_PMA_PORT_COUNTERS:
826 struct ib_pma_portcounters *pma_cnt =
827 (struct ib_pma_portcounters *)counters;
829 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
830 (be64_to_cpu(cnt->tx_bytes) >> 2));
831 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
832 (be64_to_cpu(cnt->rx_bytes) >> 2));
833 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
834 be64_to_cpu(cnt->tx_frames));
835 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
836 be64_to_cpu(cnt->rx_frames));
839 case IB_PMA_PORT_COUNTERS_EXT:
841 struct ib_pma_portcounters_ext *pma_cnt_ext =
842 (struct ib_pma_portcounters_ext *)counters;
844 pma_cnt_ext->port_xmit_data =
845 cpu_to_be64(be64_to_cpu(cnt->tx_bytes) >> 2);
846 pma_cnt_ext->port_rcv_data =
847 cpu_to_be64(be64_to_cpu(cnt->rx_bytes) >> 2);
848 pma_cnt_ext->port_xmit_packets = cnt->tx_frames;
849 pma_cnt_ext->port_rcv_packets = cnt->rx_frames;
855 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
856 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
857 const struct ib_mad *in_mad, struct ib_mad *out_mad)
859 struct mlx4_counter counter_stats;
860 struct mlx4_ib_dev *dev = to_mdev(ibdev);
861 struct counter_index *tmp_counter;
862 int err = IB_MAD_RESULT_FAILURE, stats_avail = 0;
864 if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
867 memset(&counter_stats, 0, sizeof(counter_stats));
868 mutex_lock(&dev->counters_table[port_num - 1].mutex);
869 list_for_each_entry(tmp_counter,
870 &dev->counters_table[port_num - 1].counters_list,
872 err = mlx4_get_counter_stats(dev->dev,
876 err = IB_MAD_RESULT_FAILURE;
882 mutex_unlock(&dev->counters_table[port_num - 1].mutex);
884 memset(out_mad->data, 0, sizeof out_mad->data);
885 switch (counter_stats.counter_mode & 0xf) {
887 edit_counter(&counter_stats,
888 (void *)(out_mad->data + 40),
889 in_mad->mad_hdr.attr_id);
890 err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
893 err = IB_MAD_RESULT_FAILURE;
900 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
901 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
902 const struct ib_mad_hdr *in, size_t in_mad_size,
903 struct ib_mad_hdr *out, size_t *out_mad_size,
904 u16 *out_mad_pkey_index)
906 struct mlx4_ib_dev *dev = to_mdev(ibdev);
907 const struct ib_mad *in_mad = (const struct ib_mad *)in;
908 struct ib_mad *out_mad = (struct ib_mad *)out;
909 enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
911 if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
912 *out_mad_size != sizeof(*out_mad)))
913 return IB_MAD_RESULT_FAILURE;
915 /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
916 * queries, should be called only by VFs and for that specific purpose
918 if (link == IB_LINK_LAYER_INFINIBAND) {
919 if (mlx4_is_slave(dev->dev) &&
920 (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
921 (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS ||
922 in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT)))
923 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
924 in_grh, in_mad, out_mad);
926 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
927 in_grh, in_mad, out_mad);
930 if (link == IB_LINK_LAYER_ETHERNET)
931 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
932 in_grh, in_mad, out_mad);
937 static void send_handler(struct ib_mad_agent *agent,
938 struct ib_mad_send_wc *mad_send_wc)
940 if (mad_send_wc->send_buf->context[0])
941 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
942 ib_free_send_mad(mad_send_wc->send_buf);
945 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
947 struct ib_mad_agent *agent;
950 enum rdma_link_layer ll;
952 for (p = 0; p < dev->num_ports; ++p) {
953 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
954 for (q = 0; q <= 1; ++q) {
955 if (ll == IB_LINK_LAYER_INFINIBAND) {
956 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
957 q ? IB_QPT_GSI : IB_QPT_SMI,
958 NULL, 0, send_handler,
961 ret = PTR_ERR(agent);
964 dev->send_agent[p][q] = agent;
966 dev->send_agent[p][q] = NULL;
973 for (p = 0; p < dev->num_ports; ++p)
974 for (q = 0; q <= 1; ++q)
975 if (dev->send_agent[p][q])
976 ib_unregister_mad_agent(dev->send_agent[p][q]);
981 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
983 struct ib_mad_agent *agent;
986 for (p = 0; p < dev->num_ports; ++p) {
987 for (q = 0; q <= 1; ++q) {
988 agent = dev->send_agent[p][q];
990 dev->send_agent[p][q] = NULL;
991 ib_unregister_mad_agent(agent);
996 ib_destroy_ah(dev->sm_ah[p]);
1000 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
1002 mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
1004 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1005 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1006 MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
1009 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
1011 /* re-configure the alias-guid and mcg's */
1012 if (mlx4_is_master(dev->dev)) {
1013 mlx4_ib_invalidate_all_guid_record(dev, port_num);
1015 if (!dev->sriov.is_going_down) {
1016 mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
1017 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1018 MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
1021 mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
1024 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
1025 struct mlx4_eqe *eqe)
1027 __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
1028 GET_MASK_FROM_EQE(eqe));
1031 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
1032 u32 guid_tbl_blk_num, u32 change_bitmap)
1034 struct ib_smp *in_mad = NULL;
1035 struct ib_smp *out_mad = NULL;
1038 if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
1041 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
1042 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1043 if (!in_mad || !out_mad) {
1044 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1048 guid_tbl_blk_num *= 4;
1050 for (i = 0; i < 4; i++) {
1051 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1053 memset(in_mad, 0, sizeof *in_mad);
1054 memset(out_mad, 0, sizeof *out_mad);
1056 in_mad->base_version = 1;
1057 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1058 in_mad->class_version = 1;
1059 in_mad->method = IB_MGMT_METHOD_GET;
1060 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
1061 in_mad->attr_mod = cpu_to_be32(guid_tbl_blk_num + i);
1063 if (mlx4_MAD_IFC(dev,
1064 MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1065 port_num, NULL, NULL, in_mad, out_mad)) {
1066 mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1070 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1072 (u8 *)(&((struct ib_smp *)out_mad)->data));
1073 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1075 (u8 *)(&((struct ib_smp *)out_mad)->data));
1084 void handle_port_mgmt_change_event(struct work_struct *work)
1086 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1087 struct mlx4_ib_dev *dev = ew->ib_dev;
1088 struct mlx4_eqe *eqe = &(ew->ib_eqe);
1089 u8 port = eqe->event.port_mgmt_change.port;
1094 switch (eqe->subtype) {
1095 case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1096 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1098 /* Update the SM ah - This should be done before handling
1099 the other changed attributes so that MADs can be sent to the SM */
1100 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1101 u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1102 u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1103 update_sm_ah(dev, port, lid, sl);
1106 /* Check if it is a lid change event */
1107 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1108 handle_lid_change_event(dev, port);
1110 /* Generate GUID changed event */
1111 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1112 mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1113 /*if master, notify all slaves*/
1114 if (mlx4_is_master(dev->dev))
1115 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1116 MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1119 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1120 handle_client_rereg_event(dev, port);
1123 case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1124 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1125 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1126 propagate_pkey_ev(dev, port, eqe);
1128 case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1129 /* paravirtualized master's guid is guid 0 -- does not change */
1130 if (!mlx4_is_master(dev->dev))
1131 mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1132 /*if master, notify relevant slaves*/
1133 else if (!dev->sriov.is_going_down) {
1134 tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1135 change_bitmap = GET_MASK_FROM_EQE(eqe);
1136 handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1140 pr_warn("Unsupported subtype 0x%x for "
1141 "Port Management Change event\n", eqe->subtype);
1147 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1148 enum ib_event_type type)
1150 struct ib_event event;
1152 event.device = &dev->ib_dev;
1153 event.element.port_num = port_num;
1156 ib_dispatch_event(&event);
1159 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1161 unsigned long flags;
1162 struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1163 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1164 spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1165 if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1166 queue_work(ctx->wq, &ctx->work);
1167 spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1170 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1171 struct mlx4_ib_demux_pv_qp *tun_qp,
1174 struct ib_sge sg_list;
1175 struct ib_recv_wr recv_wr, *bad_recv_wr;
1178 size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1179 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1181 sg_list.addr = tun_qp->ring[index].map;
1182 sg_list.length = size;
1183 sg_list.lkey = ctx->pd->local_dma_lkey;
1185 recv_wr.next = NULL;
1186 recv_wr.sg_list = &sg_list;
1187 recv_wr.num_sge = 1;
1188 recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1189 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1190 ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1191 size, DMA_FROM_DEVICE);
1192 return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1195 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1196 int slave, struct ib_sa_mad *sa_mad)
1200 /* dispatch to different sa handlers */
1201 switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1202 case IB_SA_ATTR_MC_MEMBER_REC:
1203 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1211 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1213 int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1215 return (qpn >= proxy_start && qpn <= proxy_start + 1);
1219 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1220 enum ib_qp_type dest_qpt, u16 pkey_index,
1221 u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1222 u8 *s_mac, u16 vlan_id, struct ib_mad *mad)
1226 struct ib_send_wr *bad_wr;
1227 struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1228 struct mlx4_ib_demux_pv_qp *sqp;
1229 struct mlx4_mad_snd_buf *sqp_mad;
1231 struct ib_qp *send_qp = NULL;
1232 unsigned wire_tx_ix = 0;
1239 sqp_ctx = dev->sriov.sqps[port-1];
1241 /* check if proxy qp created */
1242 if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1245 if (dest_qpt == IB_QPT_SMI) {
1247 sqp = &sqp_ctx->qp[0];
1248 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1251 sqp = &sqp_ctx->qp[1];
1252 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1258 sgid_index = attr->grh.sgid_index;
1259 attr->grh.sgid_index = 0;
1260 ah = ib_create_ah(sqp_ctx->pd, attr);
1263 attr->grh.sgid_index = sgid_index;
1264 to_mah(ah)->av.ib.gid_index = sgid_index;
1265 /* get rid of force-loopback bit */
1266 to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1267 spin_lock(&sqp->tx_lock);
1268 if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1269 (MLX4_NUM_TUNNEL_BUFS - 1))
1272 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1273 spin_unlock(&sqp->tx_lock);
1277 sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1278 if (sqp->tx_ring[wire_tx_ix].ah)
1279 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1280 sqp->tx_ring[wire_tx_ix].ah = ah;
1281 ib_dma_sync_single_for_cpu(&dev->ib_dev,
1282 sqp->tx_ring[wire_tx_ix].buf.map,
1283 sizeof (struct mlx4_mad_snd_buf),
1286 memcpy(&sqp_mad->payload, mad, sizeof *mad);
1288 ib_dma_sync_single_for_device(&dev->ib_dev,
1289 sqp->tx_ring[wire_tx_ix].buf.map,
1290 sizeof (struct mlx4_mad_snd_buf),
1293 list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1294 list.length = sizeof (struct mlx4_mad_snd_buf);
1295 list.lkey = sqp_ctx->pd->local_dma_lkey;
1299 wr.pkey_index = wire_pkey_ix;
1300 wr.remote_qkey = qkey;
1301 wr.remote_qpn = remote_qpn;
1303 wr.wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1304 wr.wr.sg_list = &list;
1306 wr.wr.opcode = IB_WR_SEND;
1307 wr.wr.send_flags = IB_SEND_SIGNALED;
1309 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1310 if (vlan_id < 0x1000)
1311 vlan_id |= (attr->sl & 7) << 13;
1312 to_mah(ah)->av.eth.vlan = cpu_to_be16(vlan_id);
1315 ret = ib_post_send(send_qp, &wr.wr, &bad_wr);
1322 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1324 if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1326 return mlx4_get_base_gid_ix(dev->dev, slave, port);
1329 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1330 struct ib_ah_attr *ah_attr)
1332 if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1333 ah_attr->grh.sgid_index = slave;
1335 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1338 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1340 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1341 struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1342 int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1343 struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1344 struct mlx4_ib_ah ah;
1345 struct ib_ah_attr ah_attr;
1351 /* Get slave that sent this packet */
1352 if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1353 wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1354 (wc->src_qp & 0x1) != ctx->port - 1 ||
1356 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1359 slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1360 if (slave != ctx->slave) {
1361 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1362 "belongs to another slave\n", wc->src_qp);
1366 /* Map transaction ID */
1367 ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1368 sizeof (struct mlx4_tunnel_mad),
1370 switch (tunnel->mad.mad_hdr.method) {
1371 case IB_MGMT_METHOD_SET:
1372 case IB_MGMT_METHOD_GET:
1373 case IB_MGMT_METHOD_REPORT:
1374 case IB_SA_METHOD_GET_TABLE:
1375 case IB_SA_METHOD_DELETE:
1376 case IB_SA_METHOD_GET_MULTI:
1377 case IB_SA_METHOD_GET_TRACE_TBL:
1378 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1380 mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1381 "class:%d slave:%d\n", *slave_id,
1382 tunnel->mad.mad_hdr.mgmt_class, slave);
1390 /* Class-specific handling */
1391 switch (tunnel->mad.mad_hdr.mgmt_class) {
1392 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1393 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1394 if (slave != mlx4_master_func_num(dev->dev) &&
1395 !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1398 case IB_MGMT_CLASS_SUBN_ADM:
1399 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1400 (struct ib_sa_mad *) &tunnel->mad))
1403 case IB_MGMT_CLASS_CM:
1404 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1405 (struct ib_mad *) &tunnel->mad))
1408 case IB_MGMT_CLASS_DEVICE_MGMT:
1409 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1410 tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1414 /* Drop unsupported classes for slaves in tunnel mode */
1415 if (slave != mlx4_master_func_num(dev->dev)) {
1416 mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1417 "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1422 /* We are using standard ib_core services to send the mad, so generate a
1423 * stadard address handle by decoding the tunnelled mlx4_ah fields */
1424 memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1425 ah.ibah.device = ctx->ib_dev;
1427 port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1428 port = mlx4_slave_convert_port(dev->dev, slave, port);
1431 ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1433 mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1434 if (ah_attr.ah_flags & IB_AH_GRH)
1435 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1437 memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1438 vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1439 /* if slave have default vlan use it */
1440 mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1441 &vlan_id, &ah_attr.sl);
1443 mlx4_ib_send_to_wire(dev, slave, ctx->port,
1444 is_proxy_qp0(dev, wc->src_qp, slave) ?
1445 IB_QPT_SMI : IB_QPT_GSI,
1446 be16_to_cpu(tunnel->hdr.pkey_index),
1447 be32_to_cpu(tunnel->hdr.remote_qpn),
1448 be32_to_cpu(tunnel->hdr.qkey),
1449 &ah_attr, wc->smac, vlan_id, &tunnel->mad);
1452 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1453 enum ib_qp_type qp_type, int is_tun)
1456 struct mlx4_ib_demux_pv_qp *tun_qp;
1457 int rx_buf_size, tx_buf_size;
1459 if (qp_type > IB_QPT_GSI)
1462 tun_qp = &ctx->qp[qp_type];
1464 tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1469 tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1470 sizeof (struct mlx4_ib_tun_tx_buf),
1472 if (!tun_qp->tx_ring) {
1473 kfree(tun_qp->ring);
1474 tun_qp->ring = NULL;
1479 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1480 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1482 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1483 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1486 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1487 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1488 if (!tun_qp->ring[i].addr)
1490 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1491 tun_qp->ring[i].addr,
1494 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1495 kfree(tun_qp->ring[i].addr);
1500 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1501 tun_qp->tx_ring[i].buf.addr =
1502 kmalloc(tx_buf_size, GFP_KERNEL);
1503 if (!tun_qp->tx_ring[i].buf.addr)
1505 tun_qp->tx_ring[i].buf.map =
1506 ib_dma_map_single(ctx->ib_dev,
1507 tun_qp->tx_ring[i].buf.addr,
1510 if (ib_dma_mapping_error(ctx->ib_dev,
1511 tun_qp->tx_ring[i].buf.map)) {
1512 kfree(tun_qp->tx_ring[i].buf.addr);
1515 tun_qp->tx_ring[i].ah = NULL;
1517 spin_lock_init(&tun_qp->tx_lock);
1518 tun_qp->tx_ix_head = 0;
1519 tun_qp->tx_ix_tail = 0;
1520 tun_qp->proxy_qpt = qp_type;
1527 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1528 tx_buf_size, DMA_TO_DEVICE);
1529 kfree(tun_qp->tx_ring[i].buf.addr);
1531 kfree(tun_qp->tx_ring);
1532 tun_qp->tx_ring = NULL;
1533 i = MLX4_NUM_TUNNEL_BUFS;
1537 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1538 rx_buf_size, DMA_FROM_DEVICE);
1539 kfree(tun_qp->ring[i].addr);
1541 kfree(tun_qp->ring);
1542 tun_qp->ring = NULL;
1546 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1547 enum ib_qp_type qp_type, int is_tun)
1550 struct mlx4_ib_demux_pv_qp *tun_qp;
1551 int rx_buf_size, tx_buf_size;
1553 if (qp_type > IB_QPT_GSI)
1556 tun_qp = &ctx->qp[qp_type];
1558 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1559 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1561 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1562 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1566 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1567 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1568 rx_buf_size, DMA_FROM_DEVICE);
1569 kfree(tun_qp->ring[i].addr);
1572 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1573 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1574 tx_buf_size, DMA_TO_DEVICE);
1575 kfree(tun_qp->tx_ring[i].buf.addr);
1576 if (tun_qp->tx_ring[i].ah)
1577 ib_destroy_ah(tun_qp->tx_ring[i].ah);
1579 kfree(tun_qp->tx_ring);
1580 kfree(tun_qp->ring);
1583 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1585 struct mlx4_ib_demux_pv_ctx *ctx;
1586 struct mlx4_ib_demux_pv_qp *tun_qp;
1589 ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1590 ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1592 while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1593 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1594 if (wc.status == IB_WC_SUCCESS) {
1595 switch (wc.opcode) {
1597 mlx4_ib_multiplex_mad(ctx, &wc);
1598 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1600 (MLX4_NUM_TUNNEL_BUFS - 1));
1602 pr_err("Failed reposting tunnel "
1603 "buf:%lld\n", wc.wr_id);
1606 pr_debug("received tunnel send completion:"
1607 "wrid=0x%llx, status=0x%x\n",
1608 wc.wr_id, wc.status);
1609 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1610 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1611 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1613 spin_lock(&tun_qp->tx_lock);
1614 tun_qp->tx_ix_tail++;
1615 spin_unlock(&tun_qp->tx_lock);
1622 pr_debug("mlx4_ib: completion error in tunnel: %d."
1623 " status = %d, wrid = 0x%llx\n",
1624 ctx->slave, wc.status, wc.wr_id);
1625 if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1626 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1627 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1628 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1630 spin_lock(&tun_qp->tx_lock);
1631 tun_qp->tx_ix_tail++;
1632 spin_unlock(&tun_qp->tx_lock);
1638 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1640 struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1642 /* It's worse than that! He's dead, Jim! */
1643 pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1644 event->event, sqp->port);
1647 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1648 enum ib_qp_type qp_type, int create_tun)
1651 struct mlx4_ib_demux_pv_qp *tun_qp;
1652 struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1653 struct ib_qp_attr attr;
1654 int qp_attr_mask_INIT;
1656 if (qp_type > IB_QPT_GSI)
1659 tun_qp = &ctx->qp[qp_type];
1661 memset(&qp_init_attr, 0, sizeof qp_init_attr);
1662 qp_init_attr.init_attr.send_cq = ctx->cq;
1663 qp_init_attr.init_attr.recv_cq = ctx->cq;
1664 qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1665 qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1666 qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1667 qp_init_attr.init_attr.cap.max_send_sge = 1;
1668 qp_init_attr.init_attr.cap.max_recv_sge = 1;
1670 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1671 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1672 qp_init_attr.port = ctx->port;
1673 qp_init_attr.slave = ctx->slave;
1674 qp_init_attr.proxy_qp_type = qp_type;
1675 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1676 IB_QP_QKEY | IB_QP_PORT;
1678 qp_init_attr.init_attr.qp_type = qp_type;
1679 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1680 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1682 qp_init_attr.init_attr.port_num = ctx->port;
1683 qp_init_attr.init_attr.qp_context = ctx;
1684 qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1685 tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1686 if (IS_ERR(tun_qp->qp)) {
1687 ret = PTR_ERR(tun_qp->qp);
1689 pr_err("Couldn't create %s QP (%d)\n",
1690 create_tun ? "tunnel" : "special", ret);
1694 memset(&attr, 0, sizeof attr);
1695 attr.qp_state = IB_QPS_INIT;
1698 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1699 ctx->port, IB_DEFAULT_PKEY_FULL,
1701 if (ret || !create_tun)
1703 to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1704 attr.qkey = IB_QP1_QKEY;
1705 attr.port_num = ctx->port;
1706 ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1708 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1709 create_tun ? "tunnel" : "special", ret);
1712 attr.qp_state = IB_QPS_RTR;
1713 ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1715 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1716 create_tun ? "tunnel" : "special", ret);
1719 attr.qp_state = IB_QPS_RTS;
1721 ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1723 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1724 create_tun ? "tunnel" : "special", ret);
1728 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1729 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1731 pr_err(" mlx4_ib_post_pv_buf error"
1732 " (err = %d, i = %d)\n", ret, i);
1739 ib_destroy_qp(tun_qp->qp);
1745 * IB MAD completion callback for real SQPs
1747 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1749 struct mlx4_ib_demux_pv_ctx *ctx;
1750 struct mlx4_ib_demux_pv_qp *sqp;
1755 ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1756 ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1758 while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1759 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1760 if (wc.status == IB_WC_SUCCESS) {
1761 switch (wc.opcode) {
1763 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1764 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1765 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1767 spin_lock(&sqp->tx_lock);
1769 spin_unlock(&sqp->tx_lock);
1772 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1773 (sqp->ring[wc.wr_id &
1774 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1775 grh = &(((struct mlx4_mad_rcv_buf *)
1776 (sqp->ring[wc.wr_id &
1777 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1778 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1779 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1780 (MLX4_NUM_TUNNEL_BUFS - 1)))
1781 pr_err("Failed reposting SQP "
1782 "buf:%lld\n", wc.wr_id);
1789 pr_debug("mlx4_ib: completion error in tunnel: %d."
1790 " status = %d, wrid = 0x%llx\n",
1791 ctx->slave, wc.status, wc.wr_id);
1792 if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1793 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1794 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1795 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1797 spin_lock(&sqp->tx_lock);
1799 spin_unlock(&sqp->tx_lock);
1805 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1806 struct mlx4_ib_demux_pv_ctx **ret_ctx)
1808 struct mlx4_ib_demux_pv_ctx *ctx;
1811 ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1813 pr_err("failed allocating pv resource context "
1814 "for port %d, slave %d\n", port, slave);
1818 ctx->ib_dev = &dev->ib_dev;
1825 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1827 if (dev->sriov.demux[port - 1].tun[slave]) {
1828 kfree(dev->sriov.demux[port - 1].tun[slave]);
1829 dev->sriov.demux[port - 1].tun[slave] = NULL;
1833 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1834 int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1837 struct ib_cq_init_attr cq_attr = {};
1839 if (ctx->state != DEMUX_PV_STATE_DOWN)
1842 ctx->state = DEMUX_PV_STATE_STARTING;
1843 /* have QP0 only if link layer is IB */
1844 if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1845 IB_LINK_LAYER_INFINIBAND)
1849 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1851 pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1856 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1858 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1862 cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1866 cq_attr.cqe = cq_size;
1867 ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1868 NULL, ctx, &cq_attr);
1869 if (IS_ERR(ctx->cq)) {
1870 ret = PTR_ERR(ctx->cq);
1871 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1875 ctx->pd = ib_alloc_pd(ctx->ib_dev);
1876 if (IS_ERR(ctx->pd)) {
1877 ret = PTR_ERR(ctx->pd);
1878 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1883 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1885 pr_err("Couldn't create %s QP0 (%d)\n",
1886 create_tun ? "tunnel for" : "", ret);
1891 ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1893 pr_err("Couldn't create %s QP1 (%d)\n",
1894 create_tun ? "tunnel for" : "", ret);
1899 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1901 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1903 ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1905 ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1907 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1910 ctx->state = DEMUX_PV_STATE_ACTIVE;
1915 ib_destroy_qp(ctx->qp[1].qp);
1916 ctx->qp[1].qp = NULL;
1921 ib_destroy_qp(ctx->qp[0].qp);
1922 ctx->qp[0].qp = NULL;
1925 ib_dealloc_pd(ctx->pd);
1929 ib_destroy_cq(ctx->cq);
1933 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1937 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1939 ctx->state = DEMUX_PV_STATE_DOWN;
1943 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1944 struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1948 if (ctx->state > DEMUX_PV_STATE_DOWN) {
1949 ctx->state = DEMUX_PV_STATE_DOWNING;
1951 flush_workqueue(ctx->wq);
1953 ib_destroy_qp(ctx->qp[0].qp);
1954 ctx->qp[0].qp = NULL;
1955 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1957 ib_destroy_qp(ctx->qp[1].qp);
1958 ctx->qp[1].qp = NULL;
1959 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1960 ib_dealloc_pd(ctx->pd);
1962 ib_destroy_cq(ctx->cq);
1964 ctx->state = DEMUX_PV_STATE_DOWN;
1968 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1969 int port, int do_init)
1974 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1975 /* for master, destroy real sqp resources */
1976 if (slave == mlx4_master_func_num(dev->dev))
1977 destroy_pv_resources(dev, slave, port,
1978 dev->sriov.sqps[port - 1], 1);
1979 /* destroy the tunnel qp resources */
1980 destroy_pv_resources(dev, slave, port,
1981 dev->sriov.demux[port - 1].tun[slave], 1);
1985 /* create the tunnel qp resources */
1986 ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1987 dev->sriov.demux[port - 1].tun[slave]);
1989 /* for master, create the real sqp resources */
1990 if (!ret && slave == mlx4_master_func_num(dev->dev))
1991 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1992 dev->sriov.sqps[port - 1]);
1996 void mlx4_ib_tunnels_update_work(struct work_struct *work)
1998 struct mlx4_ib_demux_work *dmxw;
2000 dmxw = container_of(work, struct mlx4_ib_demux_work, work);
2001 mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
2007 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
2008 struct mlx4_ib_demux_ctx *ctx,
2015 ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
2016 sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
2022 ctx->ib_dev = &dev->ib_dev;
2025 i < min(dev->dev->caps.sqp_demux,
2026 (u16)(dev->dev->persist->num_vfs + 1));
2028 struct mlx4_active_ports actv_ports =
2029 mlx4_get_active_ports(dev->dev, i);
2031 if (!test_bit(port - 1, actv_ports.ports))
2034 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
2041 ret = mlx4_ib_mcg_port_init(ctx);
2043 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2047 snprintf(name, sizeof name, "mlx4_ibt%d", port);
2048 ctx->wq = create_singlethread_workqueue(name);
2050 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2055 snprintf(name, sizeof name, "mlx4_ibud%d", port);
2056 ctx->ud_wq = create_singlethread_workqueue(name);
2058 pr_err("Failed to create up/down WQ for port %d\n", port);
2066 destroy_workqueue(ctx->wq);
2070 mlx4_ib_mcg_port_cleanup(ctx, 1);
2072 for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2073 free_pv_object(dev, i, port);
2079 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2081 if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2082 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2083 flush_workqueue(sqp_ctx->wq);
2084 if (sqp_ctx->has_smi) {
2085 ib_destroy_qp(sqp_ctx->qp[0].qp);
2086 sqp_ctx->qp[0].qp = NULL;
2087 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2089 ib_destroy_qp(sqp_ctx->qp[1].qp);
2090 sqp_ctx->qp[1].qp = NULL;
2091 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2092 ib_dealloc_pd(sqp_ctx->pd);
2094 ib_destroy_cq(sqp_ctx->cq);
2096 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2100 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2104 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2105 mlx4_ib_mcg_port_cleanup(ctx, 1);
2106 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2109 if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2110 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2112 flush_workqueue(ctx->wq);
2113 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2114 destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2115 free_pv_object(dev, i, ctx->port);
2118 destroy_workqueue(ctx->ud_wq);
2119 destroy_workqueue(ctx->wq);
2123 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2127 if (!mlx4_is_master(dev->dev))
2129 /* initialize or tear down tunnel QPs for the master */
2130 for (i = 0; i < dev->dev->caps.num_ports; i++)
2131 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2135 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2140 if (!mlx4_is_mfunc(dev->dev))
2143 dev->sriov.is_going_down = 0;
2144 spin_lock_init(&dev->sriov.going_down_lock);
2145 mlx4_ib_cm_paravirt_init(dev);
2147 mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2149 if (mlx4_is_slave(dev->dev)) {
2150 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2154 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2155 if (i == mlx4_master_func_num(dev->dev))
2156 mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2158 mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2161 err = mlx4_ib_init_alias_guid_service(dev);
2163 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2166 err = mlx4_ib_device_register_sysfs(dev);
2168 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2172 mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2173 dev->dev->caps.sqp_demux);
2174 for (i = 0; i < dev->num_ports; i++) {
2176 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2179 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2180 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2181 &dev->sriov.sqps[i]);
2184 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2188 mlx4_ib_master_tunnels(dev, 1);
2192 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2195 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2196 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2198 mlx4_ib_device_unregister_sysfs(dev);
2201 mlx4_ib_destroy_alias_guid_service(dev);
2204 mlx4_ib_cm_paravirt_clean(dev, -1);
2209 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2212 unsigned long flags;
2214 if (!mlx4_is_mfunc(dev->dev))
2217 spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2218 dev->sriov.is_going_down = 1;
2219 spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2220 if (mlx4_is_master(dev->dev)) {
2221 for (i = 0; i < dev->num_ports; i++) {
2222 flush_workqueue(dev->sriov.demux[i].ud_wq);
2223 mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2224 kfree(dev->sriov.sqps[i]);
2225 dev->sriov.sqps[i] = NULL;
2226 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2229 mlx4_ib_cm_paravirt_clean(dev, -1);
2230 mlx4_ib_destroy_alias_guid_service(dev);
2231 mlx4_ib_device_unregister_sysfs(dev);