2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/mlx5/cmd.h>
34 #include <linux/mlx5/vport.h>
35 #include <rdma/ib_mad.h>
36 #include <rdma/ib_smi.h>
37 #include <rdma/ib_pma.h>
41 MLX5_IB_VENDOR_CLASS1 = 0x9,
42 MLX5_IB_VENDOR_CLASS2 = 0xa
45 static bool can_do_mad_ifc(struct mlx5_ib_dev *dev, u8 port_num,
46 struct ib_mad *in_mad)
48 if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED &&
49 in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
51 return dev->mdev->port_caps[port_num - 1].has_smi;
54 int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
55 u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
56 const void *in_mad, void *response_mad)
60 if (!can_do_mad_ifc(dev, port, (struct ib_mad *)in_mad))
63 /* Key check traps can't be generated unless we have in_wc to
64 * tell us where to send the trap.
66 if (ignore_mkey || !in_wc)
68 if (ignore_bkey || !in_wc)
71 return mlx5_core_mad_ifc(dev->mdev, in_mad, response_mad, op_modifier, port);
74 static int process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
75 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
76 const struct ib_mad *in_mad, struct ib_mad *out_mad)
81 slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
83 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0)
84 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
86 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
87 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
88 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
89 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
90 in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
91 return IB_MAD_RESULT_SUCCESS;
93 /* Don't process SMInfo queries -- the SMA can't handle them.
95 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
96 return IB_MAD_RESULT_SUCCESS;
97 } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
98 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS1 ||
99 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS2 ||
100 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
101 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
102 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
103 return IB_MAD_RESULT_SUCCESS;
105 return IB_MAD_RESULT_SUCCESS;
108 err = mlx5_MAD_IFC(to_mdev(ibdev),
109 mad_flags & IB_MAD_IGNORE_MKEY,
110 mad_flags & IB_MAD_IGNORE_BKEY,
111 port_num, in_wc, in_grh, in_mad, out_mad);
113 return IB_MAD_RESULT_FAILURE;
115 /* set return bit in status of directed route responses */
116 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
117 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
119 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
120 /* no response for trap repress */
121 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
123 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
126 static void pma_cnt_ext_assign(struct ib_pma_portcounters_ext *pma_cnt_ext,
129 #define MLX5_SUM_CNT(p, cntr1, cntr2) \
130 (MLX5_GET64(query_vport_counter_out, p, cntr1) + \
131 MLX5_GET64(query_vport_counter_out, p, cntr2))
133 pma_cnt_ext->port_xmit_data =
134 cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.octets,
135 transmitted_ib_multicast.octets) >> 2);
136 pma_cnt_ext->port_rcv_data =
137 cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.octets,
138 received_ib_multicast.octets) >> 2);
139 pma_cnt_ext->port_xmit_packets =
140 cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.packets,
141 transmitted_ib_multicast.packets));
142 pma_cnt_ext->port_rcv_packets =
143 cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.packets,
144 received_ib_multicast.packets));
145 pma_cnt_ext->port_unicast_xmit_packets =
146 MLX5_GET64_BE(query_vport_counter_out,
147 out, transmitted_ib_unicast.packets);
148 pma_cnt_ext->port_unicast_rcv_packets =
149 MLX5_GET64_BE(query_vport_counter_out,
150 out, received_ib_unicast.packets);
151 pma_cnt_ext->port_multicast_xmit_packets =
152 MLX5_GET64_BE(query_vport_counter_out,
153 out, transmitted_ib_multicast.packets);
154 pma_cnt_ext->port_multicast_rcv_packets =
155 MLX5_GET64_BE(query_vport_counter_out,
156 out, received_ib_multicast.packets);
159 static void pma_cnt_assign(struct ib_pma_portcounters *pma_cnt,
162 /* Traffic counters will be reported in
163 * their 64bit form via ib_pma_portcounters_ext by default.
165 void *out_pma = MLX5_ADDR_OF(ppcnt_reg, out,
168 #define MLX5_ASSIGN_PMA_CNTR(counter_var, counter_name) { \
169 counter_var = MLX5_GET_BE(typeof(counter_var), \
170 ib_port_cntrs_grp_data_layout, \
171 out_pma, counter_name); \
174 MLX5_ASSIGN_PMA_CNTR(pma_cnt->symbol_error_counter,
175 symbol_error_counter);
176 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_error_recovery_counter,
177 link_error_recovery_counter);
178 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_downed_counter,
179 link_downed_counter);
180 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_errors,
182 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_remphys_errors,
183 port_rcv_remote_physical_errors);
184 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_switch_relay_errors,
185 port_rcv_switch_relay_errors);
186 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_discards,
188 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_constraint_errors,
189 port_xmit_constraint_errors);
190 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_wait,
192 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_constraint_errors,
193 port_rcv_constraint_errors);
194 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_overrun_errors,
195 link_overrun_errors);
196 MLX5_ASSIGN_PMA_CNTR(pma_cnt->vl15_dropped,
200 static int process_pma_cmd(struct ib_device *ibdev, u8 port_num,
201 const struct ib_mad *in_mad, struct ib_mad *out_mad)
203 struct mlx5_ib_dev *dev = to_mdev(ibdev);
207 /* Decalring support of extended counters */
208 if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO) {
209 struct ib_class_port_info cpi = {};
211 cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
212 memcpy((out_mad->data + 40), &cpi, sizeof(cpi));
213 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
216 if (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT) {
217 struct ib_pma_portcounters_ext *pma_cnt_ext =
218 (struct ib_pma_portcounters_ext *)(out_mad->data + 40);
219 int sz = MLX5_ST_SZ_BYTES(query_vport_counter_out);
221 out_cnt = mlx5_vzalloc(sz);
223 return IB_MAD_RESULT_FAILURE;
225 err = mlx5_core_query_vport_counter(dev->mdev, 0, 0,
226 port_num, out_cnt, sz);
228 pma_cnt_ext_assign(pma_cnt_ext, out_cnt);
230 struct ib_pma_portcounters *pma_cnt =
231 (struct ib_pma_portcounters *)(out_mad->data + 40);
232 int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
234 out_cnt = mlx5_vzalloc(sz);
236 return IB_MAD_RESULT_FAILURE;
238 err = mlx5_core_query_ib_ppcnt(dev->mdev, port_num,
241 pma_cnt_assign(pma_cnt, out_cnt);
246 return IB_MAD_RESULT_FAILURE;
248 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
251 int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
252 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
253 const struct ib_mad_hdr *in, size_t in_mad_size,
254 struct ib_mad_hdr *out, size_t *out_mad_size,
255 u16 *out_mad_pkey_index)
257 struct mlx5_ib_dev *dev = to_mdev(ibdev);
258 struct mlx5_core_dev *mdev = dev->mdev;
259 const struct ib_mad *in_mad = (const struct ib_mad *)in;
260 struct ib_mad *out_mad = (struct ib_mad *)out;
262 if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
263 *out_mad_size != sizeof(*out_mad)))
264 return IB_MAD_RESULT_FAILURE;
266 memset(out_mad->data, 0, sizeof(out_mad->data));
268 if (MLX5_CAP_GEN(mdev, vport_counters) &&
269 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
270 in_mad->mad_hdr.method == IB_MGMT_METHOD_GET) {
271 return process_pma_cmd(ibdev, port_num, in_mad, out_mad);
273 return process_mad(ibdev, mad_flags, port_num, in_wc, in_grh,
278 int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
280 struct ib_smp *in_mad = NULL;
281 struct ib_smp *out_mad = NULL;
285 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
286 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
287 if (!in_mad || !out_mad)
290 init_query_mad(in_mad);
291 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
292 in_mad->attr_mod = cpu_to_be32(port);
294 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
296 packet_error = be16_to_cpu(out_mad->status);
298 dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
299 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
307 int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev,
308 struct ib_smp *out_mad)
310 struct ib_smp *in_mad = NULL;
313 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
317 init_query_mad(in_mad);
318 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
320 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad,
327 int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev,
328 __be64 *sys_image_guid)
330 struct ib_smp *out_mad = NULL;
333 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
337 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
341 memcpy(sys_image_guid, out_mad->data + 4, 8);
349 int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev,
352 struct ib_smp *out_mad = NULL;
355 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
359 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
363 *max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
371 int mlx5_query_mad_ifc_vendor_id(struct ib_device *ibdev,
374 struct ib_smp *out_mad = NULL;
377 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
381 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
385 *vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 0xffff;
393 int mlx5_query_mad_ifc_node_desc(struct mlx5_ib_dev *dev, char *node_desc)
395 struct ib_smp *in_mad = NULL;
396 struct ib_smp *out_mad = NULL;
399 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
400 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
401 if (!in_mad || !out_mad)
404 init_query_mad(in_mad);
405 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
407 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
411 memcpy(node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
418 int mlx5_query_mad_ifc_node_guid(struct mlx5_ib_dev *dev, __be64 *node_guid)
420 struct ib_smp *in_mad = NULL;
421 struct ib_smp *out_mad = NULL;
424 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
425 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
426 if (!in_mad || !out_mad)
429 init_query_mad(in_mad);
430 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
432 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
436 memcpy(node_guid, out_mad->data + 12, 8);
443 int mlx5_query_mad_ifc_pkey(struct ib_device *ibdev, u8 port, u16 index,
446 struct ib_smp *in_mad = NULL;
447 struct ib_smp *out_mad = NULL;
450 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
451 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
452 if (!in_mad || !out_mad)
455 init_query_mad(in_mad);
456 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
457 in_mad->attr_mod = cpu_to_be32(index / 32);
459 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
464 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
472 int mlx5_query_mad_ifc_gids(struct ib_device *ibdev, u8 port, int index,
475 struct ib_smp *in_mad = NULL;
476 struct ib_smp *out_mad = NULL;
479 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
480 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
481 if (!in_mad || !out_mad)
484 init_query_mad(in_mad);
485 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
486 in_mad->attr_mod = cpu_to_be32(port);
488 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
493 memcpy(gid->raw, out_mad->data + 8, 8);
495 init_query_mad(in_mad);
496 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
497 in_mad->attr_mod = cpu_to_be32(index / 8);
499 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
504 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
512 int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
513 struct ib_port_attr *props)
515 struct mlx5_ib_dev *dev = to_mdev(ibdev);
516 struct mlx5_core_dev *mdev = dev->mdev;
517 struct ib_smp *in_mad = NULL;
518 struct ib_smp *out_mad = NULL;
519 int ext_active_speed;
522 if (port < 1 || port > MLX5_CAP_GEN(mdev, num_ports)) {
523 mlx5_ib_warn(dev, "invalid port number %d\n", port);
527 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
528 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
529 if (!in_mad || !out_mad)
532 /* props being zeroed by the caller, avoid zeroing it here */
534 init_query_mad(in_mad);
535 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
536 in_mad->attr_mod = cpu_to_be32(port);
538 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
540 mlx5_ib_warn(dev, "err %d\n", err);
544 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
545 props->lmc = out_mad->data[34] & 0x7;
546 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
547 props->sm_sl = out_mad->data[36] & 0xf;
548 props->state = out_mad->data[32] & 0xf;
549 props->phys_state = out_mad->data[33] >> 4;
550 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
551 props->gid_tbl_len = out_mad->data[50];
552 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
553 props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len;
554 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
555 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
556 props->active_width = out_mad->data[31] & 0xf;
557 props->active_speed = out_mad->data[35] >> 4;
558 props->max_mtu = out_mad->data[41] & 0xf;
559 props->active_mtu = out_mad->data[36] >> 4;
560 props->subnet_timeout = out_mad->data[51] & 0x1f;
561 props->max_vl_num = out_mad->data[37] >> 4;
562 props->init_type_reply = out_mad->data[41] >> 4;
564 /* Check if extended speeds (EDR/FDR/...) are supported */
565 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
566 ext_active_speed = out_mad->data[62] >> 4;
568 switch (ext_active_speed) {
570 props->active_speed = 16; /* FDR */
573 props->active_speed = 32; /* EDR */
578 /* If reported active speed is QDR, check if is FDR-10 */
579 if (props->active_speed == 4) {
580 if (mdev->port_caps[port - 1].ext_port_cap &
581 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
582 init_query_mad(in_mad);
583 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
584 in_mad->attr_mod = cpu_to_be32(port);
586 err = mlx5_MAD_IFC(dev, 1, 1, port,
587 NULL, NULL, in_mad, out_mad);
591 /* Checking LinkSpeedActive for FDR-10 */
592 if (out_mad->data[15] & 0x1)
593 props->active_speed = 8;