1 /*******************************************************************
2 * This file is part of the Emulex RoCE Device Driver for *
3 * RoCE (RDMA over Converged Ethernet) adapters. *
4 * Copyright (C) 2008-2012 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
20 * Contact Information:
21 * linux-drivers@emulex.com
25 * Costa Mesa, CA 92626
26 *******************************************************************/
31 #include <linux/mutex.h>
32 #include <linux/list.h>
33 #include <linux/spinlock.h>
34 #include <linux/pci.h>
36 #include <rdma/ib_verbs.h>
37 #include <rdma/ib_user_verbs.h>
40 #include "ocrdma_sli.h"
42 #define OCRDMA_ROCE_DRV_VERSION "10.2.145.0u"
44 #define OCRDMA_ROCE_DRV_DESC "Emulex OneConnect RoCE Driver"
45 #define OCRDMA_NODE_DESC "Emulex OneConnect RoCE HCA"
47 #define OC_NAME_SH OCRDMA_NODE_DESC "(Skyhawk)"
48 #define OC_NAME_UNKNOWN OCRDMA_NODE_DESC "(Unknown)"
50 #define OC_SKH_DEVICE_PF 0x720
51 #define OC_SKH_DEVICE_VF 0x728
52 #define OCRDMA_MAX_AH 512
54 #define OCRDMA_UVERBS(CMD_NAME) (1ull << IB_USER_VERBS_CMD_##CMD_NAME)
56 #define convert_to_64bit(lo, hi) ((u64)hi << 32 | (u64)lo)
58 struct ocrdma_dev_attr {
80 int max_pages_per_frmr;
85 u8 cq_overflow_detect;
91 u8 local_ca_ack_delay;
96 struct ocrdma_dma_mem {
107 struct ocrdma_queue_info {
112 u16 entry_size; /* Size of an element in the queue */
113 u16 id; /* qid, where to ring the doorbell. */
119 struct ocrdma_queue_info q;
122 struct ocrdma_dev *dev;
127 struct ocrdma_queue_info sq;
128 struct ocrdma_queue_info cq;
133 struct mutex lock; /* for serializing mailbox commands on MQ */
134 wait_queue_head_t cmd_wait;
141 struct ocrdma_hw_mr {
152 struct ocrdma_pbl *pbl_table;
163 struct ib_umem *umem;
164 struct ocrdma_hw_mr hwmr;
167 struct ocrdma_stats {
169 struct ocrdma_dev *dev;
173 struct ocrdma_mqe mqe;
181 u16 auto_speeds_supported;
182 u16 fixed_speeds_supported;
188 struct ib_device ibdev;
189 struct ocrdma_dev_attr attr;
191 struct mutex dev_lock; /* provides syncronise access to device data */
192 spinlock_t flush_q_lock ____cacheline_aligned;
194 struct ocrdma_cq **cq_tbl;
195 struct ocrdma_qp **qp_tbl;
197 struct ocrdma_eq *eq_tbl;
202 union ib_gid *sgid_tbl;
203 /* provided synchronization to sgid table for
204 * updating gid entries triggered by notifier.
206 spinlock_t sgid_lock;
209 struct ocrdma_cq *gsi_sqcq;
210 struct ocrdma_cq *gsi_rqcq;
213 struct ocrdma_av *va;
217 /* provide synchronization for av
222 struct ocrdma_pbl pbl;
227 struct mqe_ctx mqe_ctx;
229 struct be_dev_info nic_info;
231 char model_number[32];
234 struct list_head entry;
237 struct ocrdma_mr *stag_arr[OCRDMA_MAX_STAG];
241 ulong last_stats_time;
242 struct mutex stats_lock; /* provide synch for debugfs operations */
243 struct stats_mem stats_mem;
244 struct ocrdma_stats rsrc_stats;
245 struct ocrdma_stats rx_stats;
246 struct ocrdma_stats wqe_stats;
247 struct ocrdma_stats tx_stats;
248 struct ocrdma_stats db_err_stats;
249 struct ocrdma_stats tx_qp_err_stats;
250 struct ocrdma_stats rx_qp_err_stats;
251 struct ocrdma_stats tx_dbg_stats;
252 struct ocrdma_stats rx_dbg_stats;
258 struct ocrdma_cqe *va;
260 u32 getp; /* pointer to pending wrs to
261 * return to stack, wrap arounds
266 bool deferred_arm, deferred_sol;
269 spinlock_t cq_lock ____cacheline_aligned; /* provide synchronization
272 /* syncronizes cq completion handler invoked from multiple context */
273 spinlock_t comp_handler_lock ____cacheline_aligned;
277 struct ocrdma_ucontext *ucontext;
282 /* head of all qp's sq and rq for which cqes need to be flushed
285 struct list_head sq_head, rq_head;
290 struct ocrdma_dev *dev;
291 struct ocrdma_ucontext *uctx;
300 struct ocrdma_av *av;
305 struct ocrdma_qp_hwq_info {
306 u8 *va; /* virtual address */
312 u16 dbid; /* qid, where to ring the doorbell. */
320 struct ocrdma_qp_hwq_info rq;
325 /* provide synchronization to multiple context(s) posting rqe */
326 spinlock_t q_lock ____cacheline_aligned;
328 struct ocrdma_pd *pd;
334 struct ocrdma_dev *dev;
337 struct ocrdma_qp_hwq_info sq;
340 uint16_t dpp_wqe_idx;
347 /* provide synchronization to multiple context(s) posting wqe, rqe */
348 spinlock_t q_lock ____cacheline_aligned;
349 struct ocrdma_cq *sq_cq;
350 /* list maintained per CQ to flush SQ errors */
351 struct list_head sq_entry;
354 struct ocrdma_qp_hwq_info rq;
356 struct ocrdma_cq *rq_cq;
357 struct ocrdma_srq *srq;
358 /* list maintained per CQ to flush RQ errors */
359 struct list_head rq_entry;
361 enum ocrdma_qp_state state; /* QP state */
363 u32 max_ord, max_ird;
366 struct ocrdma_pd *pd;
368 enum ib_qp_type qp_type;
379 struct ocrdma_ucontext {
380 struct ib_ucontext ibucontext;
382 struct list_head mm_head;
383 struct mutex mm_list_lock; /* protects list entries of mm type */
384 struct ocrdma_pd *cntxt_pd;
399 struct list_head entry;
402 static inline struct ocrdma_dev *get_ocrdma_dev(struct ib_device *ibdev)
404 return container_of(ibdev, struct ocrdma_dev, ibdev);
407 static inline struct ocrdma_ucontext *get_ocrdma_ucontext(struct ib_ucontext
410 return container_of(ibucontext, struct ocrdma_ucontext, ibucontext);
413 static inline struct ocrdma_pd *get_ocrdma_pd(struct ib_pd *ibpd)
415 return container_of(ibpd, struct ocrdma_pd, ibpd);
418 static inline struct ocrdma_cq *get_ocrdma_cq(struct ib_cq *ibcq)
420 return container_of(ibcq, struct ocrdma_cq, ibcq);
423 static inline struct ocrdma_qp *get_ocrdma_qp(struct ib_qp *ibqp)
425 return container_of(ibqp, struct ocrdma_qp, ibqp);
428 static inline struct ocrdma_mr *get_ocrdma_mr(struct ib_mr *ibmr)
430 return container_of(ibmr, struct ocrdma_mr, ibmr);
433 static inline struct ocrdma_ah *get_ocrdma_ah(struct ib_ah *ibah)
435 return container_of(ibah, struct ocrdma_ah, ibah);
438 static inline struct ocrdma_srq *get_ocrdma_srq(struct ib_srq *ibsrq)
440 return container_of(ibsrq, struct ocrdma_srq, ibsrq);
443 static inline int is_cqe_valid(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe)
446 cqe_valid = le32_to_cpu(cqe->flags_status_srcqpn) & OCRDMA_CQE_VALID;
447 return (cqe_valid == cq->phase);
450 static inline int is_cqe_for_sq(struct ocrdma_cqe *cqe)
452 return (le32_to_cpu(cqe->flags_status_srcqpn) &
453 OCRDMA_CQE_QTYPE) ? 0 : 1;
456 static inline int is_cqe_invalidated(struct ocrdma_cqe *cqe)
458 return (le32_to_cpu(cqe->flags_status_srcqpn) &
459 OCRDMA_CQE_INVALIDATE) ? 1 : 0;
462 static inline int is_cqe_imm(struct ocrdma_cqe *cqe)
464 return (le32_to_cpu(cqe->flags_status_srcqpn) &
465 OCRDMA_CQE_IMM) ? 1 : 0;
468 static inline int is_cqe_wr_imm(struct ocrdma_cqe *cqe)
470 return (le32_to_cpu(cqe->flags_status_srcqpn) &
471 OCRDMA_CQE_WRITE_IMM) ? 1 : 0;
474 static inline int ocrdma_resolve_dmac(struct ocrdma_dev *dev,
475 struct ib_ah_attr *ah_attr, u8 *mac_addr)
479 memcpy(&in6, ah_attr->grh.dgid.raw, sizeof(in6));
480 if (rdma_is_multicast_addr(&in6))
481 rdma_get_mcast_mac(&in6, mac_addr);
483 memcpy(mac_addr, ah_attr->dmac, ETH_ALEN);
487 static inline char *hca_name(struct ocrdma_dev *dev)
489 switch (dev->nic_info.pdev->device) {
490 case OC_SKH_DEVICE_PF:
491 case OC_SKH_DEVICE_VF:
494 return OC_NAME_UNKNOWN;
498 static inline int ocrdma_get_eq_table_index(struct ocrdma_dev *dev,
503 for (indx = 0; indx < dev->eq_cnt; indx++) {
504 if (dev->eq_tbl[indx].q.id == eqid)
511 static inline u8 ocrdma_get_asic_type(struct ocrdma_dev *dev)
513 if (dev->nic_info.dev_family == 0xF && !dev->asic_id) {
514 pci_read_config_dword(
516 OCRDMA_SLI_ASIC_ID_OFFSET, &dev->asic_id);
519 return (dev->asic_id & OCRDMA_SLI_ASIC_GEN_NUM_MASK) >>
520 OCRDMA_SLI_ASIC_GEN_NUM_SHIFT;