1 /* QLogic qedr NIC Driver
2 * Copyright (c) 2015-2016 QLogic Corporation
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <rdma/ib_addr.h>
37 #include <linux/qed/qed_if.h>
38 #include <linux/qed/qed_chain.h>
39 #include <linux/qed/qed_roce_if.h>
40 #include <linux/qed/qede_roce.h>
41 #include <linux/qed/roce_common.h>
42 #include "qedr_hsi_rdma.h"
44 #define QEDR_MODULE_VERSION "8.10.10.0"
45 #define QEDR_NODE_DESC "QLogic 579xx RoCE HCA"
46 #define DP_NAME(dev) ((dev)->ibdev.name)
48 #define DP_DEBUG(dev, module, fmt, ...) \
49 pr_debug("(%s) " module ": " fmt, \
50 DP_NAME(dev) ? DP_NAME(dev) : "", ## __VA_ARGS__)
52 #define QEDR_MSG_INIT "INIT"
53 #define QEDR_MSG_MISC "MISC"
54 #define QEDR_MSG_CQ " CQ"
55 #define QEDR_MSG_MR " MR"
56 #define QEDR_MSG_RQ " RQ"
57 #define QEDR_MSG_SQ " SQ"
58 #define QEDR_MSG_QP " QP"
59 #define QEDR_MSG_GSI " GSI"
61 #define QEDR_CQ_MAGIC_NUMBER (0x11223344)
68 struct qed_sb_info *sb;
75 #define QEDR_MAX_SGID 128
77 struct qedr_device_attr {
89 u8 max_qp_resp_rd_atomic_resc;
90 u8 max_qp_req_rd_atomic_resc;
91 u64 max_dev_resp_rd_atomic_resc;
99 u32 max_mr_mw_fmr_pbl;
100 u64 max_mr_mw_fmr_size;
113 u32 bad_pkey_counter;
114 struct qed_rdma_events events;
117 #define QEDR_ENET_STATE_BIT (0)
120 struct ib_device ibdev;
121 struct qed_dev *cdev;
122 struct pci_dev *pdev;
123 struct net_device *ndev;
125 enum ib_atomic_cap atomic_cap;
128 struct qedr_device_attr attr;
130 const struct qed_rdma_ops *ops;
131 struct qed_int_info int_info;
133 struct qed_sb_info *sb_array;
134 struct qedr_cnq *cnq_array;
138 void __iomem *db_addr;
143 union ib_gid *sgid_tbl;
145 /* Lock for sgid table */
146 spinlock_t sgid_lock;
154 u8 gsi_ll2_mac_address[ETH_ALEN];
156 struct qedr_cq *gsi_sqcq;
157 struct qedr_cq *gsi_rqcq;
158 struct qedr_qp *gsi_qp;
160 unsigned long enet_state;
163 #define QEDR_MAX_SQ_PBL (0x8000)
164 #define QEDR_MAX_SQ_PBL_ENTRIES (0x10000 / sizeof(void *))
165 #define QEDR_SQE_ELEMENT_SIZE (sizeof(struct rdma_sq_sge))
166 #define QEDR_MAX_SQE_ELEMENTS_PER_SQE (ROCE_REQ_MAX_SINGLE_SQ_WQE_SIZE / \
167 QEDR_SQE_ELEMENT_SIZE)
168 #define QEDR_MAX_SQE_ELEMENTS_PER_PAGE ((RDMA_RING_PAGE_SIZE) / \
169 QEDR_SQE_ELEMENT_SIZE)
170 #define QEDR_MAX_SQE ((QEDR_MAX_SQ_PBL_ENTRIES) *\
171 (RDMA_RING_PAGE_SIZE) / \
172 (QEDR_SQE_ELEMENT_SIZE) /\
173 (QEDR_MAX_SQE_ELEMENTS_PER_SQE))
175 #define QEDR_MAX_RQ_PBL (0x2000)
176 #define QEDR_MAX_RQ_PBL_ENTRIES (0x10000 / sizeof(void *))
177 #define QEDR_RQE_ELEMENT_SIZE (sizeof(struct rdma_rq_sge))
178 #define QEDR_MAX_RQE_ELEMENTS_PER_RQE (RDMA_MAX_SGE_PER_RQ_WQE)
179 #define QEDR_MAX_RQE_ELEMENTS_PER_PAGE ((RDMA_RING_PAGE_SIZE) / \
180 QEDR_RQE_ELEMENT_SIZE)
181 #define QEDR_MAX_RQE ((QEDR_MAX_RQ_PBL_ENTRIES) *\
182 (RDMA_RING_PAGE_SIZE) / \
183 (QEDR_RQE_ELEMENT_SIZE) /\
184 (QEDR_MAX_RQE_ELEMENTS_PER_RQE))
186 #define QEDR_CQE_SIZE (sizeof(union rdma_cqe))
187 #define QEDR_MAX_CQE_PBL_SIZE (512 * 1024)
188 #define QEDR_MAX_CQE_PBL_ENTRIES (((QEDR_MAX_CQE_PBL_SIZE) / \
190 #define QEDR_MAX_CQES ((u32)((QEDR_MAX_CQE_PBL_ENTRIES) * \
191 (QED_CHAIN_PAGE_SIZE) / QEDR_CQE_SIZE))
193 #define QEDR_ROCE_MAX_CNQ_SIZE (0x4000)
195 #define QEDR_MAX_PORT (1)
196 #define QEDR_PORT (1)
198 #define QEDR_UVERBS(CMD_NAME) (1ull << IB_USER_VERBS_CMD_##CMD_NAME)
200 #define QEDR_ROCE_PKEY_MAX 1
201 #define QEDR_ROCE_PKEY_TABLE_LEN 1
202 #define QEDR_ROCE_PKEY_DEFAULT 0xffff
205 struct list_head list_entry;
210 struct qedr_ucontext {
211 struct ib_ucontext ibucontext;
212 struct qedr_dev *dev;
219 struct list_head mm_head;
221 /* Lock to protect mm list */
222 struct mutex mm_list_lock;
226 struct rdma_pwm_val32_data data;
236 struct qedr_pbl_info {
245 struct ib_umem *umem;
246 struct qedr_pbl_info pbl_info;
247 struct qedr_pbl *pbl_tbl;
255 enum qedr_cq_type cq_type;
260 /* Lock to protect multiplem CQ's */
263 struct qed_chain pbl;
265 void __iomem *db_addr;
269 union rdma_cqe *latest_cqe;
270 union rdma_cqe *toggle_cqe;
282 struct qedr_ucontext *uctx;
290 struct list_head entry;
294 struct rdma_pwm_val16_data data;
298 struct qedr_qp_hwq_info {
300 struct qed_chain pbl;
313 union db_prod32 db_data;
316 #define QEDR_INC_SW_IDX(p_info, index) \
318 p_info->index = (p_info->index + 1) & \
319 qed_chain_get_capacity(p_info->pbl) \
322 enum qedr_qp_err_bitmap {
323 QEDR_QP_ERR_SQ_FULL = 1,
324 QEDR_QP_ERR_RQ_FULL = 2,
325 QEDR_QP_ERR_BAD_SR = 4,
326 QEDR_QP_ERR_BAD_RR = 8,
327 QEDR_QP_ERR_SQ_PBL_FULL = 16,
328 QEDR_QP_ERR_RQ_PBL_FULL = 32,
332 struct ib_qp ibqp; /* must be first */
333 struct qedr_dev *dev;
335 struct qedr_qp_hwq_info sq;
336 struct qedr_qp_hwq_info rq;
342 struct qedr_cq *sq_cq;
343 struct qedr_cq *rq_cq;
344 struct qedr_srq *srq;
345 enum qed_roce_qp_state state;
348 enum ib_qp_type qp_type;
349 struct qed_rdma_qp *qed_qp;
359 /* Relevant to qps created from kernel space only (ULPs) */
368 enum ib_wc_opcode opcode;
372 dma_addr_t icrc_mapping;
380 struct ib_sge sg_list[RDMA_MAX_SGE_PER_RQ_WQE];
388 /* Relevant to qps created from user space only (applications) */
389 struct qedr_userq usq;
390 struct qedr_userq urq;
395 struct rdma_ah_attr attr;
406 struct qedr_pbl *pbl_table;
407 struct qedr_pbl_info pbl_info;
408 struct list_head free_pbl_list;
409 struct list_head inuse_pbl_list;
411 u32 completed_handled;
416 struct ib_umem *umem;
418 struct qed_rdma_register_tid_in_params hw_mr;
419 enum qedr_mr_type type;
421 struct qedr_dev *dev;
428 #define SET_FIELD2(value, name, flag) ((value) |= ((flag) << (name ## _SHIFT)))
430 #define QEDR_RESP_IMM (RDMA_CQE_RESPONDER_IMM_FLG_MASK << \
431 RDMA_CQE_RESPONDER_IMM_FLG_SHIFT)
432 #define QEDR_RESP_RDMA (RDMA_CQE_RESPONDER_RDMA_FLG_MASK << \
433 RDMA_CQE_RESPONDER_RDMA_FLG_SHIFT)
434 #define QEDR_RESP_INV (RDMA_CQE_RESPONDER_INV_FLG_MASK << \
435 RDMA_CQE_RESPONDER_INV_FLG_SHIFT)
437 static inline void qedr_inc_sw_cons(struct qedr_qp_hwq_info *info)
439 info->cons = (info->cons + 1) % info->max_wr;
443 static inline void qedr_inc_sw_prod(struct qedr_qp_hwq_info *info)
445 info->prod = (info->prod + 1) % info->max_wr;
448 static inline int qedr_get_dmac(struct qedr_dev *dev,
449 struct rdma_ah_attr *ah_attr, u8 *mac_addr)
451 union ib_gid zero_sgid = { { 0 } };
453 const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
456 if (!memcmp(&grh->dgid, &zero_sgid, sizeof(union ib_gid))) {
457 DP_ERR(dev, "Local port GID not supported\n");
458 eth_zero_addr(mac_addr);
462 memcpy(&in6, grh->dgid.raw, sizeof(in6));
463 dmac = rdma_ah_retrieve_dmac(ah_attr);
466 ether_addr_copy(mac_addr, dmac);
472 struct qedr_ucontext *get_qedr_ucontext(struct ib_ucontext *ibucontext)
474 return container_of(ibucontext, struct qedr_ucontext, ibucontext);
477 static inline struct qedr_dev *get_qedr_dev(struct ib_device *ibdev)
479 return container_of(ibdev, struct qedr_dev, ibdev);
482 static inline struct qedr_pd *get_qedr_pd(struct ib_pd *ibpd)
484 return container_of(ibpd, struct qedr_pd, ibpd);
487 static inline struct qedr_cq *get_qedr_cq(struct ib_cq *ibcq)
489 return container_of(ibcq, struct qedr_cq, ibcq);
492 static inline struct qedr_qp *get_qedr_qp(struct ib_qp *ibqp)
494 return container_of(ibqp, struct qedr_qp, ibqp);
497 static inline struct qedr_ah *get_qedr_ah(struct ib_ah *ibah)
499 return container_of(ibah, struct qedr_ah, ibah);
502 static inline struct qedr_mr *get_qedr_mr(struct ib_mr *ibmr)
504 return container_of(ibmr, struct qedr_mr, ibmr);