drivers/infiniband/hw/qib/qib_driver.c

   1 /*
   2  * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/spinlock.h>
  35 #include <linux/pci.h>
  36 #include <linux/io.h>
  37 #include <linux/delay.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/vmalloc.h>
  40 #include <linux/module.h>
  41
  42 #include "qib.h"
  43
  44 /*
  45  * The size has to be longer than this string, so we can append
  46  * board/chip information to it in the init code.
  47  */
  48 const char ib_qib_version[] = QIB_IDSTR "\n";
  49
  50 DEFINE_SPINLOCK(qib_devs_lock);
  51 LIST_HEAD(qib_dev_list);
  52 DEFINE_MUTEX(qib_mutex);        /* general driver use */
  53
  54 unsigned qib_ibmtu;
  55 module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO);
  56 MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
  57
  58 unsigned qib_compat_ddr_negotiate = 1;
  59 module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint,
  60                    S_IWUSR | S_IRUGO);
  61 MODULE_PARM_DESC(compat_ddr_negotiate,
  62                  "Attempt pre-IBTA 1.2 DDR speed negotiation");
  63
  64 MODULE_LICENSE("Dual BSD/GPL");
  65 MODULE_AUTHOR("QLogic <support@qlogic.com>");
  66 MODULE_DESCRIPTION("QLogic IB driver");
  67
  68 /*
  69  * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our
  70  * PIO send buffers.  This is well beyond anything currently
  71  * defined in the InfiniBand spec.
  72  */
  73 #define QIB_PIO_MAXIBHDR 128
  74
  75 /*
  76  * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt.
  77  */
  78 #define QIB_MAX_PKT_RECV 64
  79
  80 struct qlogic_ib_stats qib_stats;
  81
  82 const char *qib_get_unit_name(int unit)
  83 {
  84         static char iname[16];
  85
  86         snprintf(iname, sizeof iname, "infinipath%u", unit);
  87         return iname;
  88 }
  89
  90 /*
  91  * Return count of units with at least one port ACTIVE.
  92  */
  93 int qib_count_active_units(void)
  94 {
  95         struct qib_devdata *dd;
  96         struct qib_pportdata *ppd;
  97         unsigned long flags;
  98         int pidx, nunits_active = 0;
  99
 100         spin_lock_irqsave(&qib_devs_lock, flags);
 101         list_for_each_entry(dd, &qib_dev_list, list) {
 102                 if (!(dd->flags & QIB_PRESENT) || !dd->kregbase)
 103                         continue;
 104                 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 105                         ppd = dd->pport + pidx;
 106                         if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
 107                                          QIBL_LINKARMED | QIBL_LINKACTIVE))) {
 108                                 nunits_active++;
 109                                 break;
 110                         }
 111                 }
 112         }
 113         spin_unlock_irqrestore(&qib_devs_lock, flags);
 114         return nunits_active;
 115 }
 116
 117 /*
 118  * Return count of all units, optionally return in arguments
 119  * the number of usable (present) units, and the number of
 120  * ports that are up.
 121  */
 122 int qib_count_units(int *npresentp, int *nupp)
 123 {
 124         int nunits = 0, npresent = 0, nup = 0;
 125         struct qib_devdata *dd;
 126         unsigned long flags;
 127         int pidx;
 128         struct qib_pportdata *ppd;
 129
 130         spin_lock_irqsave(&qib_devs_lock, flags);
 131
 132         list_for_each_entry(dd, &qib_dev_list, list) {
 133                 nunits++;
 134                 if ((dd->flags & QIB_PRESENT) && dd->kregbase)
 135                         npresent++;
 136                 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 137                         ppd = dd->pport + pidx;
 138                         if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
 139                                          QIBL_LINKARMED | QIBL_LINKACTIVE)))
 140                                 nup++;
 141                 }
 142         }
 143
 144         spin_unlock_irqrestore(&qib_devs_lock, flags);
 145
 146         if (npresentp)
 147                 *npresentp = npresent;
 148         if (nupp)
 149                 *nupp = nup;
 150
 151         return nunits;
 152 }
 153
 154 /**
 155  * qib_wait_linkstate - wait for an IB link state change to occur
 156  * @dd: the qlogic_ib device
 157  * @state: the state to wait for
 158  * @msecs: the number of milliseconds to wait
 159  *
 160  * wait up to msecs milliseconds for IB link state change to occur for
 161  * now, take the easy polling route.  Currently used only by
 162  * qib_set_linkstate.  Returns 0 if state reached, otherwise
 163  * -ETIMEDOUT state can have multiple states set, for any of several
 164  * transitions.
 165  */
 166 int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs)
 167 {
 168         int ret;
 169         unsigned long flags;
 170
 171         spin_lock_irqsave(&ppd->lflags_lock, flags);
 172         if (ppd->state_wanted) {
 173                 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
 174                 ret = -EBUSY;
 175                 goto bail;
 176         }
 177         ppd->state_wanted = state;
 178         spin_unlock_irqrestore(&ppd->lflags_lock, flags);
 179         wait_event_interruptible_timeout(ppd->state_wait,
 180                                          (ppd->lflags & state),
 181                                          msecs_to_jiffies(msecs));
 182         spin_lock_irqsave(&ppd->lflags_lock, flags);
 183         ppd->state_wanted = 0;
 184         spin_unlock_irqrestore(&ppd->lflags_lock, flags);
 185
 186         if (!(ppd->lflags & state))
 187                 ret = -ETIMEDOUT;
 188         else
 189                 ret = 0;
 190 bail:
 191         return ret;
 192 }
 193
 194 int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate)
 195 {
 196         u32 lstate;
 197         int ret;
 198         struct qib_devdata *dd = ppd->dd;
 199         unsigned long flags;
 200
 201         switch (newstate) {
 202         case QIB_IB_LINKDOWN_ONLY:
 203                 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
 204                                  IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP);
 205                 /* don't wait */
 206                 ret = 0;
 207                 goto bail;
 208
 209         case QIB_IB_LINKDOWN:
 210                 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
 211                                  IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
 212                 /* don't wait */
 213                 ret = 0;
 214                 goto bail;
 215
 216         case QIB_IB_LINKDOWN_SLEEP:
 217                 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
 218                                  IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP);
 219                 /* don't wait */
 220                 ret = 0;
 221                 goto bail;
 222
 223         case QIB_IB_LINKDOWN_DISABLE:
 224                 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
 225                                  IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE);
 226                 /* don't wait */
 227                 ret = 0;
 228                 goto bail;
 229
 230         case QIB_IB_LINKARM:
 231                 if (ppd->lflags & QIBL_LINKARMED) {
 232                         ret = 0;
 233                         goto bail;
 234                 }
 235                 if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) {
 236                         ret = -EINVAL;
 237                         goto bail;
 238                 }
 239                 /*
 240                  * Since the port can be ACTIVE when we ask for ARMED,
 241                  * clear QIBL_LINKV so we can wait for a transition.
 242                  * If the link isn't ARMED, then something else happened
 243                  * and there is no point waiting for ARMED.
 244                  */
 245                 spin_lock_irqsave(&ppd->lflags_lock, flags);
 246                 ppd->lflags &= ~QIBL_LINKV;
 247                 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
 248                 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
 249                                  IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP);
 250                 lstate = QIBL_LINKV;
 251                 break;
 252
 253         case QIB_IB_LINKACTIVE:
 254                 if (ppd->lflags & QIBL_LINKACTIVE) {
 255                         ret = 0;
 256                         goto bail;
 257                 }
 258                 if (!(ppd->lflags & QIBL_LINKARMED)) {
 259                         ret = -EINVAL;
 260                         goto bail;
 261                 }
 262                 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
 263                                  IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP);
 264                 lstate = QIBL_LINKACTIVE;
 265                 break;
 266
 267         default:
 268                 ret = -EINVAL;
 269                 goto bail;
 270         }
 271         ret = qib_wait_linkstate(ppd, lstate, 10);
 272
 273 bail:
 274         return ret;
 275 }
 276
 277 /*
 278  * Get address of eager buffer from it's index (allocated in chunks, not
 279  * contiguous).
 280  */
 281 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail)
 282 {
 283         const u32 chunk = etail / rcd->rcvegrbufs_perchunk;
 284         const u32 idx =  etail % rcd->rcvegrbufs_perchunk;
 285
 286         return rcd->rcvegrbuf[chunk] + idx * rcd->dd->rcvegrbufsize;
 287 }
 288
 289 /*
 290  * Returns 1 if error was a CRC, else 0.
 291  * Needed for some chip's synthesized error counters.
 292  */
 293 static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd,
 294                           u32 ctxt, u32 eflags, u32 l, u32 etail,
 295                           __le32 *rhf_addr, struct qib_message_header *rhdr)
 296 {
 297         u32 ret = 0;
 298
 299         if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR))
 300                 ret = 1;
 301         else if (eflags == QLOGIC_IB_RHF_H_TIDERR) {
 302                 /* For TIDERR and RC QPs premptively schedule a NAK */
 303                 struct qib_ib_header *hdr = (struct qib_ib_header *) rhdr;
 304                 struct qib_other_headers *ohdr = NULL;
 305                 struct qib_ibport *ibp = &ppd->ibport_data;
 306                 struct qib_qp *qp = NULL;
 307                 u32 tlen = qib_hdrget_length_in_bytes(rhf_addr);
 308                 u16 lid  = be16_to_cpu(hdr->lrh[1]);
 309                 int lnh = be16_to_cpu(hdr->lrh[0]) & 3;
 310                 u32 qp_num;
 311                 u32 opcode;
 312                 u32 psn;
 313                 int diff;
 314                 unsigned long flags;
 315
 316                 /* Sanity check packet */
 317                 if (tlen < 24)
 318                         goto drop;
 319
 320                 if (lid < QIB_MULTICAST_LID_BASE) {
 321                         lid &= ~((1 << ppd->lmc) - 1);
 322                         if (unlikely(lid != ppd->lid))
 323                                 goto drop;
 324                 }
 325
 326                 /* Check for GRH */
 327                 if (lnh == QIB_LRH_BTH)
 328                         ohdr = &hdr->u.oth;
 329                 else if (lnh == QIB_LRH_GRH) {
 330                         u32 vtf;
 331
 332                         ohdr = &hdr->u.l.oth;
 333                         if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
 334                                 goto drop;
 335                         vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
 336                         if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
 337                                 goto drop;
 338                 } else
 339                         goto drop;
 340
 341                 /* Get opcode and PSN from packet */
 342                 opcode = be32_to_cpu(ohdr->bth[0]);
 343                 opcode >>= 24;
 344                 psn = be32_to_cpu(ohdr->bth[2]);
 345
 346                 /* Get the destination QP number. */
 347                 qp_num = be32_to_cpu(ohdr->bth[1]) & QIB_QPN_MASK;
 348                 if (qp_num != QIB_MULTICAST_QPN) {
 349                         int ruc_res;
 350                         qp = qib_lookup_qpn(ibp, qp_num);
 351                         if (!qp)
 352                                 goto drop;
 353
 354                         /*
 355                          * Handle only RC QPs - for other QP types drop error
 356                          * packet.
 357                          */
 358                         spin_lock(&qp->r_lock);
 359
 360                         /* Check for valid receive state. */
 361                         if (!(ib_qib_state_ops[qp->state] &
 362                               QIB_PROCESS_RECV_OK)) {
 363                                 ibp->n_pkt_drops++;
 364                                 goto unlock;
 365                         }
 366
 367                         switch (qp->ibqp.qp_type) {
 368                         case IB_QPT_RC:
 369                                 spin_lock_irqsave(&qp->s_lock, flags);
 370                                 ruc_res =
 371                                         qib_ruc_check_hdr(
 372                                                 ibp, hdr,
 373                                                 lnh == QIB_LRH_GRH,
 374                                                 qp,
 375                                                 be32_to_cpu(ohdr->bth[0]));
 376                                 if (ruc_res) {
 377                                         spin_unlock_irqrestore(&qp->s_lock,
 378                                                                flags);
 379                                         goto unlock;
 380                                 }
 381                                 spin_unlock_irqrestore(&qp->s_lock, flags);
 382
 383                                 /* Only deal with RDMA Writes for now */
 384                                 if (opcode <
 385                                     IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
 386                                         diff = qib_cmp24(psn, qp->r_psn);
 387                                         if (!qp->r_nak_state && diff >= 0) {
 388                                                 ibp->n_rc_seqnak++;
 389                                                 qp->r_nak_state =
 390                                                         IB_NAK_PSN_ERROR;
 391                                                 /* Use the expected PSN. */
 392                                                 qp->r_ack_psn = qp->r_psn;
 393                                                 /*
 394                                                  * Wait to send the sequence
 395                                                  * NAK until all packets
 396                                                  * in the receive queue have
 397                                                  * been processed.
 398                                                  * Otherwise, we end up
 399                                                  * propagating congestion.
 400                                                  */
 401                                                 if (list_empty(&qp->rspwait)) {
 402                                                         qp->r_flags |=
 403                                                                 QIB_R_RSP_NAK;
 404                                                         atomic_inc(
 405                                                                 &qp->refcount);
 406                                                         list_add_tail(
 407                                                          &qp->rspwait,
 408                                                          &rcd->qp_wait_list);
 409                                                 }
 410                                         } /* Out of sequence NAK */
 411                                 } /* QP Request NAKs */
 412                                 break;
 413                         case IB_QPT_SMI:
 414                         case IB_QPT_GSI:
 415                         case IB_QPT_UD:
 416                         case IB_QPT_UC:
 417                         default:
 418                                 /* For now don't handle any other QP types */
 419                                 break;
 420                         }
 421
 422 unlock:
 423                         spin_unlock(&qp->r_lock);
 424                         /*
 425                          * Notify qib_destroy_qp() if it is waiting
 426                          * for us to finish.
 427                          */
 428                         if (atomic_dec_and_test(&qp->refcount))
 429                                 wake_up(&qp->wait);
 430                 } /* Unicast QP */
 431         } /* Valid packet with TIDErr */
 432
 433 drop:
 434         return ret;
 435 }
 436
 437 /*
 438  * qib_kreceive - receive a packet
 439  * @rcd: the qlogic_ib context
 440  * @llic: gets count of good packets needed to clear lli,
 441  *          (used with chips that need need to track crcs for lli)
 442  *
 443  * called from interrupt handler for errors or receive interrupt
 444  * Returns number of CRC error packets, needed by some chips for
 445  * local link integrity tracking.   crcs are adjusted down by following
 446  * good packets, if any, and count of good packets is also tracked.
 447  */
 448 u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
 449 {
 450         struct qib_devdata *dd = rcd->dd;
 451         struct qib_pportdata *ppd = rcd->ppd;
 452         __le32 *rhf_addr;
 453         void *ebuf;
 454         const u32 rsize = dd->rcvhdrentsize;        /* words */
 455         const u32 maxcnt = dd->rcvhdrcnt * rsize;   /* words */
 456         u32 etail = -1, l, hdrqtail;
 457         struct qib_message_header *hdr;
 458         u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0;
 459         int last;
 460         u64 lval;
 461         struct qib_qp *qp, *nqp;
 462
 463         l = rcd->head;
 464         rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
 465         if (dd->flags & QIB_NODMA_RTAIL) {
 466                 u32 seq = qib_hdrget_seq(rhf_addr);
 467                 if (seq != rcd->seq_cnt)
 468                         goto bail;
 469                 hdrqtail = 0;
 470         } else {
 471                 hdrqtail = qib_get_rcvhdrtail(rcd);
 472                 if (l == hdrqtail)
 473                         goto bail;
 474                 smp_rmb();  /* prevent speculative reads of dma'ed hdrq */
 475         }
 476
 477         for (last = 0, i = 1; !last; i += !last) {
 478                 hdr = dd->f_get_msgheader(dd, rhf_addr);
 479                 eflags = qib_hdrget_err_flags(rhf_addr);
 480                 etype = qib_hdrget_rcv_type(rhf_addr);
 481                 /* total length */
 482                 tlen = qib_hdrget_length_in_bytes(rhf_addr);
 483                 ebuf = NULL;
 484                 if ((dd->flags & QIB_NODMA_RTAIL) ?
 485                     qib_hdrget_use_egr_buf(rhf_addr) :
 486                     (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
 487                         etail = qib_hdrget_index(rhf_addr);
 488                         updegr = 1;
 489                         if (tlen > sizeof(*hdr) ||
 490                             etype >= RCVHQ_RCV_TYPE_NON_KD)
 491                                 ebuf = qib_get_egrbuf(rcd, etail);
 492                 }
 493                 if (!eflags) {
 494                         u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2;
 495
 496                         if (lrh_len != tlen) {
 497                                 qib_stats.sps_lenerrs++;
 498                                 goto move_along;
 499                         }
 500                 }
 501                 if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags &&
 502                     ebuf == NULL &&
 503                     tlen > (dd->rcvhdrentsize - 2 + 1 -
 504                                 qib_hdrget_offset(rhf_addr)) << 2) {
 505                         goto move_along;
 506                 }
 507
 508                 /*
 509                  * Both tiderr and qibhdrerr are set for all plain IB
 510                  * packets; only qibhdrerr should be set.
 511                  */
 512                 if (unlikely(eflags))
 513                         crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l,
 514                                                etail, rhf_addr, hdr);
 515                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
 516                         qib_ib_rcv(rcd, hdr, ebuf, tlen);
 517                         if (crcs)
 518                                 crcs--;
 519                         else if (llic && *llic)
 520                                 --*llic;
 521                 }
 522 move_along:
 523                 l += rsize;
 524                 if (l >= maxcnt)
 525                         l = 0;
 526                 if (i == QIB_MAX_PKT_RECV)
 527                         last = 1;
 528
 529                 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
 530                 if (dd->flags & QIB_NODMA_RTAIL) {
 531                         u32 seq = qib_hdrget_seq(rhf_addr);
 532
 533                         if (++rcd->seq_cnt > 13)
 534                                 rcd->seq_cnt = 1;
 535                         if (seq != rcd->seq_cnt)
 536                                 last = 1;
 537                 } else if (l == hdrqtail)
 538                         last = 1;
 539                 /*
 540                  * Update head regs etc., every 16 packets, if not last pkt,
 541                  * to help prevent rcvhdrq overflows, when many packets
 542                  * are processed and queue is nearly full.
 543                  * Don't request an interrupt for intermediate updates.
 544                  */
 545                 lval = l;
 546                 if (!last && !(i & 0xf)) {
 547                         dd->f_update_usrhead(rcd, lval, updegr, etail, i);
 548                         updegr = 0;
 549                 }
 550         }
 551
 552         rcd->head = l;
 553         rcd->pkt_count += i;
 554
 555         /*
 556          * Iterate over all QPs waiting to respond.
 557          * The list won't change since the IRQ is only run on one CPU.
 558          */
 559         list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
 560                 list_del_init(&qp->rspwait);
 561                 if (qp->r_flags & QIB_R_RSP_NAK) {
 562                         qp->r_flags &= ~QIB_R_RSP_NAK;
 563                         qib_send_rc_ack(qp);
 564                 }
 565                 if (qp->r_flags & QIB_R_RSP_SEND) {
 566                         unsigned long flags;
 567
 568                         qp->r_flags &= ~QIB_R_RSP_SEND;
 569                         spin_lock_irqsave(&qp->s_lock, flags);
 570                         if (ib_qib_state_ops[qp->state] &
 571                                         QIB_PROCESS_OR_FLUSH_SEND)
 572                                 qib_schedule_send(qp);
 573                         spin_unlock_irqrestore(&qp->s_lock, flags);
 574                 }
 575                 if (atomic_dec_and_test(&qp->refcount))
 576                         wake_up(&qp->wait);
 577         }
 578
 579 bail:
 580         /* Report number of packets consumed */
 581         if (npkts)
 582                 *npkts = i;
 583
 584         /*
 585          * Always write head at end, and setup rcv interrupt, even
 586          * if no packets were processed.
 587          */
 588         lval = (u64)rcd->head | dd->rhdrhead_intr_off;
 589         dd->f_update_usrhead(rcd, lval, updegr, etail, i);
 590         return crcs;
 591 }
 592
 593 /**
 594  * qib_set_mtu - set the MTU
 595  * @ppd: the perport data
 596  * @arg: the new MTU
 597  *
 598  * We can handle "any" incoming size, the issue here is whether we
 599  * need to restrict our outgoing size.   For now, we don't do any
 600  * sanity checking on this, and we don't deal with what happens to
 601  * programs that are already running when the size changes.
 602  * NOTE: changing the MTU will usually cause the IBC to go back to
 603  * link INIT state...
 604  */
 605 int qib_set_mtu(struct qib_pportdata *ppd, u16 arg)
 606 {
 607         u32 piosize;
 608         int ret, chk;
 609
 610         if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
 611             arg != 4096) {
 612                 ret = -EINVAL;
 613                 goto bail;
 614         }
 615         chk = ib_mtu_enum_to_int(qib_ibmtu);
 616         if (chk > 0 && arg > chk) {
 617                 ret = -EINVAL;
 618                 goto bail;
 619         }
 620
 621         piosize = ppd->ibmaxlen;
 622         ppd->ibmtu = arg;
 623
 624         if (arg >= (piosize - QIB_PIO_MAXIBHDR)) {
 625                 /* Only if it's not the initial value (or reset to it) */
 626                 if (piosize != ppd->init_ibmaxlen) {
 627                         if (arg > piosize && arg <= ppd->init_ibmaxlen)
 628                                 piosize = ppd->init_ibmaxlen - 2 * sizeof(u32);
 629                         ppd->ibmaxlen = piosize;
 630                 }
 631         } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) {
 632                 piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32);
 633                 ppd->ibmaxlen = piosize;
 634         }
 635
 636         ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0);
 637
 638         ret = 0;
 639
 640 bail:
 641         return ret;
 642 }
 643
 644 int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
 645 {
 646         struct qib_devdata *dd = ppd->dd;
 647         ppd->lid = lid;
 648         ppd->lmc = lmc;
 649
 650         dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC,
 651                          lid | (~((1U << lmc) - 1)) << 16);
 652
 653         qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n",
 654                     dd->unit, ppd->port, lid);
 655
 656         return 0;
 657 }
 658
 659 /*
 660  * Following deal with the "obviously simple" task of overriding the state
 661  * of the LEDS, which normally indicate link physical and logical status.
 662  * The complications arise in dealing with different hardware mappings
 663  * and the board-dependent routine being called from interrupts.
 664  * and then there's the requirement to _flash_ them.
 665  */
 666 #define LED_OVER_FREQ_SHIFT 8
 667 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
 668 /* Below is "non-zero" to force override, but both actual LEDs are off */
 669 #define LED_OVER_BOTH_OFF (8)
 670
 671 static void qib_run_led_override(unsigned long opaque)
 672 {
 673         struct qib_pportdata *ppd = (struct qib_pportdata *)opaque;
 674         struct qib_devdata *dd = ppd->dd;
 675         int timeoff;
 676         int ph_idx;
 677
 678         if (!(dd->flags & QIB_INITTED))
 679                 return;
 680
 681         ph_idx = ppd->led_override_phase++ & 1;
 682         ppd->led_override = ppd->led_override_vals[ph_idx];
 683         timeoff = ppd->led_override_timeoff;
 684
 685         dd->f_setextled(ppd, 1);
 686         /*
 687          * don't re-fire the timer if user asked for it to be off; we let
 688          * it fire one more time after they turn it off to simplify
 689          */
 690         if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
 691                 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
 692 }
 693
 694 void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val)
 695 {
 696         struct qib_devdata *dd = ppd->dd;
 697         int timeoff, freq;
 698
 699         if (!(dd->flags & QIB_INITTED))
 700                 return;
 701
 702         /* First check if we are blinking. If not, use 1HZ polling */
 703         timeoff = HZ;
 704         freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
 705
 706         if (freq) {
 707                 /* For blink, set each phase from one nybble of val */
 708                 ppd->led_override_vals[0] = val & 0xF;
 709                 ppd->led_override_vals[1] = (val >> 4) & 0xF;
 710                 timeoff = (HZ << 4)/freq;
 711         } else {
 712                 /* Non-blink set both phases the same. */
 713                 ppd->led_override_vals[0] = val & 0xF;
 714                 ppd->led_override_vals[1] = val & 0xF;
 715         }
 716         ppd->led_override_timeoff = timeoff;
 717
 718         /*
 719          * If the timer has not already been started, do so. Use a "quick"
 720          * timeout so the function will be called soon, to look at our request.
 721          */
 722         if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
 723                 /* Need to start timer */
 724                 init_timer(&ppd->led_override_timer);
 725                 ppd->led_override_timer.function = qib_run_led_override;
 726                 ppd->led_override_timer.data = (unsigned long) ppd;
 727                 ppd->led_override_timer.expires = jiffies + 1;
 728                 add_timer(&ppd->led_override_timer);
 729         } else {
 730                 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
 731                         mod_timer(&ppd->led_override_timer, jiffies + 1);
 732                 atomic_dec(&ppd->led_override_timer_active);
 733         }
 734 }
 735
 736 /**
 737  * qib_reset_device - reset the chip if possible
 738  * @unit: the device to reset
 739  *
 740  * Whether or not reset is successful, we attempt to re-initialize the chip
 741  * (that is, much like a driver unload/reload).  We clear the INITTED flag
 742  * so that the various entry points will fail until we reinitialize.  For
 743  * now, we only allow this if no user contexts are open that use chip resources
 744  */
 745 int qib_reset_device(int unit)
 746 {
 747         int ret, i;
 748         struct qib_devdata *dd = qib_lookup(unit);
 749         struct qib_pportdata *ppd;
 750         unsigned long flags;
 751         int pidx;
 752
 753         if (!dd) {
 754                 ret = -ENODEV;
 755                 goto bail;
 756         }
 757
 758         qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit);
 759
 760         if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) {
 761                 qib_devinfo(dd->pcidev, "Invalid unit number %u or "
 762                             "not initialized or not present\n", unit);
 763                 ret = -ENXIO;
 764                 goto bail;
 765         }
 766
 767         spin_lock_irqsave(&dd->uctxt_lock, flags);
 768         if (dd->rcd)
 769                 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
 770                         if (!dd->rcd[i] || !dd->rcd[i]->cnt)
 771                                 continue;
 772                         spin_unlock_irqrestore(&dd->uctxt_lock, flags);
 773                         ret = -EBUSY;
 774                         goto bail;
 775                 }
 776         spin_unlock_irqrestore(&dd->uctxt_lock, flags);
 777
 778         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 779                 ppd = dd->pport + pidx;
 780                 if (atomic_read(&ppd->led_override_timer_active)) {
 781                         /* Need to stop LED timer, _then_ shut off LEDs */
 782                         del_timer_sync(&ppd->led_override_timer);
 783                         atomic_set(&ppd->led_override_timer_active, 0);
 784                 }
 785
 786                 /* Shut off LEDs after we are sure timer is not running */
 787                 ppd->led_override = LED_OVER_BOTH_OFF;
 788                 dd->f_setextled(ppd, 0);
 789                 if (dd->flags & QIB_HAS_SEND_DMA)
 790                         qib_teardown_sdma(ppd);
 791         }
 792
 793         ret = dd->f_reset(dd);
 794         if (ret == 1)
 795                 ret = qib_init(dd, 1);
 796         else
 797                 ret = -EAGAIN;
 798         if (ret)
 799                 qib_dev_err(dd, "Reinitialize unit %u after "
 800                             "reset failed with %d\n", unit, ret);
 801         else
 802                 qib_devinfo(dd->pcidev, "Reinitialized unit %u after "
 803                             "resetting\n", unit);
 804
 805 bail:
 806         return ret;
 807 }