2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/types.h>
14 #include <linux/delay.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
23 #include <linux/i8042.h>
27 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
28 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
29 MODULE_LICENSE("GPL");
31 static bool i8042_nokbd;
32 module_param_named(nokbd, i8042_nokbd, bool, 0);
33 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
35 static bool i8042_noaux;
36 module_param_named(noaux, i8042_noaux, bool, 0);
37 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
39 static bool i8042_nomux;
40 module_param_named(nomux, i8042_nomux, bool, 0);
41 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
43 static bool i8042_unlock;
44 module_param_named(unlock, i8042_unlock, bool, 0);
45 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
47 static bool i8042_reset;
48 module_param_named(reset, i8042_reset, bool, 0);
49 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
51 static bool i8042_direct;
52 module_param_named(direct, i8042_direct, bool, 0);
53 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
55 static bool i8042_dumbkbd;
56 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
57 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
59 static bool i8042_noloop;
60 module_param_named(noloop, i8042_noloop, bool, 0);
61 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
63 static unsigned int i8042_blink_frequency = 500;
64 module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
65 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
68 static bool i8042_dritek;
69 module_param_named(dritek, i8042_dritek, bool, 0);
70 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
74 static bool i8042_nopnp;
75 module_param_named(nopnp, i8042_nopnp, bool, 0);
76 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
81 static bool i8042_debug;
82 module_param_named(debug, i8042_debug, bool, 0600);
83 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
86 static bool i8042_bypass_aux_irq_test;
91 * i8042_lock protects serialization between i8042_command and
92 * the interrupt handler.
94 static DEFINE_SPINLOCK(i8042_lock);
97 * Writers to AUX and KBD ports as well as users issuing i8042_command
98 * directly should acquire i8042_mutex (by means of calling
99 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
100 * they do not disturb each other (unfortunately in many i8042
101 * implementations write to one of the ports will immediately abort
102 * command that is being processed by another port).
104 static DEFINE_MUTEX(i8042_mutex);
113 #define I8042_KBD_PORT_NO 0
114 #define I8042_AUX_PORT_NO 1
115 #define I8042_MUX_PORT_NO 2
116 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
118 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
120 static unsigned char i8042_initial_ctr;
121 static unsigned char i8042_ctr;
122 static bool i8042_mux_present;
123 static bool i8042_kbd_irq_registered;
124 static bool i8042_aux_irq_registered;
125 static unsigned char i8042_suppress_kbd_ack;
126 static struct platform_device *i8042_platform_device;
128 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
130 void i8042_lock_chip(void)
132 mutex_lock(&i8042_mutex);
134 EXPORT_SYMBOL(i8042_lock_chip);
136 void i8042_unlock_chip(void)
138 mutex_unlock(&i8042_mutex);
140 EXPORT_SYMBOL(i8042_unlock_chip);
143 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
144 * be ready for reading values from it / writing values to it.
145 * Called always with i8042_lock held.
148 static int i8042_wait_read(void)
152 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
156 return -(i == I8042_CTL_TIMEOUT);
159 static int i8042_wait_write(void)
163 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
167 return -(i == I8042_CTL_TIMEOUT);
171 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
172 * of the i8042 down the toilet.
175 static int i8042_flush(void)
178 unsigned char data, str;
181 spin_lock_irqsave(&i8042_lock, flags);
183 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
185 data = i8042_read_data();
187 dbg("%02x <- i8042 (flush, %s)", data,
188 str & I8042_STR_AUXDATA ? "aux" : "kbd");
191 spin_unlock_irqrestore(&i8042_lock, flags);
197 * i8042_command() executes a command on the i8042. It also sends the input
198 * parameter(s) of the commands to it, and receives the output value(s). The
199 * parameters are to be stored in the param array, and the output is placed
200 * into the same array. The number of the parameters and output values is
201 * encoded in bits 8-11 of the command number.
204 static int __i8042_command(unsigned char *param, int command)
208 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
211 error = i8042_wait_write();
215 dbg("%02x -> i8042 (command)", command & 0xff);
216 i8042_write_command(command & 0xff);
218 for (i = 0; i < ((command >> 12) & 0xf); i++) {
219 error = i8042_wait_write();
222 dbg("%02x -> i8042 (parameter)", param[i]);
223 i8042_write_data(param[i]);
226 for (i = 0; i < ((command >> 8) & 0xf); i++) {
227 error = i8042_wait_read();
229 dbg(" -- i8042 (timeout)");
233 if (command == I8042_CMD_AUX_LOOP &&
234 !(i8042_read_status() & I8042_STR_AUXDATA)) {
235 dbg(" -- i8042 (auxerr)");
239 param[i] = i8042_read_data();
240 dbg("%02x <- i8042 (return)", param[i]);
246 int i8042_command(unsigned char *param, int command)
251 spin_lock_irqsave(&i8042_lock, flags);
252 retval = __i8042_command(param, command);
253 spin_unlock_irqrestore(&i8042_lock, flags);
257 EXPORT_SYMBOL(i8042_command);
260 * i8042_kbd_write() sends a byte out through the keyboard interface.
263 static int i8042_kbd_write(struct serio *port, unsigned char c)
268 spin_lock_irqsave(&i8042_lock, flags);
270 if (!(retval = i8042_wait_write())) {
271 dbg("%02x -> i8042 (kbd-data)", c);
275 spin_unlock_irqrestore(&i8042_lock, flags);
281 * i8042_aux_write() sends a byte out through the aux interface.
284 static int i8042_aux_write(struct serio *serio, unsigned char c)
286 struct i8042_port *port = serio->port_data;
288 return i8042_command(&c, port->mux == -1 ?
290 I8042_CMD_MUX_SEND + port->mux);
295 * i8042_aux_close attempts to clear AUX or KBD port state by disabling
296 * and then re-enabling it.
299 static void i8042_port_close(struct serio *serio)
303 const char *port_name;
305 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
306 irq_bit = I8042_CTR_AUXINT;
307 disable_bit = I8042_CTR_AUXDIS;
310 irq_bit = I8042_CTR_KBDINT;
311 disable_bit = I8042_CTR_KBDDIS;
315 i8042_ctr &= ~irq_bit;
316 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
318 "i8042.c: Can't write CTR while closing %s port.\n",
323 i8042_ctr &= ~disable_bit;
324 i8042_ctr |= irq_bit;
325 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
326 printk(KERN_ERR "i8042.c: Can't reactivate %s port.\n",
330 * See if there is any data appeared while we were messing with
333 i8042_interrupt(0, NULL);
337 * i8042_start() is called by serio core when port is about to finish
338 * registering. It will mark port as existing so i8042_interrupt can
339 * start sending data through it.
341 static int i8042_start(struct serio *serio)
343 struct i8042_port *port = serio->port_data;
351 * i8042_stop() marks serio port as non-existing so i8042_interrupt
352 * will not try to send data to the port that is about to go away.
353 * The function is called by serio core as part of unregister procedure.
355 static void i8042_stop(struct serio *serio)
357 struct i8042_port *port = serio->port_data;
359 port->exists = false;
362 * We synchronize with both AUX and KBD IRQs because there is
363 * a (very unlikely) chance that AUX IRQ is raised for KBD port
366 synchronize_irq(I8042_AUX_IRQ);
367 synchronize_irq(I8042_KBD_IRQ);
372 * i8042_interrupt() is the most important function in this driver -
373 * it handles the interrupts from the i8042, and sends incoming bytes
374 * to the upper layers.
377 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
379 struct i8042_port *port;
381 unsigned char str, data;
383 unsigned int port_no;
386 spin_lock_irqsave(&i8042_lock, flags);
387 str = i8042_read_status();
388 if (unlikely(~str & I8042_STR_OBF)) {
389 spin_unlock_irqrestore(&i8042_lock, flags);
390 if (irq) dbg("Interrupt %d, without any data", irq);
394 data = i8042_read_data();
395 spin_unlock_irqrestore(&i8042_lock, flags);
397 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
398 static unsigned long last_transmit;
399 static unsigned char last_str;
402 if (str & I8042_STR_MUXERR) {
403 dbg("MUX error, status is %02x, data is %02x", str, data);
405 * When MUXERR condition is signalled the data register can only contain
406 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
407 * it is not always the case. Some KBCs also report 0xfc when there is
408 * nothing connected to the port while others sometimes get confused which
409 * port the data came from and signal error leaving the data intact. They
410 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
411 * to legacy mode yet, when we see one we'll add proper handling).
412 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
413 * rest assume that the data came from the same serio last byte
414 * was transmitted (if transmission happened not too long ago).
419 if (time_before(jiffies, last_transmit + HZ/10)) {
423 /* fall through - report timeout */
426 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
427 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
431 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
433 last_transmit = jiffies;
436 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
437 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
439 port_no = (str & I8042_STR_AUXDATA) ?
440 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
443 port = &i8042_ports[port_no];
445 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
447 dfl & SERIO_PARITY ? ", bad parity" : "",
448 dfl & SERIO_TIMEOUT ? ", timeout" : "");
450 if (unlikely(i8042_suppress_kbd_ack))
451 if (port_no == I8042_KBD_PORT_NO &&
452 (data == 0xfa || data == 0xfe)) {
453 i8042_suppress_kbd_ack--;
457 if (likely(port->exists))
458 serio_interrupt(port->serio, data, dfl);
461 return IRQ_RETVAL(ret);
465 * i8042_enable_kbd_port enables keyboard port on chip
468 static int i8042_enable_kbd_port(void)
470 i8042_ctr &= ~I8042_CTR_KBDDIS;
471 i8042_ctr |= I8042_CTR_KBDINT;
473 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
474 i8042_ctr &= ~I8042_CTR_KBDINT;
475 i8042_ctr |= I8042_CTR_KBDDIS;
476 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
484 * i8042_enable_aux_port enables AUX (mouse) port on chip
487 static int i8042_enable_aux_port(void)
489 i8042_ctr &= ~I8042_CTR_AUXDIS;
490 i8042_ctr |= I8042_CTR_AUXINT;
492 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
493 i8042_ctr &= ~I8042_CTR_AUXINT;
494 i8042_ctr |= I8042_CTR_AUXDIS;
495 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
503 * i8042_enable_mux_ports enables 4 individual AUX ports after
504 * the controller has been switched into Multiplexed mode
507 static int i8042_enable_mux_ports(void)
512 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
513 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
514 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
517 return i8042_enable_aux_port();
521 * i8042_set_mux_mode checks whether the controller has an
522 * active multiplexor and puts the chip into Multiplexed (true)
523 * or Legacy (false) mode.
526 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
529 unsigned char param, val;
531 * Get rid of bytes in the queue.
537 * Internal loopback test - send three bytes, they should come back from the
538 * mouse interface, the last should be version.
542 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
544 param = val = multiplex ? 0x56 : 0xf6;
545 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
547 param = val = multiplex ? 0xa4 : 0xa5;
548 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
552 * Workaround for interference with USB Legacy emulation
553 * that causes a v10.12 MUX to be found.
559 *mux_version = param;
565 * i8042_check_mux() checks whether the controller supports the PS/2 Active
566 * Multiplexing specification by Synaptics, Phoenix, Insyde and
570 static int __init i8042_check_mux(void)
572 unsigned char mux_version;
574 if (i8042_set_mux_mode(true, &mux_version))
577 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
578 (mux_version >> 4) & 0xf, mux_version & 0xf);
581 * Disable all muxed ports by disabling AUX.
583 i8042_ctr |= I8042_CTR_AUXDIS;
584 i8042_ctr &= ~I8042_CTR_AUXINT;
586 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
587 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
591 i8042_mux_present = true;
597 * The following is used to test AUX IRQ delivery.
599 static struct completion i8042_aux_irq_delivered __initdata;
600 static bool i8042_irq_being_tested __initdata;
602 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
605 unsigned char str, data;
608 spin_lock_irqsave(&i8042_lock, flags);
609 str = i8042_read_status();
610 if (str & I8042_STR_OBF) {
611 data = i8042_read_data();
612 dbg("%02x <- i8042 (aux_test_irq, %s)",
613 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
614 if (i8042_irq_being_tested &&
615 data == 0xa5 && (str & I8042_STR_AUXDATA))
616 complete(&i8042_aux_irq_delivered);
619 spin_unlock_irqrestore(&i8042_lock, flags);
621 return IRQ_RETVAL(ret);
625 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
626 * verifies success by readinng CTR. Used when testing for presence of AUX
629 static int __init i8042_toggle_aux(bool on)
634 if (i8042_command(¶m,
635 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
638 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
639 for (i = 0; i < 100; i++) {
642 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
645 if (!(param & I8042_CTR_AUXDIS) == on)
653 * i8042_check_aux() applies as much paranoia as it can at detecting
654 * the presence of an AUX interface.
657 static int __init i8042_check_aux(void)
660 bool irq_registered = false;
661 bool aux_loop_broken = false;
666 * Get rid of bytes in the queue.
672 * Internal loopback test - filters out AT-type i8042's. Unfortunately
673 * SiS screwed up and their 5597 doesn't support the LOOP command even
674 * though it has an AUX port.
678 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
679 if (retval || param != 0x5a) {
682 * External connection test - filters out AT-soldered PS/2 i8042's
683 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
684 * 0xfa - no error on some notebooks which ignore the spec
685 * Because it's common for chipsets to return error on perfectly functioning
686 * AUX ports, we test for this only when the LOOP command failed.
689 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
690 (param && param != 0xfa && param != 0xff))
694 * If AUX_LOOP completed without error but returned unexpected data
698 aux_loop_broken = true;
702 * Bit assignment test - filters out PS/2 i8042's in AT mode
705 if (i8042_toggle_aux(false)) {
706 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
707 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
710 if (i8042_toggle_aux(true))
714 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
715 * used it for a PCI card or somethig else.
718 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
720 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
721 * is working and hope we are right.
727 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
728 "i8042", i8042_platform_device))
731 irq_registered = true;
733 if (i8042_enable_aux_port())
736 spin_lock_irqsave(&i8042_lock, flags);
738 init_completion(&i8042_aux_irq_delivered);
739 i8042_irq_being_tested = true;
742 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
744 spin_unlock_irqrestore(&i8042_lock, flags);
749 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
750 msecs_to_jiffies(250)) == 0) {
752 * AUX IRQ was never delivered so we need to flush the controller to
753 * get rid of the byte we put there; otherwise keyboard may not work.
755 dbg(" -- i8042 (aux irq test timeout)");
763 * Disable the interface.
766 i8042_ctr |= I8042_CTR_AUXDIS;
767 i8042_ctr &= ~I8042_CTR_AUXINT;
769 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
773 free_irq(I8042_AUX_IRQ, i8042_platform_device);
778 static int i8042_controller_check(void)
780 if (i8042_flush() == I8042_BUFFER_SIZE) {
781 printk(KERN_ERR "i8042.c: No controller found.\n");
788 static int i8042_controller_selftest(void)
797 * We try this 5 times; on some really fragile systems this does not
798 * take the first time...
802 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
803 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
807 if (param == I8042_RET_CTL_TEST)
810 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
811 param, I8042_RET_CTL_TEST);
817 * On x86, we don't fail entire i8042 initialization if controller
818 * reset fails in hopes that keyboard port will still be functional
819 * and user will still get a working keyboard. This is especially
820 * important on netbooks. On other arches we trust hardware more.
823 "i8042: giving up on controller selftest, continuing anyway...\n");
831 * i8042_controller init initializes the i8042 controller, and,
832 * most importantly, sets it into non-xlated mode if that's
836 static int i8042_controller_init(void)
840 unsigned char ctr[2];
843 * Save the CTR for restore on unload / reboot.
849 "i8042.c: Unable to get stable CTR read.\n");
856 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
858 "i8042.c: Can't read CTR while initializing i8042.\n");
862 } while (n < 2 || ctr[0] != ctr[1]);
864 i8042_initial_ctr = i8042_ctr = ctr[0];
867 * Disable the keyboard interface and interrupt.
870 i8042_ctr |= I8042_CTR_KBDDIS;
871 i8042_ctr &= ~I8042_CTR_KBDINT;
877 spin_lock_irqsave(&i8042_lock, flags);
878 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
880 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
882 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
884 spin_unlock_irqrestore(&i8042_lock, flags);
887 * If the chip is configured into nontranslated mode by the BIOS, don't
888 * bother enabling translating and be happy.
891 if (~i8042_ctr & I8042_CTR_XLATE)
895 * Set nontranslated mode for the kbd interface if requested by an option.
896 * After this the kbd interface becomes a simple serial in/out, like the aux
897 * interface is. We don't do this by default, since it can confuse notebook
902 i8042_ctr &= ~I8042_CTR_XLATE;
908 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
909 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
914 * Flush whatever accumulated while we were disabling keyboard port.
924 * Reset the controller and reset CRT to the original value set by BIOS.
927 static void i8042_controller_reset(void)
932 * Disable both KBD and AUX interfaces so they don't get in the way
935 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
936 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
938 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
939 printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n");
942 * Disable MUX mode if present.
945 if (i8042_mux_present)
946 i8042_set_mux_mode(false, NULL);
949 * Reset the controller if requested.
952 i8042_controller_selftest();
955 * Restore the original control register setting.
958 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
959 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
964 * i8042_panic_blink() will flash the keyboard LEDs and is called when
965 * kernel panics. Flashing LEDs is useful for users running X who may
966 * not see the console and will help distingushing panics from "real"
969 * Note that DELAY has a limit of 10ms so we will not get stuck here
970 * waiting for KBC to free up even if KBD interrupt is off
973 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
975 static long i8042_panic_blink(long count)
978 static long last_blink;
982 * We expect frequency to be about 1/2s. KDB uses about 1s.
983 * Make sure they are different.
985 if (!i8042_blink_frequency)
987 if (count - last_blink < i8042_blink_frequency)
991 while (i8042_read_status() & I8042_STR_IBF)
993 dbg("%02x -> i8042 (panic blink)", 0xed);
994 i8042_suppress_kbd_ack = 2;
995 i8042_write_data(0xed); /* set leds */
997 while (i8042_read_status() & I8042_STR_IBF)
1000 dbg("%02x -> i8042 (panic blink)", led);
1001 i8042_write_data(led);
1010 static void i8042_dritek_enable(void)
1015 error = i8042_command(¶m, 0x1059);
1018 "Failed to enable DRITEK extension: %d\n",
1026 * Here we try to restore the original BIOS settings to avoid
1030 static int i8042_pm_reset(struct device *dev)
1032 i8042_controller_reset();
1038 * Here we try to reset everything back to a state we had
1039 * before suspending.
1042 static int i8042_pm_restore(struct device *dev)
1046 error = i8042_controller_check();
1050 error = i8042_controller_selftest();
1055 * Restore original CTR value and disable all ports
1058 i8042_ctr = i8042_initial_ctr;
1060 i8042_ctr &= ~I8042_CTR_XLATE;
1061 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1062 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1063 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1064 printk(KERN_WARNING "i8042: Can't write CTR to resume, retrying...\n");
1066 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1067 printk(KERN_ERR "i8042: CTR write retry failed\n");
1075 i8042_dritek_enable();
1078 if (i8042_mux_present) {
1079 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1081 "i8042: failed to resume active multiplexor, "
1082 "mouse won't work.\n");
1083 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1084 i8042_enable_aux_port();
1086 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1087 i8042_enable_kbd_port();
1089 i8042_interrupt(0, NULL);
1094 static const struct dev_pm_ops i8042_pm_ops = {
1095 .suspend = i8042_pm_reset,
1096 .resume = i8042_pm_restore,
1097 .poweroff = i8042_pm_reset,
1098 .restore = i8042_pm_restore,
1101 #endif /* CONFIG_PM */
1104 * We need to reset the 8042 back to original mode on system shutdown,
1105 * because otherwise BIOSes will be confused.
1108 static void i8042_shutdown(struct platform_device *dev)
1110 i8042_controller_reset();
1113 static int __init i8042_create_kbd_port(void)
1115 struct serio *serio;
1116 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1118 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1122 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1123 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1124 serio->start = i8042_start;
1125 serio->stop = i8042_stop;
1126 serio->close = i8042_port_close;
1127 serio->port_data = port;
1128 serio->dev.parent = &i8042_platform_device->dev;
1129 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1130 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1132 port->serio = serio;
1133 port->irq = I8042_KBD_IRQ;
1138 static int __init i8042_create_aux_port(int idx)
1140 struct serio *serio;
1141 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1142 struct i8042_port *port = &i8042_ports[port_no];
1144 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1148 serio->id.type = SERIO_8042;
1149 serio->write = i8042_aux_write;
1150 serio->start = i8042_start;
1151 serio->stop = i8042_stop;
1152 serio->port_data = port;
1153 serio->dev.parent = &i8042_platform_device->dev;
1155 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1156 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1157 serio->close = i8042_port_close;
1159 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1160 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1163 port->serio = serio;
1165 port->irq = I8042_AUX_IRQ;
1170 static void __init i8042_free_kbd_port(void)
1172 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1173 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1176 static void __init i8042_free_aux_ports(void)
1180 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1181 kfree(i8042_ports[i].serio);
1182 i8042_ports[i].serio = NULL;
1186 static void __init i8042_register_ports(void)
1190 for (i = 0; i < I8042_NUM_PORTS; i++) {
1191 if (i8042_ports[i].serio) {
1192 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1193 i8042_ports[i].serio->name,
1194 (unsigned long) I8042_DATA_REG,
1195 (unsigned long) I8042_COMMAND_REG,
1196 i8042_ports[i].irq);
1197 serio_register_port(i8042_ports[i].serio);
1202 static void __devexit i8042_unregister_ports(void)
1206 for (i = 0; i < I8042_NUM_PORTS; i++) {
1207 if (i8042_ports[i].serio) {
1208 serio_unregister_port(i8042_ports[i].serio);
1209 i8042_ports[i].serio = NULL;
1215 * Checks whether port belongs to i8042 controller.
1217 bool i8042_check_port_owner(const struct serio *port)
1221 for (i = 0; i < I8042_NUM_PORTS; i++)
1222 if (i8042_ports[i].serio == port)
1227 EXPORT_SYMBOL(i8042_check_port_owner);
1229 static void i8042_free_irqs(void)
1231 if (i8042_aux_irq_registered)
1232 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1233 if (i8042_kbd_irq_registered)
1234 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1236 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1239 static int __init i8042_setup_aux(void)
1241 int (*aux_enable)(void);
1245 if (i8042_check_aux())
1248 if (i8042_nomux || i8042_check_mux()) {
1249 error = i8042_create_aux_port(-1);
1251 goto err_free_ports;
1252 aux_enable = i8042_enable_aux_port;
1254 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1255 error = i8042_create_aux_port(i);
1257 goto err_free_ports;
1259 aux_enable = i8042_enable_mux_ports;
1262 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1263 "i8042", i8042_platform_device);
1265 goto err_free_ports;
1270 i8042_aux_irq_registered = true;
1274 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1276 i8042_free_aux_ports();
1280 static int __init i8042_setup_kbd(void)
1284 error = i8042_create_kbd_port();
1288 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1289 "i8042", i8042_platform_device);
1293 error = i8042_enable_kbd_port();
1297 i8042_kbd_irq_registered = true;
1301 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1303 i8042_free_kbd_port();
1307 static int __init i8042_probe(struct platform_device *dev)
1311 error = i8042_controller_selftest();
1315 error = i8042_controller_init();
1321 i8042_dritek_enable();
1325 error = i8042_setup_aux();
1326 if (error && error != -ENODEV && error != -EBUSY)
1331 error = i8042_setup_kbd();
1336 * Ok, everything is ready, let's register all serio ports
1338 i8042_register_ports();
1343 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1345 i8042_controller_reset();
1350 static int __devexit i8042_remove(struct platform_device *dev)
1352 i8042_unregister_ports();
1354 i8042_controller_reset();
1359 static struct platform_driver i8042_driver = {
1362 .owner = THIS_MODULE,
1364 .pm = &i8042_pm_ops,
1367 .remove = __devexit_p(i8042_remove),
1368 .shutdown = i8042_shutdown,
1371 static int __init i8042_init(void)
1377 err = i8042_platform_init();
1381 err = i8042_controller_check();
1383 goto err_platform_exit;
1385 i8042_platform_device = platform_device_alloc("i8042", -1);
1386 if (!i8042_platform_device) {
1388 goto err_platform_exit;
1391 err = platform_device_add(i8042_platform_device);
1393 goto err_free_device;
1395 err = platform_driver_probe(&i8042_driver, i8042_probe);
1397 goto err_del_device;
1399 panic_blink = i8042_panic_blink;
1404 platform_device_del(i8042_platform_device);
1406 platform_device_put(i8042_platform_device);
1408 i8042_platform_exit();
1413 static void __exit i8042_exit(void)
1415 platform_driver_unregister(&i8042_driver);
1416 platform_device_unregister(i8042_platform_device);
1417 i8042_platform_exit();
1422 module_init(i8042_init);
1423 module_exit(i8042_exit);