2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
26 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
27 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
28 MODULE_LICENSE("GPL");
30 static unsigned int i8042_nokbd;
31 module_param_named(nokbd, i8042_nokbd, bool, 0);
32 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
34 static unsigned int i8042_noaux;
35 module_param_named(noaux, i8042_noaux, bool, 0);
36 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
38 static unsigned int i8042_nomux;
39 module_param_named(nomux, i8042_nomux, bool, 0);
40 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
42 static unsigned int i8042_unlock;
43 module_param_named(unlock, i8042_unlock, bool, 0);
44 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
46 static unsigned int i8042_reset;
47 module_param_named(reset, i8042_reset, bool, 0);
48 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
50 static unsigned int i8042_direct;
51 module_param_named(direct, i8042_direct, bool, 0);
52 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
54 static unsigned int i8042_dumbkbd;
55 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
56 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
58 static unsigned int i8042_noloop;
59 module_param_named(noloop, i8042_noloop, bool, 0);
60 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
62 static unsigned int i8042_blink_frequency = 500;
63 module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
64 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
67 static int i8042_nopnp;
68 module_param_named(nopnp, i8042_nopnp, bool, 0);
69 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
74 static int i8042_debug;
75 module_param_named(debug, i8042_debug, bool, 0600);
76 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
81 static DEFINE_SPINLOCK(i8042_lock);
90 #define I8042_KBD_PORT_NO 0
91 #define I8042_AUX_PORT_NO 1
92 #define I8042_MUX_PORT_NO 2
93 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
95 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
97 static unsigned char i8042_initial_ctr;
98 static unsigned char i8042_ctr;
99 static unsigned char i8042_mux_present;
100 static unsigned char i8042_kbd_irq_registered;
101 static unsigned char i8042_aux_irq_registered;
102 static unsigned char i8042_suppress_kbd_ack;
103 static struct platform_device *i8042_platform_device;
105 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
108 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
109 * be ready for reading values from it / writing values to it.
110 * Called always with i8042_lock held.
113 static int i8042_wait_read(void)
117 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
121 return -(i == I8042_CTL_TIMEOUT);
124 static int i8042_wait_write(void)
128 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
132 return -(i == I8042_CTL_TIMEOUT);
136 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
137 * of the i8042 down the toilet.
140 static int i8042_flush(void)
143 unsigned char data, str;
146 spin_lock_irqsave(&i8042_lock, flags);
148 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
150 data = i8042_read_data();
152 dbg("%02x <- i8042 (flush, %s)", data,
153 str & I8042_STR_AUXDATA ? "aux" : "kbd");
156 spin_unlock_irqrestore(&i8042_lock, flags);
162 * i8042_command() executes a command on the i8042. It also sends the input
163 * parameter(s) of the commands to it, and receives the output value(s). The
164 * parameters are to be stored in the param array, and the output is placed
165 * into the same array. The number of the parameters and output values is
166 * encoded in bits 8-11 of the command number.
169 static int __i8042_command(unsigned char *param, int command)
173 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
176 error = i8042_wait_write();
180 dbg("%02x -> i8042 (command)", command & 0xff);
181 i8042_write_command(command & 0xff);
183 for (i = 0; i < ((command >> 12) & 0xf); i++) {
184 error = i8042_wait_write();
187 dbg("%02x -> i8042 (parameter)", param[i]);
188 i8042_write_data(param[i]);
191 for (i = 0; i < ((command >> 8) & 0xf); i++) {
192 error = i8042_wait_read();
194 dbg(" -- i8042 (timeout)");
198 if (command == I8042_CMD_AUX_LOOP &&
199 !(i8042_read_status() & I8042_STR_AUXDATA)) {
200 dbg(" -- i8042 (auxerr)");
204 param[i] = i8042_read_data();
205 dbg("%02x <- i8042 (return)", param[i]);
211 static int i8042_command(unsigned char *param, int command)
216 spin_lock_irqsave(&i8042_lock, flags);
217 retval = __i8042_command(param, command);
218 spin_unlock_irqrestore(&i8042_lock, flags);
224 * i8042_kbd_write() sends a byte out through the keyboard interface.
227 static int i8042_kbd_write(struct serio *port, unsigned char c)
232 spin_lock_irqsave(&i8042_lock, flags);
234 if (!(retval = i8042_wait_write())) {
235 dbg("%02x -> i8042 (kbd-data)", c);
239 spin_unlock_irqrestore(&i8042_lock, flags);
245 * i8042_aux_write() sends a byte out through the aux interface.
248 static int i8042_aux_write(struct serio *serio, unsigned char c)
250 struct i8042_port *port = serio->port_data;
252 return i8042_command(&c, port->mux == -1 ?
254 I8042_CMD_MUX_SEND + port->mux);
258 * i8042_start() is called by serio core when port is about to finish
259 * registering. It will mark port as existing so i8042_interrupt can
260 * start sending data through it.
262 static int i8042_start(struct serio *serio)
264 struct i8042_port *port = serio->port_data;
272 * i8042_stop() marks serio port as non-existing so i8042_interrupt
273 * will not try to send data to the port that is about to go away.
274 * The function is called by serio core as part of unregister procedure.
276 static void i8042_stop(struct serio *serio)
278 struct i8042_port *port = serio->port_data;
286 * i8042_interrupt() is the most important function in this driver -
287 * it handles the interrupts from the i8042, and sends incoming bytes
288 * to the upper layers.
291 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
293 struct i8042_port *port;
295 unsigned char str, data;
297 unsigned int port_no;
300 spin_lock_irqsave(&i8042_lock, flags);
301 str = i8042_read_status();
302 if (unlikely(~str & I8042_STR_OBF)) {
303 spin_unlock_irqrestore(&i8042_lock, flags);
304 if (irq) dbg("Interrupt %d, without any data", irq);
308 data = i8042_read_data();
309 spin_unlock_irqrestore(&i8042_lock, flags);
311 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
312 static unsigned long last_transmit;
313 static unsigned char last_str;
316 if (str & I8042_STR_MUXERR) {
317 dbg("MUX error, status is %02x, data is %02x", str, data);
319 * When MUXERR condition is signalled the data register can only contain
320 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
321 * it is not always the case. Some KBCs also report 0xfc when there is
322 * nothing connected to the port while others sometimes get confused which
323 * port the data came from and signal error leaving the data intact. They
324 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
325 * to legacy mode yet, when we see one we'll add proper handling).
326 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
327 * rest assume that the data came from the same serio last byte
328 * was transmitted (if transmission happened not too long ago).
333 if (time_before(jiffies, last_transmit + HZ/10)) {
337 /* fall through - report timeout */
340 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
341 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
345 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
347 last_transmit = jiffies;
350 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
351 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
353 port_no = (str & I8042_STR_AUXDATA) ?
354 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
357 port = &i8042_ports[port_no];
359 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
361 dfl & SERIO_PARITY ? ", bad parity" : "",
362 dfl & SERIO_TIMEOUT ? ", timeout" : "");
364 if (unlikely(i8042_suppress_kbd_ack))
365 if (port_no == I8042_KBD_PORT_NO &&
366 (data == 0xfa || data == 0xfe)) {
367 i8042_suppress_kbd_ack--;
371 if (likely(port->exists))
372 serio_interrupt(port->serio, data, dfl);
375 return IRQ_RETVAL(ret);
379 * i8042_enable_kbd_port enables keybaord port on chip
382 static int i8042_enable_kbd_port(void)
384 i8042_ctr &= ~I8042_CTR_KBDDIS;
385 i8042_ctr |= I8042_CTR_KBDINT;
387 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
388 i8042_ctr &= ~I8042_CTR_KBDINT;
389 i8042_ctr |= I8042_CTR_KBDDIS;
390 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
398 * i8042_enable_aux_port enables AUX (mouse) port on chip
401 static int i8042_enable_aux_port(void)
403 i8042_ctr &= ~I8042_CTR_AUXDIS;
404 i8042_ctr |= I8042_CTR_AUXINT;
406 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
407 i8042_ctr &= ~I8042_CTR_AUXINT;
408 i8042_ctr |= I8042_CTR_AUXDIS;
409 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
417 * i8042_enable_mux_ports enables 4 individual AUX ports after
418 * the controller has been switched into Multiplexed mode
421 static int i8042_enable_mux_ports(void)
426 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
427 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
428 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
431 return i8042_enable_aux_port();
435 * i8042_set_mux_mode checks whether the controller has an active
436 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
439 static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
444 * Get rid of bytes in the queue.
450 * Internal loopback test - send three bytes, they should come back from the
451 * mouse interface, the last should be version.
455 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0)
457 param = mode ? 0x56 : 0xf6;
458 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
460 param = mode ? 0xa4 : 0xa5;
461 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
465 *mux_version = param;
471 * i8042_check_mux() checks whether the controller supports the PS/2 Active
472 * Multiplexing specification by Synaptics, Phoenix, Insyde and
476 static int __devinit i8042_check_mux(void)
478 unsigned char mux_version;
480 if (i8042_set_mux_mode(1, &mux_version))
484 * Workaround for interference with USB Legacy emulation
485 * that causes a v10.12 MUX to be found.
487 if (mux_version == 0xAC)
490 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
491 (mux_version >> 4) & 0xf, mux_version & 0xf);
494 * Disable all muxed ports by disabling AUX.
496 i8042_ctr |= I8042_CTR_AUXDIS;
497 i8042_ctr &= ~I8042_CTR_AUXINT;
499 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
500 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
504 i8042_mux_present = 1;
510 * The following is used to test AUX IRQ delivery.
512 static struct completion i8042_aux_irq_delivered __devinitdata;
513 static int i8042_irq_being_tested __devinitdata;
515 static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
518 unsigned char str, data;
520 spin_lock_irqsave(&i8042_lock, flags);
521 str = i8042_read_status();
522 if (str & I8042_STR_OBF) {
523 data = i8042_read_data();
524 if (i8042_irq_being_tested &&
525 data == 0xa5 && (str & I8042_STR_AUXDATA))
526 complete(&i8042_aux_irq_delivered);
528 spin_unlock_irqrestore(&i8042_lock, flags);
534 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
535 * verifies success by readinng CTR. Used when testing for presence of AUX
538 static int __devinit i8042_toggle_aux(int on)
543 if (i8042_command(¶m,
544 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
547 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
548 for (i = 0; i < 100; i++) {
551 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
554 if (!(param & I8042_CTR_AUXDIS) == on)
562 * i8042_check_aux() applies as much paranoia as it can at detecting
563 * the presence of an AUX interface.
566 static int __devinit i8042_check_aux(void)
569 int irq_registered = 0;
570 int aux_loop_broken = 0;
575 * Get rid of bytes in the queue.
581 * Internal loopback test - filters out AT-type i8042's. Unfortunately
582 * SiS screwed up and their 5597 doesn't support the LOOP command even
583 * though it has an AUX port.
587 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
588 if (retval || param != 0x5a) {
591 * External connection test - filters out AT-soldered PS/2 i8042's
592 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
593 * 0xfa - no error on some notebooks which ignore the spec
594 * Because it's common for chipsets to return error on perfectly functioning
595 * AUX ports, we test for this only when the LOOP command failed.
598 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
599 (param && param != 0xfa && param != 0xff))
603 * If AUX_LOOP completed without error but returned unexpected data
611 * Bit assignment test - filters out PS/2 i8042's in AT mode
614 if (i8042_toggle_aux(0)) {
615 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
616 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
619 if (i8042_toggle_aux(1))
623 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
624 * used it for a PCI card or somethig else.
627 if (i8042_noloop || aux_loop_broken) {
629 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
630 * is working and hope we are right.
636 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
637 "i8042", i8042_platform_device))
642 if (i8042_enable_aux_port())
645 spin_lock_irqsave(&i8042_lock, flags);
647 init_completion(&i8042_aux_irq_delivered);
648 i8042_irq_being_tested = 1;
651 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
653 spin_unlock_irqrestore(&i8042_lock, flags);
658 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
659 msecs_to_jiffies(250)) == 0) {
661 * AUX IRQ was never delivered so we need to flush the controller to
662 * get rid of the byte we put there; otherwise keyboard may not work.
671 * Disable the interface.
674 i8042_ctr |= I8042_CTR_AUXDIS;
675 i8042_ctr &= ~I8042_CTR_AUXINT;
677 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
681 free_irq(I8042_AUX_IRQ, i8042_platform_device);
686 static int i8042_controller_check(void)
688 if (i8042_flush() == I8042_BUFFER_SIZE) {
689 printk(KERN_ERR "i8042.c: No controller found.\n");
696 static int i8042_controller_selftest(void)
703 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
704 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
708 if (param != I8042_RET_CTL_TEST) {
709 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
710 param, I8042_RET_CTL_TEST);
718 * i8042_controller init initializes the i8042 controller, and,
719 * most importantly, sets it into non-xlated mode if that's
723 static int i8042_controller_init(void)
728 * Save the CTR for restoral on unload / reboot.
731 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
732 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
736 i8042_initial_ctr = i8042_ctr;
739 * Disable the keyboard interface and interrupt.
742 i8042_ctr |= I8042_CTR_KBDDIS;
743 i8042_ctr &= ~I8042_CTR_KBDINT;
749 spin_lock_irqsave(&i8042_lock, flags);
750 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
752 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
754 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
756 spin_unlock_irqrestore(&i8042_lock, flags);
759 * If the chip is configured into nontranslated mode by the BIOS, don't
760 * bother enabling translating and be happy.
763 if (~i8042_ctr & I8042_CTR_XLATE)
767 * Set nontranslated mode for the kbd interface if requested by an option.
768 * After this the kbd interface becomes a simple serial in/out, like the aux
769 * interface is. We don't do this by default, since it can confuse notebook
774 i8042_ctr &= ~I8042_CTR_XLATE;
780 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
781 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
790 * Reset the controller and reset CRT to the original value set by BIOS.
793 static void i8042_controller_reset(void)
798 * Disable both KBD and AUX interfaces so they don't get in the way
801 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
802 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
805 * Disable MUX mode if present.
808 if (i8042_mux_present)
809 i8042_set_mux_mode(0, NULL);
812 * Reset the controller if requested.
815 i8042_controller_selftest();
818 * Restore the original control register setting.
821 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
822 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
827 * i8042_panic_blink() will flash the keyboard LEDs and is called when
828 * kernel panics. Flashing LEDs is useful for users running X who may
829 * not see the console and will help distingushing panics from "real"
832 * Note that DELAY has a limit of 10ms so we will not get stuck here
833 * waiting for KBC to free up even if KBD interrupt is off
836 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
838 static long i8042_panic_blink(long count)
841 static long last_blink;
845 * We expect frequency to be about 1/2s. KDB uses about 1s.
846 * Make sure they are different.
848 if (!i8042_blink_frequency)
850 if (count - last_blink < i8042_blink_frequency)
854 while (i8042_read_status() & I8042_STR_IBF)
856 dbg("%02x -> i8042 (panic blink)", 0xed);
857 i8042_suppress_kbd_ack = 2;
858 i8042_write_data(0xed); /* set leds */
860 while (i8042_read_status() & I8042_STR_IBF)
863 dbg("%02x -> i8042 (panic blink)", led);
864 i8042_write_data(led);
874 * Here we try to restore the original BIOS settings. We only want to
875 * do that once, when we really suspend, not when we taking memory
876 * snapshot for swsusp (in this case we'll perform required cleanup
877 * as part of shutdown process).
880 static int i8042_suspend(struct platform_device *dev, pm_message_t state)
882 if (dev->dev.power.power_state.event != state.event) {
883 if (state.event == PM_EVENT_SUSPEND)
884 i8042_controller_reset();
886 dev->dev.power.power_state = state;
894 * Here we try to reset everything back to a state in which suspended
897 static int i8042_resume(struct platform_device *dev)
902 * Do not bother with restoring state if we haven't suspened yet
904 if (dev->dev.power.power_state.event == PM_EVENT_ON)
907 error = i8042_controller_check();
911 error = i8042_controller_selftest();
916 * Restore original CTR value and disable all ports
919 i8042_ctr = i8042_initial_ctr;
921 i8042_ctr &= ~I8042_CTR_XLATE;
922 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
923 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
924 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
925 printk(KERN_ERR "i8042: Can't write CTR to resume\n");
929 if (i8042_mux_present) {
930 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
932 "i8042: failed to resume active multiplexor, "
933 "mouse won't work.\n");
934 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
935 i8042_enable_aux_port();
937 if (i8042_ports[I8042_KBD_PORT_NO].serio)
938 i8042_enable_kbd_port();
940 i8042_interrupt(0, NULL);
942 dev->dev.power.power_state = PMSG_ON;
946 #endif /* CONFIG_PM */
949 * We need to reset the 8042 back to original mode on system shutdown,
950 * because otherwise BIOSes will be confused.
953 static void i8042_shutdown(struct platform_device *dev)
955 i8042_controller_reset();
958 static int __devinit i8042_create_kbd_port(void)
961 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
963 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
967 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
968 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
969 serio->start = i8042_start;
970 serio->stop = i8042_stop;
971 serio->port_data = port;
972 serio->dev.parent = &i8042_platform_device->dev;
973 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
974 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
977 port->irq = I8042_KBD_IRQ;
982 static int __devinit i8042_create_aux_port(int idx)
985 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
986 struct i8042_port *port = &i8042_ports[port_no];
988 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
992 serio->id.type = SERIO_8042;
993 serio->write = i8042_aux_write;
994 serio->start = i8042_start;
995 serio->stop = i8042_stop;
996 serio->port_data = port;
997 serio->dev.parent = &i8042_platform_device->dev;
999 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1000 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1002 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1003 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1006 port->serio = serio;
1008 port->irq = I8042_AUX_IRQ;
1013 static void __devinit i8042_free_kbd_port(void)
1015 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1016 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1019 static void __devinit i8042_free_aux_ports(void)
1023 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1024 kfree(i8042_ports[i].serio);
1025 i8042_ports[i].serio = NULL;
1029 static void __devinit i8042_register_ports(void)
1033 for (i = 0; i < I8042_NUM_PORTS; i++) {
1034 if (i8042_ports[i].serio) {
1035 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1036 i8042_ports[i].serio->name,
1037 (unsigned long) I8042_DATA_REG,
1038 (unsigned long) I8042_COMMAND_REG,
1039 i8042_ports[i].irq);
1040 serio_register_port(i8042_ports[i].serio);
1045 static void __devinit i8042_unregister_ports(void)
1049 for (i = 0; i < I8042_NUM_PORTS; i++) {
1050 if (i8042_ports[i].serio) {
1051 serio_unregister_port(i8042_ports[i].serio);
1052 i8042_ports[i].serio = NULL;
1057 static void i8042_free_irqs(void)
1059 if (i8042_aux_irq_registered)
1060 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1061 if (i8042_kbd_irq_registered)
1062 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1064 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
1067 static int __devinit i8042_setup_aux(void)
1069 int (*aux_enable)(void);
1073 if (i8042_check_aux())
1076 if (i8042_nomux || i8042_check_mux()) {
1077 error = i8042_create_aux_port(-1);
1079 goto err_free_ports;
1080 aux_enable = i8042_enable_aux_port;
1082 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1083 error = i8042_create_aux_port(i);
1085 goto err_free_ports;
1087 aux_enable = i8042_enable_mux_ports;
1090 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1091 "i8042", i8042_platform_device);
1093 goto err_free_ports;
1098 i8042_aux_irq_registered = 1;
1102 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1104 i8042_free_aux_ports();
1108 static int __devinit i8042_setup_kbd(void)
1112 error = i8042_create_kbd_port();
1116 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1117 "i8042", i8042_platform_device);
1121 error = i8042_enable_kbd_port();
1125 i8042_kbd_irq_registered = 1;
1129 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1131 i8042_free_kbd_port();
1135 static int __devinit i8042_probe(struct platform_device *dev)
1139 error = i8042_controller_selftest();
1143 error = i8042_controller_init();
1148 error = i8042_setup_aux();
1149 if (error && error != -ENODEV && error != -EBUSY)
1154 error = i8042_setup_kbd();
1160 * Ok, everything is ready, let's register all serio ports
1162 i8042_register_ports();
1167 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1169 i8042_controller_reset();
1174 static int __devexit i8042_remove(struct platform_device *dev)
1176 i8042_unregister_ports();
1178 i8042_controller_reset();
1183 static struct platform_driver i8042_driver = {
1186 .owner = THIS_MODULE,
1188 .probe = i8042_probe,
1189 .remove = __devexit_p(i8042_remove),
1190 .shutdown = i8042_shutdown,
1192 .suspend = i8042_suspend,
1193 .resume = i8042_resume,
1197 static int __init i8042_init(void)
1203 err = i8042_platform_init();
1207 err = i8042_controller_check();
1209 goto err_platform_exit;
1211 err = platform_driver_register(&i8042_driver);
1213 goto err_platform_exit;
1215 i8042_platform_device = platform_device_alloc("i8042", -1);
1216 if (!i8042_platform_device) {
1218 goto err_unregister_driver;
1221 err = platform_device_add(i8042_platform_device);
1223 goto err_free_device;
1225 panic_blink = i8042_panic_blink;
1230 platform_device_put(i8042_platform_device);
1231 err_unregister_driver:
1232 platform_driver_unregister(&i8042_driver);
1234 i8042_platform_exit();
1239 static void __exit i8042_exit(void)
1241 platform_device_unregister(i8042_platform_device);
1242 platform_driver_unregister(&i8042_driver);
1243 i8042_platform_exit();
1248 module_init(i8042_init);
1249 module_exit(i8042_exit);