2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/types.h>
14 #include <linux/delay.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
23 #include <linux/i8042.h>
24 #include <linux/slab.h>
28 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
29 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
30 MODULE_LICENSE("GPL");
32 static bool i8042_nokbd;
33 module_param_named(nokbd, i8042_nokbd, bool, 0);
34 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
36 static bool i8042_noaux;
37 module_param_named(noaux, i8042_noaux, bool, 0);
38 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
40 static bool i8042_nomux;
41 module_param_named(nomux, i8042_nomux, bool, 0);
42 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
44 static bool i8042_unlock;
45 module_param_named(unlock, i8042_unlock, bool, 0);
46 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
48 static bool i8042_reset;
49 module_param_named(reset, i8042_reset, bool, 0);
50 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
52 static bool i8042_direct;
53 module_param_named(direct, i8042_direct, bool, 0);
54 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
56 static bool i8042_dumbkbd;
57 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
58 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
60 static bool i8042_noloop;
61 module_param_named(noloop, i8042_noloop, bool, 0);
62 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
65 static bool i8042_dritek;
66 module_param_named(dritek, i8042_dritek, bool, 0);
67 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
71 static bool i8042_nopnp;
72 module_param_named(nopnp, i8042_nopnp, bool, 0);
73 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
78 static bool i8042_debug;
79 module_param_named(debug, i8042_debug, bool, 0600);
80 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
83 static bool i8042_bypass_aux_irq_test;
88 * i8042_lock protects serialization between i8042_command and
89 * the interrupt handler.
91 static DEFINE_SPINLOCK(i8042_lock);
94 * Writers to AUX and KBD ports as well as users issuing i8042_command
95 * directly should acquire i8042_mutex (by means of calling
96 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
97 * they do not disturb each other (unfortunately in many i8042
98 * implementations write to one of the ports will immediately abort
99 * command that is being processed by another port).
101 static DEFINE_MUTEX(i8042_mutex);
110 #define I8042_KBD_PORT_NO 0
111 #define I8042_AUX_PORT_NO 1
112 #define I8042_MUX_PORT_NO 2
113 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
115 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
117 static unsigned char i8042_initial_ctr;
118 static unsigned char i8042_ctr;
119 static bool i8042_mux_present;
120 static bool i8042_kbd_irq_registered;
121 static bool i8042_aux_irq_registered;
122 static unsigned char i8042_suppress_kbd_ack;
123 static struct platform_device *i8042_platform_device;
125 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
126 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
127 struct serio *serio);
129 void i8042_lock_chip(void)
131 mutex_lock(&i8042_mutex);
133 EXPORT_SYMBOL(i8042_lock_chip);
135 void i8042_unlock_chip(void)
137 mutex_unlock(&i8042_mutex);
139 EXPORT_SYMBOL(i8042_unlock_chip);
141 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
142 struct serio *serio))
147 spin_lock_irqsave(&i8042_lock, flags);
149 if (i8042_platform_filter) {
154 i8042_platform_filter = filter;
157 spin_unlock_irqrestore(&i8042_lock, flags);
160 EXPORT_SYMBOL(i8042_install_filter);
162 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
168 spin_lock_irqsave(&i8042_lock, flags);
170 if (i8042_platform_filter != filter) {
175 i8042_platform_filter = NULL;
178 spin_unlock_irqrestore(&i8042_lock, flags);
181 EXPORT_SYMBOL(i8042_remove_filter);
184 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
185 * be ready for reading values from it / writing values to it.
186 * Called always with i8042_lock held.
189 static int i8042_wait_read(void)
193 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
197 return -(i == I8042_CTL_TIMEOUT);
200 static int i8042_wait_write(void)
204 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
208 return -(i == I8042_CTL_TIMEOUT);
212 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
213 * of the i8042 down the toilet.
216 static int i8042_flush(void)
219 unsigned char data, str;
222 spin_lock_irqsave(&i8042_lock, flags);
224 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
226 data = i8042_read_data();
228 dbg("%02x <- i8042 (flush, %s)", data,
229 str & I8042_STR_AUXDATA ? "aux" : "kbd");
232 spin_unlock_irqrestore(&i8042_lock, flags);
238 * i8042_command() executes a command on the i8042. It also sends the input
239 * parameter(s) of the commands to it, and receives the output value(s). The
240 * parameters are to be stored in the param array, and the output is placed
241 * into the same array. The number of the parameters and output values is
242 * encoded in bits 8-11 of the command number.
245 static int __i8042_command(unsigned char *param, int command)
249 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
252 error = i8042_wait_write();
256 dbg("%02x -> i8042 (command)", command & 0xff);
257 i8042_write_command(command & 0xff);
259 for (i = 0; i < ((command >> 12) & 0xf); i++) {
260 error = i8042_wait_write();
263 dbg("%02x -> i8042 (parameter)", param[i]);
264 i8042_write_data(param[i]);
267 for (i = 0; i < ((command >> 8) & 0xf); i++) {
268 error = i8042_wait_read();
270 dbg(" -- i8042 (timeout)");
274 if (command == I8042_CMD_AUX_LOOP &&
275 !(i8042_read_status() & I8042_STR_AUXDATA)) {
276 dbg(" -- i8042 (auxerr)");
280 param[i] = i8042_read_data();
281 dbg("%02x <- i8042 (return)", param[i]);
287 int i8042_command(unsigned char *param, int command)
292 spin_lock_irqsave(&i8042_lock, flags);
293 retval = __i8042_command(param, command);
294 spin_unlock_irqrestore(&i8042_lock, flags);
298 EXPORT_SYMBOL(i8042_command);
301 * i8042_kbd_write() sends a byte out through the keyboard interface.
304 static int i8042_kbd_write(struct serio *port, unsigned char c)
309 spin_lock_irqsave(&i8042_lock, flags);
311 if (!(retval = i8042_wait_write())) {
312 dbg("%02x -> i8042 (kbd-data)", c);
316 spin_unlock_irqrestore(&i8042_lock, flags);
322 * i8042_aux_write() sends a byte out through the aux interface.
325 static int i8042_aux_write(struct serio *serio, unsigned char c)
327 struct i8042_port *port = serio->port_data;
329 return i8042_command(&c, port->mux == -1 ?
331 I8042_CMD_MUX_SEND + port->mux);
336 * i8042_aux_close attempts to clear AUX or KBD port state by disabling
337 * and then re-enabling it.
340 static void i8042_port_close(struct serio *serio)
344 const char *port_name;
346 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
347 irq_bit = I8042_CTR_AUXINT;
348 disable_bit = I8042_CTR_AUXDIS;
351 irq_bit = I8042_CTR_KBDINT;
352 disable_bit = I8042_CTR_KBDDIS;
356 i8042_ctr &= ~irq_bit;
357 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
359 "i8042.c: Can't write CTR while closing %s port.\n",
364 i8042_ctr &= ~disable_bit;
365 i8042_ctr |= irq_bit;
366 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
367 printk(KERN_ERR "i8042.c: Can't reactivate %s port.\n",
371 * See if there is any data appeared while we were messing with
374 i8042_interrupt(0, NULL);
378 * i8042_start() is called by serio core when port is about to finish
379 * registering. It will mark port as existing so i8042_interrupt can
380 * start sending data through it.
382 static int i8042_start(struct serio *serio)
384 struct i8042_port *port = serio->port_data;
392 * i8042_stop() marks serio port as non-existing so i8042_interrupt
393 * will not try to send data to the port that is about to go away.
394 * The function is called by serio core as part of unregister procedure.
396 static void i8042_stop(struct serio *serio)
398 struct i8042_port *port = serio->port_data;
400 port->exists = false;
403 * We synchronize with both AUX and KBD IRQs because there is
404 * a (very unlikely) chance that AUX IRQ is raised for KBD port
407 synchronize_irq(I8042_AUX_IRQ);
408 synchronize_irq(I8042_KBD_IRQ);
413 * i8042_filter() filters out unwanted bytes from the input data stream.
414 * It is called from i8042_interrupt and thus is running with interrupts
415 * off and i8042_lock held.
417 static bool i8042_filter(unsigned char data, unsigned char str,
420 if (unlikely(i8042_suppress_kbd_ack)) {
421 if ((~str & I8042_STR_AUXDATA) &&
422 (data == 0xfa || data == 0xfe)) {
423 i8042_suppress_kbd_ack--;
424 dbg("Extra keyboard ACK - filtered out\n");
429 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
430 dbg("Filtered out by platform filter\n");
438 * i8042_interrupt() is the most important function in this driver -
439 * it handles the interrupts from the i8042, and sends incoming bytes
440 * to the upper layers.
443 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
445 struct i8042_port *port;
448 unsigned char str, data;
450 unsigned int port_no;
454 spin_lock_irqsave(&i8042_lock, flags);
456 str = i8042_read_status();
457 if (unlikely(~str & I8042_STR_OBF)) {
458 spin_unlock_irqrestore(&i8042_lock, flags);
459 if (irq) dbg("Interrupt %d, without any data", irq);
464 data = i8042_read_data();
466 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
467 static unsigned long last_transmit;
468 static unsigned char last_str;
471 if (str & I8042_STR_MUXERR) {
472 dbg("MUX error, status is %02x, data is %02x", str, data);
474 * When MUXERR condition is signalled the data register can only contain
475 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
476 * it is not always the case. Some KBCs also report 0xfc when there is
477 * nothing connected to the port while others sometimes get confused which
478 * port the data came from and signal error leaving the data intact. They
479 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
480 * to legacy mode yet, when we see one we'll add proper handling).
481 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
482 * rest assume that the data came from the same serio last byte
483 * was transmitted (if transmission happened not too long ago).
488 if (time_before(jiffies, last_transmit + HZ/10)) {
492 /* fall through - report timeout */
495 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
496 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
500 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
502 last_transmit = jiffies;
505 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
506 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
508 port_no = (str & I8042_STR_AUXDATA) ?
509 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
512 port = &i8042_ports[port_no];
513 serio = port->exists ? port->serio : NULL;
515 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
517 dfl & SERIO_PARITY ? ", bad parity" : "",
518 dfl & SERIO_TIMEOUT ? ", timeout" : "");
520 filtered = i8042_filter(data, str, serio);
522 spin_unlock_irqrestore(&i8042_lock, flags);
524 if (likely(port->exists && !filtered))
525 serio_interrupt(serio, data, dfl);
528 return IRQ_RETVAL(ret);
532 * i8042_enable_kbd_port enables keyboard port on chip
535 static int i8042_enable_kbd_port(void)
537 i8042_ctr &= ~I8042_CTR_KBDDIS;
538 i8042_ctr |= I8042_CTR_KBDINT;
540 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
541 i8042_ctr &= ~I8042_CTR_KBDINT;
542 i8042_ctr |= I8042_CTR_KBDDIS;
543 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
551 * i8042_enable_aux_port enables AUX (mouse) port on chip
554 static int i8042_enable_aux_port(void)
556 i8042_ctr &= ~I8042_CTR_AUXDIS;
557 i8042_ctr |= I8042_CTR_AUXINT;
559 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
560 i8042_ctr &= ~I8042_CTR_AUXINT;
561 i8042_ctr |= I8042_CTR_AUXDIS;
562 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
570 * i8042_enable_mux_ports enables 4 individual AUX ports after
571 * the controller has been switched into Multiplexed mode
574 static int i8042_enable_mux_ports(void)
579 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
580 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
581 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
584 return i8042_enable_aux_port();
588 * i8042_set_mux_mode checks whether the controller has an
589 * active multiplexor and puts the chip into Multiplexed (true)
590 * or Legacy (false) mode.
593 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
596 unsigned char param, val;
598 * Get rid of bytes in the queue.
604 * Internal loopback test - send three bytes, they should come back from the
605 * mouse interface, the last should be version.
609 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
611 param = val = multiplex ? 0x56 : 0xf6;
612 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
614 param = val = multiplex ? 0xa4 : 0xa5;
615 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
619 * Workaround for interference with USB Legacy emulation
620 * that causes a v10.12 MUX to be found.
626 *mux_version = param;
632 * i8042_check_mux() checks whether the controller supports the PS/2 Active
633 * Multiplexing specification by Synaptics, Phoenix, Insyde and
637 static int __init i8042_check_mux(void)
639 unsigned char mux_version;
641 if (i8042_set_mux_mode(true, &mux_version))
644 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
645 (mux_version >> 4) & 0xf, mux_version & 0xf);
648 * Disable all muxed ports by disabling AUX.
650 i8042_ctr |= I8042_CTR_AUXDIS;
651 i8042_ctr &= ~I8042_CTR_AUXINT;
653 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
654 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
658 i8042_mux_present = true;
664 * The following is used to test AUX IRQ delivery.
666 static struct completion i8042_aux_irq_delivered __initdata;
667 static bool i8042_irq_being_tested __initdata;
669 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
672 unsigned char str, data;
675 spin_lock_irqsave(&i8042_lock, flags);
676 str = i8042_read_status();
677 if (str & I8042_STR_OBF) {
678 data = i8042_read_data();
679 dbg("%02x <- i8042 (aux_test_irq, %s)",
680 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
681 if (i8042_irq_being_tested &&
682 data == 0xa5 && (str & I8042_STR_AUXDATA))
683 complete(&i8042_aux_irq_delivered);
686 spin_unlock_irqrestore(&i8042_lock, flags);
688 return IRQ_RETVAL(ret);
692 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
693 * verifies success by readinng CTR. Used when testing for presence of AUX
696 static int __init i8042_toggle_aux(bool on)
701 if (i8042_command(¶m,
702 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
705 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
706 for (i = 0; i < 100; i++) {
709 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
712 if (!(param & I8042_CTR_AUXDIS) == on)
720 * i8042_check_aux() applies as much paranoia as it can at detecting
721 * the presence of an AUX interface.
724 static int __init i8042_check_aux(void)
727 bool irq_registered = false;
728 bool aux_loop_broken = false;
733 * Get rid of bytes in the queue.
739 * Internal loopback test - filters out AT-type i8042's. Unfortunately
740 * SiS screwed up and their 5597 doesn't support the LOOP command even
741 * though it has an AUX port.
745 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
746 if (retval || param != 0x5a) {
749 * External connection test - filters out AT-soldered PS/2 i8042's
750 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
751 * 0xfa - no error on some notebooks which ignore the spec
752 * Because it's common for chipsets to return error on perfectly functioning
753 * AUX ports, we test for this only when the LOOP command failed.
756 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
757 (param && param != 0xfa && param != 0xff))
761 * If AUX_LOOP completed without error but returned unexpected data
765 aux_loop_broken = true;
769 * Bit assignment test - filters out PS/2 i8042's in AT mode
772 if (i8042_toggle_aux(false)) {
773 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
774 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
777 if (i8042_toggle_aux(true))
781 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
782 * used it for a PCI card or somethig else.
785 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
787 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
788 * is working and hope we are right.
794 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
795 "i8042", i8042_platform_device))
798 irq_registered = true;
800 if (i8042_enable_aux_port())
803 spin_lock_irqsave(&i8042_lock, flags);
805 init_completion(&i8042_aux_irq_delivered);
806 i8042_irq_being_tested = true;
809 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
811 spin_unlock_irqrestore(&i8042_lock, flags);
816 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
817 msecs_to_jiffies(250)) == 0) {
819 * AUX IRQ was never delivered so we need to flush the controller to
820 * get rid of the byte we put there; otherwise keyboard may not work.
822 dbg(" -- i8042 (aux irq test timeout)");
830 * Disable the interface.
833 i8042_ctr |= I8042_CTR_AUXDIS;
834 i8042_ctr &= ~I8042_CTR_AUXINT;
836 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
840 free_irq(I8042_AUX_IRQ, i8042_platform_device);
845 static int i8042_controller_check(void)
847 if (i8042_flush() == I8042_BUFFER_SIZE) {
848 printk(KERN_ERR "i8042.c: No controller found.\n");
855 static int i8042_controller_selftest(void)
861 * We try this 5 times; on some really fragile systems this does not
862 * take the first time...
866 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
867 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
871 if (param == I8042_RET_CTL_TEST)
874 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
875 param, I8042_RET_CTL_TEST);
881 * On x86, we don't fail entire i8042 initialization if controller
882 * reset fails in hopes that keyboard port will still be functional
883 * and user will still get a working keyboard. This is especially
884 * important on netbooks. On other arches we trust hardware more.
887 "i8042: giving up on controller selftest, continuing anyway...\n");
895 * i8042_controller init initializes the i8042 controller, and,
896 * most importantly, sets it into non-xlated mode if that's
900 static int i8042_controller_init(void)
904 unsigned char ctr[2];
907 * Save the CTR for restore on unload / reboot.
913 "i8042.c: Unable to get stable CTR read.\n");
920 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
922 "i8042.c: Can't read CTR while initializing i8042.\n");
926 } while (n < 2 || ctr[0] != ctr[1]);
928 i8042_initial_ctr = i8042_ctr = ctr[0];
931 * Disable the keyboard interface and interrupt.
934 i8042_ctr |= I8042_CTR_KBDDIS;
935 i8042_ctr &= ~I8042_CTR_KBDINT;
941 spin_lock_irqsave(&i8042_lock, flags);
942 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
944 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
946 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
948 spin_unlock_irqrestore(&i8042_lock, flags);
951 * If the chip is configured into nontranslated mode by the BIOS, don't
952 * bother enabling translating and be happy.
955 if (~i8042_ctr & I8042_CTR_XLATE)
959 * Set nontranslated mode for the kbd interface if requested by an option.
960 * After this the kbd interface becomes a simple serial in/out, like the aux
961 * interface is. We don't do this by default, since it can confuse notebook
966 i8042_ctr &= ~I8042_CTR_XLATE;
972 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
973 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
978 * Flush whatever accumulated while we were disabling keyboard port.
988 * Reset the controller and reset CRT to the original value set by BIOS.
991 static void i8042_controller_reset(void)
996 * Disable both KBD and AUX interfaces so they don't get in the way
999 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1000 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1002 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1003 printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n");
1006 * Disable MUX mode if present.
1009 if (i8042_mux_present)
1010 i8042_set_mux_mode(false, NULL);
1013 * Reset the controller if requested.
1017 i8042_controller_selftest();
1020 * Restore the original control register setting.
1023 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1024 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
1029 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1030 * when kernel panics. Flashing LEDs is useful for users running X who may
1031 * not see the console and will help distingushing panics from "real"
1034 * Note that DELAY has a limit of 10ms so we will not get stuck here
1035 * waiting for KBC to free up even if KBD interrupt is off
1038 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1040 static long i8042_panic_blink(int state)
1045 led = (state) ? 0x01 | 0x04 : 0;
1046 while (i8042_read_status() & I8042_STR_IBF)
1048 dbg("%02x -> i8042 (panic blink)", 0xed);
1049 i8042_suppress_kbd_ack = 2;
1050 i8042_write_data(0xed); /* set leds */
1052 while (i8042_read_status() & I8042_STR_IBF)
1055 dbg("%02x -> i8042 (panic blink)", led);
1056 i8042_write_data(led);
1064 static void i8042_dritek_enable(void)
1066 unsigned char param = 0x90;
1069 error = i8042_command(¶m, 0x1059);
1072 "Failed to enable DRITEK extension: %d\n",
1080 * Here we try to reset everything back to a state we had
1081 * before suspending.
1084 static int i8042_controller_resume(bool force_reset)
1088 error = i8042_controller_check();
1092 if (i8042_reset || force_reset) {
1093 error = i8042_controller_selftest();
1099 * Restore original CTR value and disable all ports
1102 i8042_ctr = i8042_initial_ctr;
1104 i8042_ctr &= ~I8042_CTR_XLATE;
1105 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1106 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1107 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1108 printk(KERN_WARNING "i8042: Can't write CTR to resume, retrying...\n");
1110 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1111 printk(KERN_ERR "i8042: CTR write retry failed\n");
1119 i8042_dritek_enable();
1122 if (i8042_mux_present) {
1123 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1125 "i8042: failed to resume active multiplexor, "
1126 "mouse won't work.\n");
1127 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1128 i8042_enable_aux_port();
1130 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1131 i8042_enable_kbd_port();
1133 i8042_interrupt(0, NULL);
1139 * Here we try to restore the original BIOS settings to avoid
1143 static int i8042_pm_reset(struct device *dev)
1145 i8042_controller_reset();
1150 static int i8042_pm_resume(struct device *dev)
1153 * On resume from S2R we always try to reset the controller
1154 * to bring it in a sane state. (In case of S2D we expect
1155 * BIOS to reset the controller for us.)
1157 return i8042_controller_resume(true);
1160 static int i8042_pm_thaw(struct device *dev)
1162 i8042_interrupt(0, NULL);
1167 static int i8042_pm_restore(struct device *dev)
1169 return i8042_controller_resume(false);
1172 static const struct dev_pm_ops i8042_pm_ops = {
1173 .suspend = i8042_pm_reset,
1174 .resume = i8042_pm_resume,
1175 .thaw = i8042_pm_thaw,
1176 .poweroff = i8042_pm_reset,
1177 .restore = i8042_pm_restore,
1180 #endif /* CONFIG_PM */
1183 * We need to reset the 8042 back to original mode on system shutdown,
1184 * because otherwise BIOSes will be confused.
1187 static void i8042_shutdown(struct platform_device *dev)
1189 i8042_controller_reset();
1192 static int __init i8042_create_kbd_port(void)
1194 struct serio *serio;
1195 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1197 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1201 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1202 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1203 serio->start = i8042_start;
1204 serio->stop = i8042_stop;
1205 serio->close = i8042_port_close;
1206 serio->port_data = port;
1207 serio->dev.parent = &i8042_platform_device->dev;
1208 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1209 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1211 port->serio = serio;
1212 port->irq = I8042_KBD_IRQ;
1217 static int __init i8042_create_aux_port(int idx)
1219 struct serio *serio;
1220 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1221 struct i8042_port *port = &i8042_ports[port_no];
1223 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1227 serio->id.type = SERIO_8042;
1228 serio->write = i8042_aux_write;
1229 serio->start = i8042_start;
1230 serio->stop = i8042_stop;
1231 serio->port_data = port;
1232 serio->dev.parent = &i8042_platform_device->dev;
1234 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1235 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1236 serio->close = i8042_port_close;
1238 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1239 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1242 port->serio = serio;
1244 port->irq = I8042_AUX_IRQ;
1249 static void __init i8042_free_kbd_port(void)
1251 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1252 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1255 static void __init i8042_free_aux_ports(void)
1259 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1260 kfree(i8042_ports[i].serio);
1261 i8042_ports[i].serio = NULL;
1265 static void __init i8042_register_ports(void)
1269 for (i = 0; i < I8042_NUM_PORTS; i++) {
1270 if (i8042_ports[i].serio) {
1271 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1272 i8042_ports[i].serio->name,
1273 (unsigned long) I8042_DATA_REG,
1274 (unsigned long) I8042_COMMAND_REG,
1275 i8042_ports[i].irq);
1276 serio_register_port(i8042_ports[i].serio);
1281 static void __devexit i8042_unregister_ports(void)
1285 for (i = 0; i < I8042_NUM_PORTS; i++) {
1286 if (i8042_ports[i].serio) {
1287 serio_unregister_port(i8042_ports[i].serio);
1288 i8042_ports[i].serio = NULL;
1294 * Checks whether port belongs to i8042 controller.
1296 bool i8042_check_port_owner(const struct serio *port)
1300 for (i = 0; i < I8042_NUM_PORTS; i++)
1301 if (i8042_ports[i].serio == port)
1306 EXPORT_SYMBOL(i8042_check_port_owner);
1308 static void i8042_free_irqs(void)
1310 if (i8042_aux_irq_registered)
1311 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1312 if (i8042_kbd_irq_registered)
1313 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1315 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1318 static int __init i8042_setup_aux(void)
1320 int (*aux_enable)(void);
1324 if (i8042_check_aux())
1327 if (i8042_nomux || i8042_check_mux()) {
1328 error = i8042_create_aux_port(-1);
1330 goto err_free_ports;
1331 aux_enable = i8042_enable_aux_port;
1333 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1334 error = i8042_create_aux_port(i);
1336 goto err_free_ports;
1338 aux_enable = i8042_enable_mux_ports;
1341 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1342 "i8042", i8042_platform_device);
1344 goto err_free_ports;
1349 i8042_aux_irq_registered = true;
1353 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1355 i8042_free_aux_ports();
1359 static int __init i8042_setup_kbd(void)
1363 error = i8042_create_kbd_port();
1367 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1368 "i8042", i8042_platform_device);
1372 error = i8042_enable_kbd_port();
1376 i8042_kbd_irq_registered = true;
1380 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1382 i8042_free_kbd_port();
1386 static int __init i8042_probe(struct platform_device *dev)
1390 i8042_platform_device = dev;
1393 error = i8042_controller_selftest();
1398 error = i8042_controller_init();
1404 i8042_dritek_enable();
1408 error = i8042_setup_aux();
1409 if (error && error != -ENODEV && error != -EBUSY)
1414 error = i8042_setup_kbd();
1419 * Ok, everything is ready, let's register all serio ports
1421 i8042_register_ports();
1426 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1428 i8042_controller_reset();
1429 i8042_platform_device = NULL;
1434 static int __devexit i8042_remove(struct platform_device *dev)
1436 i8042_unregister_ports();
1438 i8042_controller_reset();
1439 i8042_platform_device = NULL;
1444 static struct platform_driver i8042_driver = {
1447 .owner = THIS_MODULE,
1449 .pm = &i8042_pm_ops,
1452 .remove = __devexit_p(i8042_remove),
1453 .shutdown = i8042_shutdown,
1456 static int __init i8042_init(void)
1458 struct platform_device *pdev;
1463 err = i8042_platform_init();
1467 err = i8042_controller_check();
1469 goto err_platform_exit;
1471 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1473 err = PTR_ERR(pdev);
1474 goto err_platform_exit;
1477 panic_blink = i8042_panic_blink;
1482 i8042_platform_exit();
1486 static void __exit i8042_exit(void)
1488 platform_device_unregister(i8042_platform_device);
1489 platform_driver_unregister(&i8042_driver);
1490 i8042_platform_exit();
1495 module_init(i8042_init);
1496 module_exit(i8042_exit);