drivers/iommu/fsl_pamu_domain.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License, version 2, as
   4  * published by the Free Software Foundation.
   5  *
   6  * This program is distributed in the hope that it will be useful,
   7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  * GNU General Public License for more details.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program; if not, write to the Free Software
  13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  14  *
  15  * Copyright (C) 2013 Freescale Semiconductor, Inc.
  16  * Author: Varun Sethi <varun.sethi@freescale.com>
  17  *
  18  */
  19
  20 #define pr_fmt(fmt)    "fsl-pamu-domain: %s: " fmt, __func__
  21
  22 #include <linux/init.h>
  23 #include <linux/iommu.h>
  24 #include <linux/notifier.h>
  25 #include <linux/slab.h>
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/mm.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/device.h>
  31 #include <linux/of_platform.h>
  32 #include <linux/bootmem.h>
  33 #include <linux/err.h>
  34 #include <asm/io.h>
  35 #include <asm/bitops.h>
  36
  37 #include <asm/pci-bridge.h>
  38 #include <sysdev/fsl_pci.h>
  39
  40 #include "fsl_pamu_domain.h"
  41
  42 /*
  43  * Global spinlock that needs to be held while
  44  * configuring PAMU.
  45  */
  46 static DEFINE_SPINLOCK(iommu_lock);
  47
  48 static struct kmem_cache *fsl_pamu_domain_cache;
  49 static struct kmem_cache *iommu_devinfo_cache;
  50 static DEFINE_SPINLOCK(device_domain_lock);
  51
  52 static int __init iommu_init_mempool(void)
  53 {
  54
  55         fsl_pamu_domain_cache = kmem_cache_create("fsl_pamu_domain",
  56                                          sizeof(struct fsl_dma_domain),
  57                                          0,
  58                                          SLAB_HWCACHE_ALIGN,
  59
  60                                          NULL);
  61         if (!fsl_pamu_domain_cache) {
  62                 pr_debug("Couldn't create fsl iommu_domain cache\n");
  63                 return -ENOMEM;
  64         }
  65
  66         iommu_devinfo_cache = kmem_cache_create("iommu_devinfo",
  67                                          sizeof(struct device_domain_info),
  68                                          0,
  69                                          SLAB_HWCACHE_ALIGN,
  70                                          NULL);
  71         if (!iommu_devinfo_cache) {
  72                 pr_debug("Couldn't create devinfo cache\n");
  73                 kmem_cache_destroy(fsl_pamu_domain_cache);
  74                 return -ENOMEM;
  75         }
  76
  77         return 0;
  78 }
  79
  80 static phys_addr_t get_phys_addr(struct fsl_dma_domain *dma_domain, dma_addr_t iova)
  81 {
  82         u32 win_cnt = dma_domain->win_cnt;
  83         struct dma_window *win_ptr =
  84                                 &dma_domain->win_arr[0];
  85         struct iommu_domain_geometry *geom;
  86
  87         geom = &dma_domain->iommu_domain->geometry;
  88
  89         if (!win_cnt || !dma_domain->geom_size) {
  90                 pr_debug("Number of windows/geometry not configured for the domain\n");
  91                 return 0;
  92         }
  93
  94         if (win_cnt > 1) {
  95                 u64 subwin_size;
  96                 dma_addr_t subwin_iova;
  97                 u32 wnd;
  98
  99                 subwin_size = dma_domain->geom_size >> ilog2(win_cnt);
 100                 subwin_iova = iova & ~(subwin_size - 1);
 101                 wnd = (subwin_iova - geom->aperture_start) >> ilog2(subwin_size);
 102                 win_ptr = &dma_domain->win_arr[wnd];
 103         }
 104
 105         if (win_ptr->valid)
 106                 return (win_ptr->paddr + (iova & (win_ptr->size - 1)));
 107
 108         return 0;
 109 }
 110
 111 static int map_subwins(int liodn, struct fsl_dma_domain *dma_domain)
 112 {
 113         struct dma_window *sub_win_ptr =
 114                                 &dma_domain->win_arr[0];
 115         int i, ret;
 116         unsigned long rpn, flags;
 117
 118         for (i = 0; i < dma_domain->win_cnt; i++) {
 119                 if (sub_win_ptr[i].valid) {
 120                         rpn = sub_win_ptr[i].paddr >>
 121                                  PAMU_PAGE_SHIFT;
 122                         spin_lock_irqsave(&iommu_lock, flags);
 123                         ret = pamu_config_spaace(liodn, dma_domain->win_cnt, i,
 124                                                  sub_win_ptr[i].size,
 125                                                  ~(u32)0,
 126                                                  rpn,
 127                                                  dma_domain->snoop_id,
 128                                                  dma_domain->stash_id,
 129                                                  (i > 0) ? 1 : 0,
 130                                                  sub_win_ptr[i].prot);
 131                         spin_unlock_irqrestore(&iommu_lock, flags);
 132                         if (ret) {
 133                                 pr_debug("PAMU SPAACE configuration failed for liodn %d\n",
 134                                          liodn);
 135                                 return ret;
 136                         }
 137                 }
 138         }
 139
 140         return ret;
 141 }
 142
 143 static int map_win(int liodn, struct fsl_dma_domain *dma_domain)
 144 {
 145         int ret;
 146         struct dma_window *wnd = &dma_domain->win_arr[0];
 147         phys_addr_t wnd_addr = dma_domain->iommu_domain->geometry.aperture_start;
 148         unsigned long flags;
 149
 150         spin_lock_irqsave(&iommu_lock, flags);
 151         ret = pamu_config_ppaace(liodn, wnd_addr,
 152                                  wnd->size,
 153                                  ~(u32)0,
 154                                  wnd->paddr >> PAMU_PAGE_SHIFT,
 155                                  dma_domain->snoop_id, dma_domain->stash_id,
 156                                  0, wnd->prot);
 157         spin_unlock_irqrestore(&iommu_lock, flags);
 158         if (ret)
 159                 pr_debug("PAMU PAACE configuration failed for liodn %d\n",
 160                         liodn);
 161
 162         return ret;
 163 }
 164
 165 /* Map the DMA window corresponding to the LIODN */
 166 static int map_liodn(int liodn, struct fsl_dma_domain *dma_domain)
 167 {
 168         if (dma_domain->win_cnt > 1)
 169                 return map_subwins(liodn, dma_domain);
 170         else
 171                 return map_win(liodn, dma_domain);
 172
 173 }
 174
 175 /* Update window/subwindow mapping for the LIODN */
 176 static int update_liodn(int liodn, struct fsl_dma_domain *dma_domain, u32 wnd_nr)
 177 {
 178         int ret;
 179         struct dma_window *wnd = &dma_domain->win_arr[wnd_nr];
 180         unsigned long flags;
 181
 182         spin_lock_irqsave(&iommu_lock, flags);
 183         if (dma_domain->win_cnt > 1) {
 184                 ret = pamu_config_spaace(liodn, dma_domain->win_cnt, wnd_nr,
 185                                          wnd->size,
 186                                          ~(u32)0,
 187                                          wnd->paddr >> PAMU_PAGE_SHIFT,
 188                                          dma_domain->snoop_id,
 189                                          dma_domain->stash_id,
 190                                          (wnd_nr > 0) ? 1 : 0,
 191                                          wnd->prot);
 192                 if (ret)
 193                         pr_debug("Subwindow reconfiguration failed for liodn %d\n", liodn);
 194         } else {
 195                 phys_addr_t wnd_addr;
 196
 197                 wnd_addr = dma_domain->iommu_domain->geometry.aperture_start;
 198
 199                 ret = pamu_config_ppaace(liodn, wnd_addr,
 200                                          wnd->size,
 201                                          ~(u32)0,
 202                                          wnd->paddr >> PAMU_PAGE_SHIFT,
 203                                         dma_domain->snoop_id, dma_domain->stash_id,
 204                                         0, wnd->prot);
 205                 if (ret)
 206                         pr_debug("Window reconfiguration failed for liodn %d\n", liodn);
 207         }
 208
 209         spin_unlock_irqrestore(&iommu_lock, flags);
 210
 211         return ret;
 212 }
 213
 214 static int update_liodn_stash(int liodn, struct fsl_dma_domain *dma_domain,
 215                                  u32 val)
 216 {
 217         int ret = 0, i;
 218         unsigned long flags;
 219
 220         spin_lock_irqsave(&iommu_lock, flags);
 221         if (!dma_domain->win_arr) {
 222                 pr_debug("Windows not configured, stash destination update failed for liodn %d\n", liodn);
 223                 spin_unlock_irqrestore(&iommu_lock, flags);
 224                 return -EINVAL;
 225         }
 226
 227         for (i = 0; i < dma_domain->win_cnt; i++) {
 228                 ret = pamu_update_paace_stash(liodn, i, val);
 229                 if (ret) {
 230                         pr_debug("Failed to update SPAACE %d field for liodn %d\n ", i, liodn);
 231                         spin_unlock_irqrestore(&iommu_lock, flags);
 232                         return ret;
 233                 }
 234         }
 235
 236         spin_unlock_irqrestore(&iommu_lock, flags);
 237
 238         return ret;
 239 }
 240
 241 /* Set the geometry parameters for a LIODN */
 242 static int pamu_set_liodn(int liodn, struct device *dev,
 243                            struct fsl_dma_domain *dma_domain,
 244                            struct iommu_domain_geometry *geom_attr,
 245                            u32 win_cnt)
 246 {
 247         phys_addr_t window_addr, window_size;
 248         phys_addr_t subwin_size;
 249         int ret = 0, i;
 250         u32 omi_index = ~(u32)0;
 251         unsigned long flags;
 252
 253         /*
 254          * Configure the omi_index at the geometry setup time.
 255          * This is a static value which depends on the type of
 256          * device and would not change thereafter.
 257          */
 258         get_ome_index(&omi_index, dev);
 259
 260         window_addr = geom_attr->aperture_start;
 261         window_size = dma_domain->geom_size;
 262
 263         spin_lock_irqsave(&iommu_lock, flags);
 264         ret = pamu_disable_liodn(liodn);
 265         if (!ret)
 266                 ret = pamu_config_ppaace(liodn, window_addr, window_size, omi_index,
 267                                          0, dma_domain->snoop_id,
 268                                          dma_domain->stash_id, win_cnt, 0);
 269         spin_unlock_irqrestore(&iommu_lock, flags);
 270         if (ret) {
 271                 pr_debug("PAMU PAACE configuration failed for liodn %d, win_cnt =%d\n", liodn, win_cnt);
 272                 return ret;
 273         }
 274
 275         if (win_cnt > 1) {
 276                 subwin_size = window_size >> ilog2(win_cnt);
 277                 for (i = 0; i < win_cnt; i++) {
 278                         spin_lock_irqsave(&iommu_lock, flags);
 279                         ret = pamu_disable_spaace(liodn, i);
 280                         if (!ret)
 281                                 ret = pamu_config_spaace(liodn, win_cnt, i,
 282                                                          subwin_size, omi_index,
 283                                                          0, dma_domain->snoop_id,
 284                                                          dma_domain->stash_id,
 285                                                          0, 0);
 286                         spin_unlock_irqrestore(&iommu_lock, flags);
 287                         if (ret) {
 288                                 pr_debug("PAMU SPAACE configuration failed for liodn %d\n", liodn);
 289                                 return ret;
 290                         }
 291                 }
 292         }
 293
 294         return ret;
 295 }
 296
 297 static int check_size(u64 size, dma_addr_t iova)
 298 {
 299         /*
 300          * Size must be a power of two and at least be equal
 301          * to PAMU page size.
 302          */
 303         if (!is_power_of_2(size) || size < PAMU_PAGE_SIZE) {
 304                 pr_debug("%s: size too small or not a power of two\n", __func__);
 305                 return -EINVAL;
 306         }
 307
 308         /* iova must be page size aligned*/
 309         if (iova & (size - 1)) {
 310                 pr_debug("%s: address is not aligned with window size\n", __func__);
 311                 return -EINVAL;
 312         }
 313
 314         return 0;
 315 }
 316
 317 static struct fsl_dma_domain *iommu_alloc_dma_domain(void)
 318 {
 319         struct fsl_dma_domain *domain;
 320
 321         domain = kmem_cache_zalloc(fsl_pamu_domain_cache, GFP_KERNEL);
 322         if (!domain)
 323                 return NULL;
 324
 325         domain->stash_id = ~(u32)0;
 326         domain->snoop_id = ~(u32)0;
 327         domain->win_cnt = pamu_get_max_subwin_cnt();
 328         domain->geom_size = 0;
 329
 330         INIT_LIST_HEAD(&domain->devices);
 331
 332         spin_lock_init(&domain->domain_lock);
 333
 334         return domain;
 335 }
 336
 337 static inline struct device_domain_info *find_domain(struct device *dev)
 338 {
 339         return dev->archdata.iommu_domain;
 340 }
 341
 342 static void remove_device_ref(struct device_domain_info *info, u32 win_cnt)
 343 {
 344         unsigned long flags;
 345
 346         list_del(&info->link);
 347         spin_lock_irqsave(&iommu_lock, flags);
 348         if (win_cnt > 1)
 349                 pamu_free_subwins(info->liodn);
 350         pamu_disable_liodn(info->liodn);
 351         spin_unlock_irqrestore(&iommu_lock, flags);
 352         spin_lock_irqsave(&device_domain_lock, flags);
 353         info->dev->archdata.iommu_domain = NULL;
 354         kmem_cache_free(iommu_devinfo_cache, info);
 355         spin_unlock_irqrestore(&device_domain_lock, flags);
 356 }
 357
 358 static void detach_device(struct device *dev, struct fsl_dma_domain *dma_domain)
 359 {
 360         struct device_domain_info *info, *tmp;
 361         unsigned long flags;
 362
 363         spin_lock_irqsave(&dma_domain->domain_lock, flags);
 364         /* Remove the device from the domain device list */
 365         list_for_each_entry_safe(info, tmp, &dma_domain->devices, link) {
 366                 if (!dev || (info->dev == dev))
 367                         remove_device_ref(info, dma_domain->win_cnt);
 368         }
 369         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 370 }
 371
 372 static void attach_device(struct fsl_dma_domain *dma_domain, int liodn, struct device *dev)
 373 {
 374         struct device_domain_info *info, *old_domain_info;
 375         unsigned long flags;
 376
 377         spin_lock_irqsave(&device_domain_lock, flags);
 378         /*
 379          * Check here if the device is already attached to domain or not.
 380          * If the device is already attached to a domain detach it.
 381          */
 382         old_domain_info = find_domain(dev);
 383         if (old_domain_info && old_domain_info->domain != dma_domain) {
 384                 spin_unlock_irqrestore(&device_domain_lock, flags);
 385                 detach_device(dev, old_domain_info->domain);
 386                 spin_lock_irqsave(&device_domain_lock, flags);
 387         }
 388
 389         info = kmem_cache_zalloc(iommu_devinfo_cache, GFP_ATOMIC);
 390
 391         info->dev = dev;
 392         info->liodn = liodn;
 393         info->domain = dma_domain;
 394
 395         list_add(&info->link, &dma_domain->devices);
 396         /*
 397          * In case of devices with multiple LIODNs just store
 398          * the info for the first LIODN as all
 399          * LIODNs share the same domain
 400          */
 401         if (!old_domain_info)
 402                 dev->archdata.iommu_domain = info;
 403         spin_unlock_irqrestore(&device_domain_lock, flags);
 404
 405 }
 406
 407 static phys_addr_t fsl_pamu_iova_to_phys(struct iommu_domain *domain,
 408                                             dma_addr_t iova)
 409 {
 410         struct fsl_dma_domain *dma_domain = domain->priv;
 411
 412         if ((iova < domain->geometry.aperture_start) ||
 413                 iova > (domain->geometry.aperture_end))
 414                 return 0;
 415
 416         return get_phys_addr(dma_domain, iova);
 417 }
 418
 419 static int fsl_pamu_domain_has_cap(struct iommu_domain *domain,
 420                                       unsigned long cap)
 421 {
 422         return cap == IOMMU_CAP_CACHE_COHERENCY;
 423 }
 424
 425 static void fsl_pamu_domain_destroy(struct iommu_domain *domain)
 426 {
 427         struct fsl_dma_domain *dma_domain = domain->priv;
 428
 429         domain->priv = NULL;
 430
 431         /* remove all the devices from the device list */
 432         detach_device(NULL, dma_domain);
 433
 434         dma_domain->enabled = 0;
 435         dma_domain->mapped = 0;
 436
 437         kmem_cache_free(fsl_pamu_domain_cache, dma_domain);
 438 }
 439
 440 static int fsl_pamu_domain_init(struct iommu_domain *domain)
 441 {
 442         struct fsl_dma_domain *dma_domain;
 443
 444         dma_domain = iommu_alloc_dma_domain();
 445         if (!dma_domain) {
 446                 pr_debug("dma_domain allocation failed\n");
 447                 return -ENOMEM;
 448         }
 449         domain->priv = dma_domain;
 450         dma_domain->iommu_domain = domain;
 451         /* defaul geometry 64 GB i.e. maximum system address */
 452         domain->geometry.aperture_start = 0;
 453         domain->geometry.aperture_end = (1ULL << 36) - 1;
 454         domain->geometry.force_aperture = true;
 455
 456         return 0;
 457 }
 458
 459 /* Configure geometry settings for all LIODNs associated with domain */
 460 static int pamu_set_domain_geometry(struct fsl_dma_domain *dma_domain,
 461                                     struct iommu_domain_geometry *geom_attr,
 462                                     u32 win_cnt)
 463 {
 464         struct device_domain_info *info;
 465         int ret = 0;
 466
 467         list_for_each_entry(info, &dma_domain->devices, link) {
 468                 ret = pamu_set_liodn(info->liodn, info->dev, dma_domain,
 469                                       geom_attr, win_cnt);
 470                 if (ret)
 471                         break;
 472         }
 473
 474         return ret;
 475 }
 476
 477 /* Update stash destination for all LIODNs associated with the domain */
 478 static int update_domain_stash(struct fsl_dma_domain *dma_domain, u32 val)
 479 {
 480         struct device_domain_info *info;
 481         int ret = 0;
 482
 483         list_for_each_entry(info, &dma_domain->devices, link) {
 484                 ret = update_liodn_stash(info->liodn, dma_domain, val);
 485                 if (ret)
 486                         break;
 487         }
 488
 489         return ret;
 490 }
 491
 492 /* Update domain mappings for all LIODNs associated with the domain */
 493 static int update_domain_mapping(struct fsl_dma_domain *dma_domain, u32 wnd_nr)
 494 {
 495         struct device_domain_info *info;
 496         int ret = 0;
 497
 498         list_for_each_entry(info, &dma_domain->devices, link) {
 499                 ret = update_liodn(info->liodn, dma_domain, wnd_nr);
 500                 if (ret)
 501                         break;
 502         }
 503         return ret;
 504 }
 505
 506 static int disable_domain_win(struct fsl_dma_domain *dma_domain, u32 wnd_nr)
 507 {
 508         struct device_domain_info *info;
 509         int ret = 0;
 510
 511         list_for_each_entry(info, &dma_domain->devices, link) {
 512                 if (dma_domain->win_cnt == 1 && dma_domain->enabled) {
 513                         ret = pamu_disable_liodn(info->liodn);
 514                         if (!ret)
 515                                 dma_domain->enabled = 0;
 516                 } else {
 517                         ret = pamu_disable_spaace(info->liodn, wnd_nr);
 518                 }
 519         }
 520
 521         return ret;
 522 }
 523
 524 static void fsl_pamu_window_disable(struct iommu_domain *domain, u32 wnd_nr)
 525 {
 526         struct fsl_dma_domain *dma_domain = domain->priv;
 527         unsigned long flags;
 528         int ret;
 529
 530         spin_lock_irqsave(&dma_domain->domain_lock, flags);
 531         if (!dma_domain->win_arr) {
 532                 pr_debug("Number of windows not configured\n");
 533                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 534                 return;
 535         }
 536
 537         if (wnd_nr >= dma_domain->win_cnt) {
 538                 pr_debug("Invalid window index\n");
 539                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 540                 return;
 541         }
 542
 543         if (dma_domain->win_arr[wnd_nr].valid) {
 544                 ret = disable_domain_win(dma_domain, wnd_nr);
 545                 if (!ret) {
 546                         dma_domain->win_arr[wnd_nr].valid = 0;
 547                         dma_domain->mapped--;
 548                 }
 549         }
 550
 551         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 552
 553 }
 554
 555 static int fsl_pamu_window_enable(struct iommu_domain *domain, u32 wnd_nr,
 556                                   phys_addr_t paddr, u64 size, int prot)
 557 {
 558         struct fsl_dma_domain *dma_domain = domain->priv;
 559         struct dma_window *wnd;
 560         int pamu_prot = 0;
 561         int ret;
 562         unsigned long flags;
 563         u64 win_size;
 564
 565         if (prot & IOMMU_READ)
 566                 pamu_prot |= PAACE_AP_PERMS_QUERY;
 567         if (prot & IOMMU_WRITE)
 568                 pamu_prot |= PAACE_AP_PERMS_UPDATE;
 569
 570         spin_lock_irqsave(&dma_domain->domain_lock, flags);
 571         if (!dma_domain->win_arr) {
 572                 pr_debug("Number of windows not configured\n");
 573                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 574                 return -ENODEV;
 575         }
 576
 577         if (wnd_nr >= dma_domain->win_cnt) {
 578                 pr_debug("Invalid window index\n");
 579                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 580                 return -EINVAL;
 581         }
 582
 583         win_size = dma_domain->geom_size >> ilog2(dma_domain->win_cnt);
 584         if (size > win_size) {
 585                 pr_debug("Invalid window size \n");
 586                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 587                 return -EINVAL;
 588         }
 589
 590         if (dma_domain->win_cnt == 1) {
 591                 if (dma_domain->enabled) {
 592                         pr_debug("Disable the window before updating the mapping\n");
 593                         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 594                         return -EBUSY;
 595                 }
 596
 597                 ret = check_size(size, domain->geometry.aperture_start);
 598                 if (ret) {
 599                         pr_debug("Aperture start not aligned to the size\n");
 600                         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 601                         return -EINVAL;
 602                 }
 603         }
 604
 605         wnd = &dma_domain->win_arr[wnd_nr];
 606         if (!wnd->valid) {
 607                 wnd->paddr = paddr;
 608                 wnd->size = size;
 609                 wnd->prot = pamu_prot;
 610
 611                 ret = update_domain_mapping(dma_domain, wnd_nr);
 612                 if (!ret) {
 613                         wnd->valid = 1;
 614                         dma_domain->mapped++;
 615                 }
 616         } else {
 617                 pr_debug("Disable the window before updating the mapping\n");
 618                 ret = -EBUSY;
 619         }
 620
 621         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 622
 623         return ret;
 624 }
 625
 626 /*
 627  * Attach the LIODN to the DMA domain and configure the geometry
 628  * and window mappings.
 629  */
 630 static int handle_attach_device(struct fsl_dma_domain *dma_domain,
 631                                  struct device *dev, const u32 *liodn,
 632                                  int num)
 633 {
 634         unsigned long flags;
 635         struct iommu_domain *domain = dma_domain->iommu_domain;
 636         int ret = 0;
 637         int i;
 638
 639         spin_lock_irqsave(&dma_domain->domain_lock, flags);
 640         for (i = 0; i < num; i++) {
 641
 642                 /* Ensure that LIODN value is valid */
 643                 if (liodn[i] >= PAACE_NUMBER_ENTRIES) {
 644                         pr_debug("Invalid liodn %d, attach device failed for %s\n",
 645                                 liodn[i], dev->of_node->full_name);
 646                         ret = -EINVAL;
 647                         break;
 648                 }
 649
 650                 attach_device(dma_domain, liodn[i], dev);
 651                 /*
 652                  * Check if geometry has already been configured
 653                  * for the domain. If yes, set the geometry for
 654                  * the LIODN.
 655                  */
 656                 if (dma_domain->win_arr) {
 657                         u32 win_cnt = dma_domain->win_cnt > 1 ? dma_domain->win_cnt : 0;
 658                         ret = pamu_set_liodn(liodn[i], dev, dma_domain,
 659                                               &domain->geometry,
 660                                               win_cnt);
 661                         if (ret)
 662                                 break;
 663                         if (dma_domain->mapped) {
 664                                 /*
 665                                  * Create window/subwindow mapping for
 666                                  * the LIODN.
 667                                  */
 668                                 ret = map_liodn(liodn[i], dma_domain);
 669                                 if (ret)
 670                                         break;
 671                         }
 672                 }
 673         }
 674         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 675
 676         return ret;
 677 }
 678
 679 static int fsl_pamu_attach_device(struct iommu_domain *domain,
 680                                   struct device *dev)
 681 {
 682         struct fsl_dma_domain *dma_domain = domain->priv;
 683         const u32 *liodn;
 684         u32 liodn_cnt;
 685         int len, ret = 0;
 686         struct pci_dev *pdev = NULL;
 687         struct pci_controller *pci_ctl;
 688
 689         /*
 690          * Use LIODN of the PCI controller while attaching a
 691          * PCI device.
 692          */
 693         if (dev_is_pci(dev)) {
 694                 pdev = to_pci_dev(dev);
 695                 pci_ctl = pci_bus_to_host(pdev->bus);
 696                 /*
 697                  * make dev point to pci controller device
 698                  * so we can get the LIODN programmed by
 699                  * u-boot.
 700                  */
 701                 dev = pci_ctl->parent;
 702         }
 703
 704         liodn = of_get_property(dev->of_node, "fsl,liodn", &len);
 705         if (liodn) {
 706                 liodn_cnt = len / sizeof(u32);
 707                 ret = handle_attach_device(dma_domain, dev,
 708                                          liodn, liodn_cnt);
 709         } else {
 710                 pr_debug("missing fsl,liodn property at %s\n",
 711                           dev->of_node->full_name);
 712                         ret = -EINVAL;
 713         }
 714
 715         return ret;
 716 }
 717
 718 static void fsl_pamu_detach_device(struct iommu_domain *domain,
 719                                       struct device *dev)
 720 {
 721         struct fsl_dma_domain *dma_domain = domain->priv;
 722         const u32 *prop;
 723         int len;
 724         struct pci_dev *pdev = NULL;
 725         struct pci_controller *pci_ctl;
 726
 727         /*
 728          * Use LIODN of the PCI controller while detaching a
 729          * PCI device.
 730          */
 731         if (dev_is_pci(dev)) {
 732                 pdev = to_pci_dev(dev);
 733                 pci_ctl = pci_bus_to_host(pdev->bus);
 734                 /*
 735                  * make dev point to pci controller device
 736                  * so we can get the LIODN programmed by
 737                  * u-boot.
 738                  */
 739                 dev = pci_ctl->parent;
 740         }
 741
 742         prop = of_get_property(dev->of_node, "fsl,liodn", &len);
 743         if (prop)
 744                 detach_device(dev, dma_domain);
 745         else
 746                 pr_debug("missing fsl,liodn property at %s\n",
 747                           dev->of_node->full_name);
 748 }
 749
 750 static  int configure_domain_geometry(struct iommu_domain *domain, void *data)
 751 {
 752         struct iommu_domain_geometry *geom_attr = data;
 753         struct fsl_dma_domain *dma_domain = domain->priv;
 754         dma_addr_t geom_size;
 755         unsigned long flags;
 756
 757         geom_size = geom_attr->aperture_end - geom_attr->aperture_start + 1;
 758         /*
 759          * Sanity check the geometry size. Also, we do not support
 760          * DMA outside of the geometry.
 761          */
 762         if (check_size(geom_size, geom_attr->aperture_start) ||
 763                 !geom_attr->force_aperture) {
 764                         pr_debug("Invalid PAMU geometry attributes\n");
 765                         return -EINVAL;
 766                 }
 767
 768         spin_lock_irqsave(&dma_domain->domain_lock, flags);
 769         if (dma_domain->enabled) {
 770                 pr_debug("Can't set geometry attributes as domain is active\n");
 771                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 772                 return  -EBUSY;
 773         }
 774
 775         /* Copy the domain geometry information */
 776         memcpy(&domain->geometry, geom_attr,
 777                sizeof(struct iommu_domain_geometry));
 778         dma_domain->geom_size = geom_size;
 779
 780         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 781
 782         return 0;
 783 }
 784
 785 /* Set the domain stash attribute */
 786 static int configure_domain_stash(struct fsl_dma_domain *dma_domain, void *data)
 787 {
 788         struct pamu_stash_attribute *stash_attr = data;
 789         unsigned long flags;
 790         int ret;
 791
 792         spin_lock_irqsave(&dma_domain->domain_lock, flags);
 793
 794         memcpy(&dma_domain->dma_stash, stash_attr,
 795                  sizeof(struct pamu_stash_attribute));
 796
 797         dma_domain->stash_id = get_stash_id(stash_attr->cache,
 798                                             stash_attr->cpu);
 799         if (dma_domain->stash_id == ~(u32)0) {
 800                 pr_debug("Invalid stash attributes\n");
 801                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 802                 return -EINVAL;
 803         }
 804
 805         ret = update_domain_stash(dma_domain, dma_domain->stash_id);
 806
 807         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 808
 809         return ret;
 810 }
 811
 812 /* Configure domain dma state i.e. enable/disable DMA*/
 813 static int configure_domain_dma_state(struct fsl_dma_domain *dma_domain, bool enable)
 814 {
 815         struct device_domain_info *info;
 816         unsigned long flags;
 817         int ret;
 818
 819         spin_lock_irqsave(&dma_domain->domain_lock, flags);
 820
 821         if (enable && !dma_domain->mapped) {
 822                 pr_debug("Can't enable DMA domain without valid mapping\n");
 823                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 824                 return -ENODEV;
 825         }
 826
 827         dma_domain->enabled = enable;
 828         list_for_each_entry(info, &dma_domain->devices,
 829                                  link) {
 830                 ret = (enable) ? pamu_enable_liodn(info->liodn) :
 831                         pamu_disable_liodn(info->liodn);
 832                 if (ret)
 833                         pr_debug("Unable to set dma state for liodn %d",
 834                                  info->liodn);
 835         }
 836         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
 837
 838         return 0;
 839 }
 840
 841 static int fsl_pamu_set_domain_attr(struct iommu_domain *domain,
 842                                  enum iommu_attr attr_type, void *data)
 843 {
 844         struct fsl_dma_domain *dma_domain = domain->priv;
 845         int ret = 0;
 846
 847
 848         switch (attr_type) {
 849         case DOMAIN_ATTR_GEOMETRY:
 850                 ret = configure_domain_geometry(domain, data);
 851                 break;
 852         case DOMAIN_ATTR_FSL_PAMU_STASH:
 853                 ret = configure_domain_stash(dma_domain, data);
 854                 break;
 855         case DOMAIN_ATTR_FSL_PAMU_ENABLE:
 856                 ret = configure_domain_dma_state(dma_domain, *(int *)data);
 857                 break;
 858         default:
 859                 pr_debug("Unsupported attribute type\n");
 860                 ret = -EINVAL;
 861                 break;
 862         };
 863
 864         return ret;
 865 }
 866
 867 static int fsl_pamu_get_domain_attr(struct iommu_domain *domain,
 868                                  enum iommu_attr attr_type, void *data)
 869 {
 870         struct fsl_dma_domain *dma_domain = domain->priv;
 871         int ret = 0;
 872
 873
 874         switch (attr_type) {
 875         case DOMAIN_ATTR_FSL_PAMU_STASH:
 876                 memcpy((struct pamu_stash_attribute *) data, &dma_domain->dma_stash,
 877                                  sizeof(struct pamu_stash_attribute));
 878                 break;
 879         case DOMAIN_ATTR_FSL_PAMU_ENABLE:
 880                 *(int *)data = dma_domain->enabled;
 881                 break;
 882         case DOMAIN_ATTR_FSL_PAMUV1:
 883                 *(int *)data = DOMAIN_ATTR_FSL_PAMUV1;
 884                 break;
 885         default:
 886                 pr_debug("Unsupported attribute type\n");
 887                 ret = -EINVAL;
 888                 break;
 889         };
 890
 891         return ret;
 892 }
 893
 894 static struct iommu_group *get_device_iommu_group(struct device *dev)
 895 {
 896         struct iommu_group *group;
 897
 898         group = iommu_group_get(dev);
 899         if (!group)
 900                 group = iommu_group_alloc();
 901
 902         return group;
 903 }
 904
 905 static  bool check_pci_ctl_endpt_part(struct pci_controller *pci_ctl)
 906 {
 907         u32 version;
 908
 909         /* Check the PCI controller version number by readding BRR1 register */
 910         version = in_be32(pci_ctl->cfg_addr + (PCI_FSL_BRR1 >> 2));
 911         version &= PCI_FSL_BRR1_VER;
 912         /* If PCI controller version is >= 0x204 we can partition endpoints*/
 913         if (version >= 0x204)
 914                 return 1;
 915
 916         return 0;
 917 }
 918
 919 /* Get iommu group information from peer devices or devices on the parent bus */
 920 static struct iommu_group *get_shared_pci_device_group(struct pci_dev *pdev)
 921 {
 922         struct pci_dev *tmp;
 923         struct iommu_group *group;
 924         struct pci_bus *bus = pdev->bus;
 925
 926         /*
 927          * Traverese the pci bus device list to get
 928          * the shared iommu group.
 929          */
 930         while (bus) {
 931                 list_for_each_entry(tmp, &bus->devices, bus_list) {
 932                         if (tmp == pdev)
 933                                 continue;
 934                         group = iommu_group_get(&tmp->dev);
 935                         if (group)
 936                                 return group;
 937                 }
 938
 939                 bus = bus->parent;
 940         }
 941
 942         return NULL;
 943 }
 944
 945 static struct iommu_group *get_pci_device_group(struct pci_dev *pdev)
 946 {
 947         struct pci_controller *pci_ctl;
 948         bool pci_endpt_partioning;
 949         struct iommu_group *group = NULL;
 950
 951         pci_ctl = pci_bus_to_host(pdev->bus);
 952         pci_endpt_partioning = check_pci_ctl_endpt_part(pci_ctl);
 953         /* We can partition PCIe devices so assign device group to the device */
 954         if (pci_endpt_partioning) {
 955                 group = iommu_group_get_for_dev(&pdev->dev);
 956
 957                 /*
 958                  * PCIe controller is not a paritionable entity
 959                  * free the controller device iommu_group.
 960                  */
 961                 if (pci_ctl->parent->iommu_group)
 962                         iommu_group_remove_device(pci_ctl->parent);
 963         } else {
 964                 /*
 965                  * All devices connected to the controller will share the
 966                  * PCI controllers device group. If this is the first
 967                  * device to be probed for the pci controller, copy the
 968                  * device group information from the PCI controller device
 969                  * node and remove the PCI controller iommu group.
 970                  * For subsequent devices, the iommu group information can
 971                  * be obtained from sibling devices (i.e. from the bus_devices
 972                  * link list).
 973                  */
 974                 if (pci_ctl->parent->iommu_group) {
 975                         group = get_device_iommu_group(pci_ctl->parent);
 976                         iommu_group_remove_device(pci_ctl->parent);
 977                 } else
 978                         group = get_shared_pci_device_group(pdev);
 979         }
 980
 981         return group;
 982 }
 983
 984 static int fsl_pamu_add_device(struct device *dev)
 985 {
 986         struct iommu_group *group = NULL;
 987         struct pci_dev *pdev;
 988         const u32 *prop;
 989         int ret, len;
 990
 991         /*
 992          * For platform devices we allocate a separate group for
 993          * each of the devices.
 994          */
 995         if (dev_is_pci(dev)) {
 996                 pdev = to_pci_dev(dev);
 997                 /* Don't create device groups for virtual PCI bridges */
 998                 if (pdev->subordinate)
 999                         return 0;
1000
1001                 group = get_pci_device_group(pdev);
1002
1003         } else {
1004                 prop = of_get_property(dev->of_node, "fsl,liodn", &len);
1005                 if (prop)
1006                         group = get_device_iommu_group(dev);
1007         }
1008
1009         if (!group || IS_ERR(group))
1010                 return PTR_ERR(group);
1011
1012         ret = iommu_group_add_device(group, dev);
1013
1014         iommu_group_put(group);
1015         return ret;
1016 }
1017
1018 static void fsl_pamu_remove_device(struct device *dev)
1019 {
1020         iommu_group_remove_device(dev);
1021 }
1022
1023 static int fsl_pamu_set_windows(struct iommu_domain *domain, u32 w_count)
1024 {
1025         struct fsl_dma_domain *dma_domain = domain->priv;
1026         unsigned long flags;
1027         int ret;
1028
1029         spin_lock_irqsave(&dma_domain->domain_lock, flags);
1030         /* Ensure domain is inactive i.e. DMA should be disabled for the domain */
1031         if (dma_domain->enabled) {
1032                 pr_debug("Can't set geometry attributes as domain is active\n");
1033                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1034                 return  -EBUSY;
1035         }
1036
1037         /* Ensure that the geometry has been set for the domain */
1038         if (!dma_domain->geom_size) {
1039                 pr_debug("Please configure geometry before setting the number of windows\n");
1040                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1041                 return -EINVAL;
1042         }
1043
1044         /*
1045          * Ensure we have valid window count i.e. it should be less than
1046          * maximum permissible limit and should be a power of two.
1047          */
1048         if (w_count > pamu_get_max_subwin_cnt() || !is_power_of_2(w_count)) {
1049                 pr_debug("Invalid window count\n");
1050                 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1051                 return -EINVAL;
1052         }
1053
1054         ret = pamu_set_domain_geometry(dma_domain, &domain->geometry,
1055                                 ((w_count > 1) ? w_count : 0));
1056         if (!ret) {
1057                 if (dma_domain->win_arr)
1058                         kfree(dma_domain->win_arr);
1059                 dma_domain->win_arr = kzalloc(sizeof(struct dma_window) *
1060                                                           w_count, GFP_ATOMIC);
1061                 if (!dma_domain->win_arr) {
1062                         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1063                         return -ENOMEM;
1064                 }
1065                 dma_domain->win_cnt = w_count;
1066         }
1067         spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1068
1069         return ret;
1070 }
1071
1072 static u32 fsl_pamu_get_windows(struct iommu_domain *domain)
1073 {
1074         struct fsl_dma_domain *dma_domain = domain->priv;
1075
1076         return dma_domain->win_cnt;
1077 }
1078
1079 static const struct iommu_ops fsl_pamu_ops = {
1080         .domain_init    = fsl_pamu_domain_init,
1081         .domain_destroy = fsl_pamu_domain_destroy,
1082         .attach_dev     = fsl_pamu_attach_device,
1083         .detach_dev     = fsl_pamu_detach_device,
1084         .domain_window_enable = fsl_pamu_window_enable,
1085         .domain_window_disable = fsl_pamu_window_disable,
1086         .domain_get_windows = fsl_pamu_get_windows,
1087         .domain_set_windows = fsl_pamu_set_windows,
1088         .iova_to_phys   = fsl_pamu_iova_to_phys,
1089         .domain_has_cap = fsl_pamu_domain_has_cap,
1090         .domain_set_attr = fsl_pamu_set_domain_attr,
1091         .domain_get_attr = fsl_pamu_get_domain_attr,
1092         .add_device     = fsl_pamu_add_device,
1093         .remove_device  = fsl_pamu_remove_device,
1094 };
1095
1096 int pamu_domain_init()
1097 {
1098         int ret = 0;
1099
1100         ret = iommu_init_mempool();
1101         if (ret)
1102                 return ret;
1103
1104         bus_set_iommu(&platform_bus_type, &fsl_pamu_ops);
1105         bus_set_iommu(&pci_bus_type, &fsl_pamu_ops);
1106
1107         return ret;
1108 }