2 * omap iommu: main structures
4 * Copyright (C) 2008-2009 Nokia Corporation
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #if defined(CONFIG_ARCH_OMAP1)
14 #error "iommu for this processor not implemented yet"
20 u32 pgsz, prsvd, valid;
24 u32 endian, elsz, mixed;
33 void __iomem *regbase;
36 struct iommu_domain *domain;
38 unsigned int refcount;
39 spinlock_t iommu_lock; /* global for this whole object */
42 * We don't change iopgd for a situation like pgd for a task,
43 * but share it globally for each iommu.
46 spinlock_t page_table_lock; /* protect iopgd */
50 struct list_head mmap;
51 struct mutex mmap_lock; /* protect mmap */
53 void *ctx; /* iommu context: registres saved area */
75 /* architecture specific functions */
76 struct iommu_functions {
77 unsigned long version;
79 int (*enable)(struct omap_iommu *obj);
80 void (*disable)(struct omap_iommu *obj);
81 void (*set_twl)(struct omap_iommu *obj, bool on);
82 u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra);
84 void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr);
85 void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr);
87 struct cr_regs *(*alloc_cr)(struct omap_iommu *obj,
88 struct iotlb_entry *e);
89 int (*cr_valid)(struct cr_regs *cr);
90 u32 (*cr_to_virt)(struct cr_regs *cr);
91 void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e);
92 ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr,
95 u32 (*get_pte_attr)(struct iotlb_entry *e);
97 void (*save_ctx)(struct omap_iommu *obj);
98 void (*restore_ctx)(struct omap_iommu *obj);
99 ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len);
102 #ifdef CONFIG_IOMMU_API
104 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device
105 * @dev: iommu client device
107 static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
109 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
111 return arch_data->iommu_dev;
116 * MMU Register offsets
118 #define MMU_REVISION 0x00
119 #define MMU_SYSCONFIG 0x10
120 #define MMU_SYSSTATUS 0x14
121 #define MMU_IRQSTATUS 0x18
122 #define MMU_IRQENABLE 0x1c
123 #define MMU_WALKING_ST 0x40
124 #define MMU_CNTL 0x44
125 #define MMU_FAULT_AD 0x48
127 #define MMU_LOCK 0x50
128 #define MMU_LD_TLB 0x54
131 #define MMU_GFLUSH 0x60
132 #define MMU_FLUSH_ENTRY 0x64
133 #define MMU_READ_CAM 0x68
134 #define MMU_READ_RAM 0x6c
135 #define MMU_EMU_FAULT_AD 0x70
137 #define MMU_REG_SIZE 256
140 * MMU Register bit definitions
142 #define MMU_CAM_VATAG_SHIFT 12
143 #define MMU_CAM_VATAG_MASK \
144 ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
145 #define MMU_CAM_P (1 << 3)
146 #define MMU_CAM_V (1 << 2)
147 #define MMU_CAM_PGSZ_MASK 3
148 #define MMU_CAM_PGSZ_1M (0 << 0)
149 #define MMU_CAM_PGSZ_64K (1 << 0)
150 #define MMU_CAM_PGSZ_4K (2 << 0)
151 #define MMU_CAM_PGSZ_16M (3 << 0)
153 #define MMU_RAM_PADDR_SHIFT 12
154 #define MMU_RAM_PADDR_MASK \
155 ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
157 #define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
158 #define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT)
160 #define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
161 #define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
162 #define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
163 #define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT)
164 #define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT)
165 #define MMU_RAM_MIXED_SHIFT 6
166 #define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT)
167 #define MMU_RAM_MIXED MMU_RAM_MIXED_MASK
170 * utilities for super page(16MB, 1MB, 64KB and 4KB)
173 #define iopgsz_max(bytes) \
174 (((bytes) >= SZ_16M) ? SZ_16M : \
175 ((bytes) >= SZ_1M) ? SZ_1M : \
176 ((bytes) >= SZ_64K) ? SZ_64K : \
177 ((bytes) >= SZ_4K) ? SZ_4K : 0)
179 #define bytes_to_iopgsz(bytes) \
180 (((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M : \
181 ((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \
182 ((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K : \
183 ((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1)
185 #define iopgsz_to_bytes(iopgsz) \
186 (((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M : \
187 ((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \
188 ((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K : \
189 ((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0)
191 #define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0)
196 extern u32 omap_iommu_arch_version(void);
198 extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);
201 omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);
203 extern void omap_iommu_save_ctx(struct device *dev);
204 extern void omap_iommu_restore_ctx(struct device *dev);
206 extern int omap_foreach_iommu_device(void *data,
207 int (*fn)(struct device *, void *));
209 extern int omap_install_iommu_arch(const struct iommu_functions *ops);
210 extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
213 omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
215 omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
220 static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
222 return __raw_readl(obj->regbase + offs);
225 static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
227 __raw_writel(val, obj->regbase + offs);