8 select MULTI_IRQ_HANDLER
16 select GENERIC_IRQ_CHIP
21 select MULTI_IRQ_HANDLER
25 default 4 if ARCH_S5PV210
26 default 3 if ARCH_S5PC100
30 The maximum number of VICs available in the system, for
36 select GENERIC_IRQ_CHIP
45 select GENERIC_IRQ_CHIP
48 config CLPS711X_IRQCHIP
50 depends on ARCH_CLPS711X
52 select MULTI_IRQ_HANDLER
59 select MULTI_IRQ_HANDLER
61 config RENESAS_INTC_IRQPIN
72 select GENERIC_IRQ_CHIP
74 config VERSATILE_FPGA_IRQ
78 config VERSATILE_FPGA_IRQ_NR
81 depends on VERSATILE_FPGA_IRQ
90 Support for a CROSSBAR ip that preceeds the main interrupt controller.
91 The primary irqchip invokes the crossbar's callback which inturn allocates
92 a free irq and configures the IP. Thus the peripheral interrupts are
93 routed to one of the free irqchip interrupt lines.