8 select MULTI_IRQ_HANDLER
16 select GENERIC_IRQ_CHIP
21 select MULTI_IRQ_HANDLER
25 default 4 if ARCH_S5PV210
26 default 3 if ARCH_S5PC100
30 The maximum number of VICs available in the system, for
39 select GENERIC_IRQ_CHIP
45 select MULTI_IRQ_HANDLER
47 config RENESAS_INTC_IRQPIN
58 select GENERIC_IRQ_CHIP
60 config VERSATILE_FPGA_IRQ
64 config VERSATILE_FPGA_IRQ_NR
67 depends on VERSATILE_FPGA_IRQ
76 Support for a CROSSBAR ip that preceeds the main interrupt controller.
77 The primary irqchip invokes the crossbar's callback which inturn allocates
78 a free irq and configures the IP. Thus the peripheral interrupts are
79 routed to one of the free irqchip interrupt lines.