2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * Combiner irqchip for EXYNOS
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/init.h>
15 #include <linux/irqdomain.h>
16 #include <linux/of_address.h>
17 #include <linux/of_irq.h>
18 #include <asm/mach/irq.h>
24 #define COMBINER_ENABLE_SET 0x0
25 #define COMBINER_ENABLE_CLEAR 0x4
26 #define COMBINER_INT_STATUS 0xC
28 static DEFINE_SPINLOCK(irq_controller_lock);
30 struct combiner_chip_data {
31 unsigned int irq_offset;
32 unsigned int irq_mask;
34 unsigned int parent_irq;
37 static struct irq_domain *combiner_irq_domain;
38 static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
40 static inline void __iomem *combiner_base(struct irq_data *data)
42 struct combiner_chip_data *combiner_data =
43 irq_data_get_irq_chip_data(data);
45 return combiner_data->base;
48 static void combiner_mask_irq(struct irq_data *data)
50 u32 mask = 1 << (data->hwirq % 32);
52 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
55 static void combiner_unmask_irq(struct irq_data *data)
57 u32 mask = 1 << (data->hwirq % 32);
59 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
62 static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
64 struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
65 struct irq_chip *chip = irq_get_chip(irq);
66 unsigned int cascade_irq, combiner_irq;
69 chained_irq_enter(chip, desc);
71 spin_lock(&irq_controller_lock);
72 status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
73 spin_unlock(&irq_controller_lock);
74 status &= chip_data->irq_mask;
79 combiner_irq = __ffs(status);
81 cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
82 if (unlikely(cascade_irq >= NR_IRQS))
83 do_bad_IRQ(cascade_irq, desc);
85 generic_handle_irq(cascade_irq);
88 chained_irq_exit(chip, desc);
92 static int combiner_set_affinity(struct irq_data *d,
93 const struct cpumask *mask_val, bool force)
95 struct combiner_chip_data *chip_data = irq_data_get_irq_chip_data(d);
96 struct irq_chip *chip = irq_get_chip(chip_data->parent_irq);
97 struct irq_data *data = irq_get_irq_data(chip_data->parent_irq);
99 if (chip && chip->irq_set_affinity)
100 return chip->irq_set_affinity(data, mask_val, force);
106 static struct irq_chip combiner_chip = {
108 .irq_mask = combiner_mask_irq,
109 .irq_unmask = combiner_unmask_irq,
111 .irq_set_affinity = combiner_set_affinity,
115 static unsigned int max_combiner_nr(void)
117 if (soc_is_exynos5250())
118 return EXYNOS5_MAX_COMBINER_NR;
119 else if (soc_is_exynos4412())
120 return EXYNOS4412_MAX_COMBINER_NR;
121 else if (soc_is_exynos4212())
122 return EXYNOS4212_MAX_COMBINER_NR;
124 return EXYNOS4210_MAX_COMBINER_NR;
127 static void __init combiner_cascade_irq(unsigned int combiner_nr,
130 if (combiner_nr >= max_combiner_nr())
132 if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
134 irq_set_chained_handler(irq, combiner_handle_cascade_irq);
137 static void __init combiner_init_one(unsigned int combiner_nr,
138 void __iomem *base, unsigned int irq)
140 combiner_data[combiner_nr].base = base;
141 combiner_data[combiner_nr].irq_offset = irq_find_mapping(
142 combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER);
143 combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
144 combiner_data[combiner_nr].parent_irq = irq;
146 /* Disable all interrupts */
147 __raw_writel(combiner_data[combiner_nr].irq_mask,
148 base + COMBINER_ENABLE_CLEAR);
152 static int combiner_irq_domain_xlate(struct irq_domain *d,
153 struct device_node *controller,
154 const u32 *intspec, unsigned int intsize,
155 unsigned long *out_hwirq,
156 unsigned int *out_type)
158 if (d->of_node != controller)
164 *out_hwirq = intspec[0] * MAX_IRQ_IN_COMBINER + intspec[1];
170 static int combiner_irq_domain_xlate(struct irq_domain *d,
171 struct device_node *controller,
172 const u32 *intspec, unsigned int intsize,
173 unsigned long *out_hwirq,
174 unsigned int *out_type)
180 static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq,
183 irq_set_chip_and_handler(irq, &combiner_chip, handle_level_irq);
184 irq_set_chip_data(irq, &combiner_data[hw >> 3]);
185 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
190 static struct irq_domain_ops combiner_irq_domain_ops = {
191 .xlate = combiner_irq_domain_xlate,
192 .map = combiner_irq_domain_map,
195 static unsigned int exynos4x12_combiner_extra_irq(int group)
211 void __init combiner_init(void __iomem *combiner_base,
212 struct device_node *np)
214 int i, irq, irq_base;
215 unsigned int max_nr, nr_irq;
217 max_nr = max_combiner_nr();
220 if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) {
221 pr_info("%s: number of combiners not specified, "
222 "setting default as %d.\n",
227 nr_irq = max_nr * MAX_IRQ_IN_COMBINER;
229 irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0);
230 if (IS_ERR_VALUE(irq_base)) {
231 irq_base = COMBINER_IRQ(0, 0);
232 pr_warning("%s: irq desc alloc failed. Continuing with %d as linux irq base\n", __func__, irq_base);
235 combiner_irq_domain = irq_domain_add_legacy(np, nr_irq, irq_base, 0,
236 &combiner_irq_domain_ops, &combiner_data);
237 if (WARN_ON(!combiner_irq_domain)) {
238 pr_warning("%s: irq domain init failed\n", __func__);
242 for (i = 0; i < max_nr; i++) {
243 if (i < EXYNOS4210_MAX_COMBINER_NR || soc_is_exynos5250())
246 irq = exynos4x12_combiner_extra_irq(i);
249 irq = irq_of_parse_and_map(np, i);
251 combiner_init_one(i, combiner_base + (i >> 2) * 0x10, irq);
252 combiner_cascade_irq(i, irq);
257 static int __init combiner_of_init(struct device_node *np,
258 struct device_node *parent)
260 void __iomem *combiner_base;
262 combiner_base = of_iomap(np, 0);
263 if (!combiner_base) {
264 pr_err("%s: failed to map combiner registers\n", __func__);
268 combiner_init(combiner_base, np);
272 IRQCHIP_DECLARE(exynos4210_combiner, "samsung,exynos4210-combiner",