2 * irq.h: in kernel interrupt controller related definitions
3 * Copyright (c) 2007, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
28 typedef void irq_request_func(void *opaque, int level);
30 struct kvm_kpic_state {
31 u8 last_irr; /* edge detection */
32 u8 irr; /* interrupt request register */
33 u8 imr; /* interrupt mask register */
34 u8 isr; /* interrupt service register */
35 u8 priority_add; /* highest irq priority */
42 u8 rotate_on_auto_eoi;
43 u8 special_fully_nested_mode;
44 u8 init4; /* true if 4 byte init */
45 u8 elcr; /* PIIX edge/trigger selection */
47 struct kvm_pic *pics_state;
51 struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */
52 irq_request_func *irq_request;
53 void *irq_request_opaque;
54 int output; /* intr from master PIC */
55 struct kvm_io_device dev;
58 struct kvm_pic *kvm_create_pic(struct kvm *kvm);
59 void kvm_pic_set_irq(void *opaque, int irq, int level);
60 int kvm_pic_read_irq(struct kvm_pic *s);
61 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
62 int kvm_cpu_has_interrupt(struct kvm_vcpu *v);
63 void kvm_pic_update_irq(struct kvm_pic *s);
65 #define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS
66 #define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */
67 #define IOAPIC_EDGE_TRIG 0
68 #define IOAPIC_LEVEL_TRIG 1
70 #define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
71 #define IOAPIC_MEM_LENGTH 0x100
73 /* Direct registers. */
74 #define IOAPIC_REG_SELECT 0x00
75 #define IOAPIC_REG_WINDOW 0x10
76 #define IOAPIC_REG_EOI 0x40 /* IA64 IOSAPIC only */
78 /* Indirect registers. */
79 #define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
80 #define IOAPIC_REG_VERSION 0x01
81 #define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */
83 /*ioapic delivery mode*/
84 #define IOAPIC_FIXED 0x0
85 #define IOAPIC_LOWEST_PRIORITY 0x1
86 #define IOAPIC_PMI 0x2
87 #define IOAPIC_NMI 0x4
88 #define IOAPIC_INIT 0x5
89 #define IOAPIC_EXTINT 0x7
97 union ioapic_redir_entry {
103 u8 delivery_status:1;
112 } redirtbl[IOAPIC_NUM_PINS];
113 struct kvm_io_device dev;
118 unsigned long base_address;
119 struct kvm_io_device dev;
122 s64 period; /* unit: ns */
127 struct kvm_vcpu *vcpu;
128 struct page *regs_page;
136 printk(KERN_EMERG "assertion failed %s: %d: %s\n", \
137 __FILE__, __LINE__, #x); \
142 #define ASSERT(x) do { } while (0)
145 void kvm_vcpu_kick(struct kvm_vcpu *vcpu);
146 int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
147 int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
148 int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
149 int kvm_create_lapic(struct kvm_vcpu *vcpu);
150 void kvm_lapic_reset(struct kvm_vcpu *vcpu);
151 void kvm_pic_reset(struct kvm_kpic_state *s);
152 void kvm_ioapic_reset(struct kvm_ioapic *ioapic);
153 void kvm_free_lapic(struct kvm_vcpu *vcpu);
154 u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
155 void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
156 void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
158 struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
159 unsigned long bitmap);
160 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
161 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
162 int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
163 void kvm_ioapic_update_eoi(struct kvm *kvm, int vector);
164 int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
165 int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig);
166 void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu);
167 int kvm_ioapic_init(struct kvm *kvm);
168 void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level);
169 int kvm_lapic_enabled(struct kvm_vcpu *vcpu);
170 int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
171 void kvm_apic_timer_intr_post(struct kvm_vcpu *vcpu, int vec);
172 void kvm_timer_intr_post(struct kvm_vcpu *vcpu, int vec);
173 void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu);
174 void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu);
175 void kvm_migrate_apic_timer(struct kvm_vcpu *vcpu);