2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
19 #include <linux/types.h>
20 #include <linux/string.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
34 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
36 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
41 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
42 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
46 #define pgprintk(x...) do { } while (0)
47 #define rmap_printk(x...) do { } while (0)
51 #if defined(MMU_DEBUG) || defined(AUDIT)
57 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
58 __FILE__, __LINE__, #x); \
61 #define PT64_PT_BITS 9
62 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
63 #define PT32_PT_BITS 10
64 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
66 #define PT_WRITABLE_SHIFT 1
68 #define PT_PRESENT_MASK (1ULL << 0)
69 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
70 #define PT_USER_MASK (1ULL << 2)
71 #define PT_PWT_MASK (1ULL << 3)
72 #define PT_PCD_MASK (1ULL << 4)
73 #define PT_ACCESSED_MASK (1ULL << 5)
74 #define PT_DIRTY_MASK (1ULL << 6)
75 #define PT_PAGE_SIZE_MASK (1ULL << 7)
76 #define PT_PAT_MASK (1ULL << 7)
77 #define PT_GLOBAL_MASK (1ULL << 8)
78 #define PT64_NX_MASK (1ULL << 63)
80 #define PT_PAT_SHIFT 7
81 #define PT_DIR_PAT_SHIFT 12
82 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
84 #define PT32_DIR_PSE36_SIZE 4
85 #define PT32_DIR_PSE36_SHIFT 13
86 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
89 #define PT32_PTE_COPY_MASK \
90 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
92 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
94 #define PT_FIRST_AVAIL_BITS_SHIFT 9
95 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
97 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
98 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
100 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
101 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
103 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
104 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
106 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
108 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
110 #define PT64_LEVEL_BITS 9
112 #define PT64_LEVEL_SHIFT(level) \
113 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
115 #define PT64_LEVEL_MASK(level) \
116 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
118 #define PT64_INDEX(address, level)\
119 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
122 #define PT32_LEVEL_BITS 10
124 #define PT32_LEVEL_SHIFT(level) \
125 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
127 #define PT32_LEVEL_MASK(level) \
128 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
130 #define PT32_INDEX(address, level)\
131 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
138 #define PT32_BASE_ADDR_MASK PAGE_MASK
139 #define PT32_DIR_BASE_ADDR_MASK \
140 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
157 struct kvm_rmap_desc {
158 u64 *shadow_ptes[RMAP_EXT];
159 struct kvm_rmap_desc *more;
162 static int is_write_protection(struct kvm_vcpu *vcpu)
164 return vcpu->cr0 & CR0_WP_MASK;
167 static int is_cpuid_PSE36(void)
172 static int is_nx(struct kvm_vcpu *vcpu)
174 return vcpu->shadow_efer & EFER_NX;
177 static int is_present_pte(unsigned long pte)
179 return pte & PT_PRESENT_MASK;
182 static int is_writeble_pte(unsigned long pte)
184 return pte & PT_WRITABLE_MASK;
187 static int is_io_pte(unsigned long pte)
189 return pte & PT_SHADOW_IO_MARK;
192 static int is_rmap_pte(u64 pte)
194 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
195 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
198 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
199 size_t objsize, int min)
203 if (cache->nobjs >= min)
205 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
206 obj = kzalloc(objsize, GFP_NOWAIT);
209 cache->objects[cache->nobjs++] = obj;
214 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
217 kfree(mc->objects[--mc->nobjs]);
220 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
224 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
225 sizeof(struct kvm_pte_chain), 4);
228 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
229 sizeof(struct kvm_rmap_desc), 1);
234 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
236 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
237 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
240 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
246 p = mc->objects[--mc->nobjs];
251 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
253 if (mc->nobjs < KVM_NR_MEM_OBJS)
254 mc->objects[mc->nobjs++] = obj;
259 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
261 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
262 sizeof(struct kvm_pte_chain));
265 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
266 struct kvm_pte_chain *pc)
268 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
271 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
273 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
274 sizeof(struct kvm_rmap_desc));
277 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
278 struct kvm_rmap_desc *rd)
280 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
284 * Reverse mapping data structures:
286 * If page->private bit zero is zero, then page->private points to the
287 * shadow page table entry that points to page_address(page).
289 * If page->private bit zero is one, (then page->private & ~1) points
290 * to a struct kvm_rmap_desc containing more mappings.
292 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
295 struct kvm_rmap_desc *desc;
298 if (!is_rmap_pte(*spte))
300 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
301 if (!page_private(page)) {
302 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
303 set_page_private(page,(unsigned long)spte);
304 } else if (!(page_private(page) & 1)) {
305 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
306 desc = mmu_alloc_rmap_desc(vcpu);
307 desc->shadow_ptes[0] = (u64 *)page_private(page);
308 desc->shadow_ptes[1] = spte;
309 set_page_private(page,(unsigned long)desc | 1);
311 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
312 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
313 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
315 if (desc->shadow_ptes[RMAP_EXT-1]) {
316 desc->more = mmu_alloc_rmap_desc(vcpu);
319 for (i = 0; desc->shadow_ptes[i]; ++i)
321 desc->shadow_ptes[i] = spte;
325 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
327 struct kvm_rmap_desc *desc,
329 struct kvm_rmap_desc *prev_desc)
333 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
335 desc->shadow_ptes[i] = desc->shadow_ptes[j];
336 desc->shadow_ptes[j] = NULL;
339 if (!prev_desc && !desc->more)
340 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
343 prev_desc->more = desc->more;
345 set_page_private(page,(unsigned long)desc->more | 1);
346 mmu_free_rmap_desc(vcpu, desc);
349 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
352 struct kvm_rmap_desc *desc;
353 struct kvm_rmap_desc *prev_desc;
356 if (!is_rmap_pte(*spte))
358 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
359 if (!page_private(page)) {
360 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
362 } else if (!(page_private(page) & 1)) {
363 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
364 if ((u64 *)page_private(page) != spte) {
365 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
369 set_page_private(page,0);
371 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
372 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
375 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
376 if (desc->shadow_ptes[i] == spte) {
377 rmap_desc_remove_entry(vcpu, page,
389 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
391 struct kvm *kvm = vcpu->kvm;
393 struct kvm_memory_slot *slot;
394 struct kvm_rmap_desc *desc;
397 slot = gfn_to_memslot(kvm, gfn);
399 page = gfn_to_page(slot, gfn);
401 while (page_private(page)) {
402 if (!(page_private(page) & 1))
403 spte = (u64 *)page_private(page);
405 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
406 spte = desc->shadow_ptes[0];
409 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
410 != page_to_pfn(page));
411 BUG_ON(!(*spte & PT_PRESENT_MASK));
412 BUG_ON(!(*spte & PT_WRITABLE_MASK));
413 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
414 rmap_remove(vcpu, spte);
415 kvm_arch_ops->tlb_flush(vcpu);
416 *spte &= ~(u64)PT_WRITABLE_MASK;
420 static int is_empty_shadow_page(hpa_t page_hpa)
425 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
428 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
435 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
437 struct kvm_mmu_page *page_head = page_header(page_hpa);
439 ASSERT(is_empty_shadow_page(page_hpa));
440 page_head->page_hpa = page_hpa;
441 list_move(&page_head->link, &vcpu->free_pages);
442 ++vcpu->kvm->n_free_mmu_pages;
445 static unsigned kvm_page_table_hashfn(gfn_t gfn)
450 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
453 struct kvm_mmu_page *page;
455 if (list_empty(&vcpu->free_pages))
458 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
459 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
460 ASSERT(is_empty_shadow_page(page->page_hpa));
461 page->slot_bitmap = 0;
462 page->multimapped = 0;
463 page->parent_pte = parent_pte;
464 --vcpu->kvm->n_free_mmu_pages;
468 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
469 struct kvm_mmu_page *page, u64 *parent_pte)
471 struct kvm_pte_chain *pte_chain;
472 struct hlist_node *node;
477 if (!page->multimapped) {
478 u64 *old = page->parent_pte;
481 page->parent_pte = parent_pte;
484 page->multimapped = 1;
485 pte_chain = mmu_alloc_pte_chain(vcpu);
486 INIT_HLIST_HEAD(&page->parent_ptes);
487 hlist_add_head(&pte_chain->link, &page->parent_ptes);
488 pte_chain->parent_ptes[0] = old;
490 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
491 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
493 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
494 if (!pte_chain->parent_ptes[i]) {
495 pte_chain->parent_ptes[i] = parent_pte;
499 pte_chain = mmu_alloc_pte_chain(vcpu);
501 hlist_add_head(&pte_chain->link, &page->parent_ptes);
502 pte_chain->parent_ptes[0] = parent_pte;
505 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
506 struct kvm_mmu_page *page,
509 struct kvm_pte_chain *pte_chain;
510 struct hlist_node *node;
513 if (!page->multimapped) {
514 BUG_ON(page->parent_pte != parent_pte);
515 page->parent_pte = NULL;
518 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
519 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
520 if (!pte_chain->parent_ptes[i])
522 if (pte_chain->parent_ptes[i] != parent_pte)
524 while (i + 1 < NR_PTE_CHAIN_ENTRIES
525 && pte_chain->parent_ptes[i + 1]) {
526 pte_chain->parent_ptes[i]
527 = pte_chain->parent_ptes[i + 1];
530 pte_chain->parent_ptes[i] = NULL;
532 hlist_del(&pte_chain->link);
533 mmu_free_pte_chain(vcpu, pte_chain);
534 if (hlist_empty(&page->parent_ptes)) {
535 page->multimapped = 0;
536 page->parent_pte = NULL;
544 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
548 struct hlist_head *bucket;
549 struct kvm_mmu_page *page;
550 struct hlist_node *node;
552 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
553 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
554 bucket = &vcpu->kvm->mmu_page_hash[index];
555 hlist_for_each_entry(page, node, bucket, hash_link)
556 if (page->gfn == gfn && !page->role.metaphysical) {
557 pgprintk("%s: found role %x\n",
558 __FUNCTION__, page->role.word);
564 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
569 unsigned hugepage_access,
572 union kvm_mmu_page_role role;
575 struct hlist_head *bucket;
576 struct kvm_mmu_page *page;
577 struct hlist_node *node;
580 role.glevels = vcpu->mmu.root_level;
582 role.metaphysical = metaphysical;
583 role.hugepage_access = hugepage_access;
584 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
585 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
586 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
587 role.quadrant = quadrant;
589 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
591 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
592 bucket = &vcpu->kvm->mmu_page_hash[index];
593 hlist_for_each_entry(page, node, bucket, hash_link)
594 if (page->gfn == gfn && page->role.word == role.word) {
595 mmu_page_add_parent_pte(vcpu, page, parent_pte);
596 pgprintk("%s: found\n", __FUNCTION__);
599 page = kvm_mmu_alloc_page(vcpu, parent_pte);
602 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
605 hlist_add_head(&page->hash_link, bucket);
607 rmap_write_protect(vcpu, gfn);
611 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
612 struct kvm_mmu_page *page)
618 pt = __va(page->page_hpa);
620 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
621 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
622 if (pt[i] & PT_PRESENT_MASK)
623 rmap_remove(vcpu, &pt[i]);
626 kvm_arch_ops->tlb_flush(vcpu);
630 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
634 if (!(ent & PT_PRESENT_MASK))
636 ent &= PT64_BASE_ADDR_MASK;
637 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
641 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
642 struct kvm_mmu_page *page,
645 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
648 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
649 struct kvm_mmu_page *page)
653 while (page->multimapped || page->parent_pte) {
654 if (!page->multimapped)
655 parent_pte = page->parent_pte;
657 struct kvm_pte_chain *chain;
659 chain = container_of(page->parent_ptes.first,
660 struct kvm_pte_chain, link);
661 parent_pte = chain->parent_ptes[0];
664 kvm_mmu_put_page(vcpu, page, parent_pte);
667 kvm_mmu_page_unlink_children(vcpu, page);
668 if (!page->root_count) {
669 hlist_del(&page->hash_link);
670 kvm_mmu_free_page(vcpu, page->page_hpa);
672 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
675 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
678 struct hlist_head *bucket;
679 struct kvm_mmu_page *page;
680 struct hlist_node *node, *n;
683 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
685 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
686 bucket = &vcpu->kvm->mmu_page_hash[index];
687 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
688 if (page->gfn == gfn && !page->role.metaphysical) {
689 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
691 kvm_mmu_zap_page(vcpu, page);
697 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
699 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
700 struct kvm_mmu_page *page_head = page_header(__pa(pte));
702 __set_bit(slot, &page_head->slot_bitmap);
705 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
707 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
709 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
712 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
714 struct kvm_memory_slot *slot;
717 ASSERT((gpa & HPA_ERR_MASK) == 0);
718 slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
720 return gpa | HPA_ERR_MASK;
721 page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
722 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
723 | (gpa & (PAGE_SIZE-1));
726 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
728 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
730 if (gpa == UNMAPPED_GVA)
732 return gpa_to_hpa(vcpu, gpa);
735 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
737 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
739 if (gpa == UNMAPPED_GVA)
741 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
744 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
748 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
750 int level = PT32E_ROOT_LEVEL;
751 hpa_t table_addr = vcpu->mmu.root_hpa;
754 u32 index = PT64_INDEX(v, level);
758 ASSERT(VALID_PAGE(table_addr));
759 table = __va(table_addr);
763 if (is_present_pte(pte) && is_writeble_pte(pte))
765 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
766 page_header_update_slot(vcpu->kvm, table, v);
767 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
769 rmap_add(vcpu, &table[index]);
773 if (table[index] == 0) {
774 struct kvm_mmu_page *new_table;
777 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
779 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
781 1, 0, &table[index]);
783 pgprintk("nonpaging_map: ENOMEM\n");
787 table[index] = new_table->page_hpa | PT_PRESENT_MASK
788 | PT_WRITABLE_MASK | PT_USER_MASK;
790 table_addr = table[index] & PT64_BASE_ADDR_MASK;
794 static void mmu_free_roots(struct kvm_vcpu *vcpu)
797 struct kvm_mmu_page *page;
800 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
801 hpa_t root = vcpu->mmu.root_hpa;
803 ASSERT(VALID_PAGE(root));
804 page = page_header(root);
806 vcpu->mmu.root_hpa = INVALID_PAGE;
810 for (i = 0; i < 4; ++i) {
811 hpa_t root = vcpu->mmu.pae_root[i];
813 ASSERT(VALID_PAGE(root));
814 root &= PT64_BASE_ADDR_MASK;
815 page = page_header(root);
817 vcpu->mmu.pae_root[i] = INVALID_PAGE;
819 vcpu->mmu.root_hpa = INVALID_PAGE;
822 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
826 struct kvm_mmu_page *page;
828 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
831 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
832 hpa_t root = vcpu->mmu.root_hpa;
834 ASSERT(!VALID_PAGE(root));
835 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
836 PT64_ROOT_LEVEL, 0, 0, NULL);
837 root = page->page_hpa;
839 vcpu->mmu.root_hpa = root;
843 for (i = 0; i < 4; ++i) {
844 hpa_t root = vcpu->mmu.pae_root[i];
846 ASSERT(!VALID_PAGE(root));
847 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
848 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
849 else if (vcpu->mmu.root_level == 0)
851 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
852 PT32_ROOT_LEVEL, !is_paging(vcpu),
854 root = page->page_hpa;
856 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
858 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
861 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
866 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
873 r = mmu_topup_memory_caches(vcpu);
878 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
881 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
883 if (is_error_hpa(paddr))
886 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
889 static void nonpaging_free(struct kvm_vcpu *vcpu)
891 mmu_free_roots(vcpu);
894 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
896 struct kvm_mmu *context = &vcpu->mmu;
898 context->new_cr3 = nonpaging_new_cr3;
899 context->page_fault = nonpaging_page_fault;
900 context->gva_to_gpa = nonpaging_gva_to_gpa;
901 context->free = nonpaging_free;
902 context->root_level = 0;
903 context->shadow_root_level = PT32E_ROOT_LEVEL;
904 mmu_alloc_roots(vcpu);
905 ASSERT(VALID_PAGE(context->root_hpa));
906 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
910 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
912 ++kvm_stat.tlb_flush;
913 kvm_arch_ops->tlb_flush(vcpu);
916 static void paging_new_cr3(struct kvm_vcpu *vcpu)
918 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
919 mmu_free_roots(vcpu);
920 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
921 kvm_mmu_free_some_pages(vcpu);
922 mmu_alloc_roots(vcpu);
923 kvm_mmu_flush_tlb(vcpu);
924 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
927 static inline void set_pte_common(struct kvm_vcpu *vcpu,
936 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
938 access_bits &= ~PT_WRITABLE_MASK;
940 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
942 *shadow_pte |= access_bits;
944 if (is_error_hpa(paddr)) {
945 *shadow_pte |= gaddr;
946 *shadow_pte |= PT_SHADOW_IO_MARK;
947 *shadow_pte &= ~PT_PRESENT_MASK;
951 *shadow_pte |= paddr;
953 if (access_bits & PT_WRITABLE_MASK) {
954 struct kvm_mmu_page *shadow;
956 shadow = kvm_mmu_lookup_page(vcpu, gfn);
958 pgprintk("%s: found shadow page for %lx, marking ro\n",
960 access_bits &= ~PT_WRITABLE_MASK;
961 if (is_writeble_pte(*shadow_pte)) {
962 *shadow_pte &= ~PT_WRITABLE_MASK;
963 kvm_arch_ops->tlb_flush(vcpu);
968 if (access_bits & PT_WRITABLE_MASK)
969 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
971 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
972 rmap_add(vcpu, shadow_pte);
975 static void inject_page_fault(struct kvm_vcpu *vcpu,
979 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
982 static inline int fix_read_pf(u64 *shadow_ent)
984 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
985 !(*shadow_ent & PT_USER_MASK)) {
987 * If supervisor write protect is disabled, we shadow kernel
988 * pages as user pages so we can trap the write access.
990 *shadow_ent |= PT_USER_MASK;
991 *shadow_ent &= ~PT_WRITABLE_MASK;
999 static void paging_free(struct kvm_vcpu *vcpu)
1001 nonpaging_free(vcpu);
1005 #include "paging_tmpl.h"
1009 #include "paging_tmpl.h"
1012 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1014 struct kvm_mmu *context = &vcpu->mmu;
1016 ASSERT(is_pae(vcpu));
1017 context->new_cr3 = paging_new_cr3;
1018 context->page_fault = paging64_page_fault;
1019 context->gva_to_gpa = paging64_gva_to_gpa;
1020 context->free = paging_free;
1021 context->root_level = level;
1022 context->shadow_root_level = level;
1023 mmu_alloc_roots(vcpu);
1024 ASSERT(VALID_PAGE(context->root_hpa));
1025 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1026 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1030 static int paging64_init_context(struct kvm_vcpu *vcpu)
1032 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1035 static int paging32_init_context(struct kvm_vcpu *vcpu)
1037 struct kvm_mmu *context = &vcpu->mmu;
1039 context->new_cr3 = paging_new_cr3;
1040 context->page_fault = paging32_page_fault;
1041 context->gva_to_gpa = paging32_gva_to_gpa;
1042 context->free = paging_free;
1043 context->root_level = PT32_ROOT_LEVEL;
1044 context->shadow_root_level = PT32E_ROOT_LEVEL;
1045 mmu_alloc_roots(vcpu);
1046 ASSERT(VALID_PAGE(context->root_hpa));
1047 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1048 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1052 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1054 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1057 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1060 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1062 if (!is_paging(vcpu))
1063 return nonpaging_init_context(vcpu);
1064 else if (is_long_mode(vcpu))
1065 return paging64_init_context(vcpu);
1066 else if (is_pae(vcpu))
1067 return paging32E_init_context(vcpu);
1069 return paging32_init_context(vcpu);
1072 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1075 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1076 vcpu->mmu.free(vcpu);
1077 vcpu->mmu.root_hpa = INVALID_PAGE;
1081 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1085 destroy_kvm_mmu(vcpu);
1086 r = init_kvm_mmu(vcpu);
1089 r = mmu_topup_memory_caches(vcpu);
1094 static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu,
1095 struct kvm_mmu_page *page,
1099 struct kvm_mmu_page *child;
1102 if (is_present_pte(pte)) {
1103 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1104 rmap_remove(vcpu, spte);
1106 child = page_header(pte & PT64_BASE_ADDR_MASK);
1107 mmu_page_remove_parent_pte(vcpu, child, spte);
1113 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1115 gfn_t gfn = gpa >> PAGE_SHIFT;
1116 struct kvm_mmu_page *page;
1117 struct hlist_node *node, *n;
1118 struct hlist_head *bucket;
1121 unsigned offset = offset_in_page(gpa);
1123 unsigned page_offset;
1124 unsigned misaligned;
1129 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1130 if (gfn == vcpu->last_pt_write_gfn) {
1131 ++vcpu->last_pt_write_count;
1132 if (vcpu->last_pt_write_count >= 3)
1135 vcpu->last_pt_write_gfn = gfn;
1136 vcpu->last_pt_write_count = 1;
1138 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1139 bucket = &vcpu->kvm->mmu_page_hash[index];
1140 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1141 if (page->gfn != gfn || page->role.metaphysical)
1143 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1144 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1145 if (misaligned || flooded) {
1147 * Misaligned accesses are too much trouble to fix
1148 * up; also, they usually indicate a page is not used
1151 * If we're seeing too many writes to a page,
1152 * it may no longer be a page table, or we may be
1153 * forking, in which case it is better to unmap the
1156 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1157 gpa, bytes, page->role.word);
1158 kvm_mmu_zap_page(vcpu, page);
1161 page_offset = offset;
1162 level = page->role.level;
1164 if (page->role.glevels == PT32_ROOT_LEVEL) {
1165 page_offset <<= 1; /* 32->64 */
1167 * A 32-bit pde maps 4MB while the shadow pdes map
1168 * only 2MB. So we need to double the offset again
1169 * and zap two pdes instead of one.
1171 if (level == PT32_ROOT_LEVEL) {
1172 page_offset &= ~7; /* kill rounding error */
1176 page_offset &= ~PAGE_MASK;
1178 spte = __va(page->page_hpa);
1179 spte += page_offset / sizeof(*spte);
1181 mmu_pre_write_zap_pte(vcpu, page, spte);
1187 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1191 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1193 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1195 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1198 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1200 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1201 struct kvm_mmu_page *page;
1203 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1204 struct kvm_mmu_page, link);
1205 kvm_mmu_zap_page(vcpu, page);
1208 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1210 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1212 struct kvm_mmu_page *page;
1214 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1215 page = container_of(vcpu->kvm->active_mmu_pages.next,
1216 struct kvm_mmu_page, link);
1217 kvm_mmu_zap_page(vcpu, page);
1219 while (!list_empty(&vcpu->free_pages)) {
1220 page = list_entry(vcpu->free_pages.next,
1221 struct kvm_mmu_page, link);
1222 list_del(&page->link);
1223 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1224 page->page_hpa = INVALID_PAGE;
1226 free_page((unsigned long)vcpu->mmu.pae_root);
1229 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1236 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1237 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1239 INIT_LIST_HEAD(&page_header->link);
1240 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1242 set_page_private(page, (unsigned long)page_header);
1243 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1244 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1245 list_add(&page_header->link, &vcpu->free_pages);
1246 ++vcpu->kvm->n_free_mmu_pages;
1250 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1251 * Therefore we need to allocate shadow page tables in the first
1252 * 4GB of memory, which happens to fit the DMA32 zone.
1254 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1257 vcpu->mmu.pae_root = page_address(page);
1258 for (i = 0; i < 4; ++i)
1259 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1264 free_mmu_pages(vcpu);
1268 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1271 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1272 ASSERT(list_empty(&vcpu->free_pages));
1274 return alloc_mmu_pages(vcpu);
1277 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1280 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1281 ASSERT(!list_empty(&vcpu->free_pages));
1283 return init_kvm_mmu(vcpu);
1286 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1290 destroy_kvm_mmu(vcpu);
1291 free_mmu_pages(vcpu);
1292 mmu_free_memory_caches(vcpu);
1295 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1297 struct kvm *kvm = vcpu->kvm;
1298 struct kvm_mmu_page *page;
1300 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1304 if (!test_bit(slot, &page->slot_bitmap))
1307 pt = __va(page->page_hpa);
1308 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1310 if (pt[i] & PT_WRITABLE_MASK) {
1311 rmap_remove(vcpu, &pt[i]);
1312 pt[i] &= ~PT_WRITABLE_MASK;
1317 void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
1319 destroy_kvm_mmu(vcpu);
1321 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1322 struct kvm_mmu_page *page;
1324 page = container_of(vcpu->kvm->active_mmu_pages.next,
1325 struct kvm_mmu_page, link);
1326 kvm_mmu_zap_page(vcpu, page);
1329 mmu_free_memory_caches(vcpu);
1330 kvm_arch_ops->tlb_flush(vcpu);
1336 static const char *audit_msg;
1338 static gva_t canonicalize(gva_t gva)
1340 #ifdef CONFIG_X86_64
1341 gva = (long long)(gva << 16) >> 16;
1346 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1347 gva_t va, int level)
1349 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1351 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1353 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1356 if (!ent & PT_PRESENT_MASK)
1359 va = canonicalize(va);
1361 audit_mappings_page(vcpu, ent, va, level - 1);
1363 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1364 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1366 if ((ent & PT_PRESENT_MASK)
1367 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1368 printk(KERN_ERR "audit error: (%s) levels %d"
1369 " gva %lx gpa %llx hpa %llx ent %llx\n",
1370 audit_msg, vcpu->mmu.root_level,
1376 static void audit_mappings(struct kvm_vcpu *vcpu)
1380 if (vcpu->mmu.root_level == 4)
1381 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1383 for (i = 0; i < 4; ++i)
1384 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1385 audit_mappings_page(vcpu,
1386 vcpu->mmu.pae_root[i],
1391 static int count_rmaps(struct kvm_vcpu *vcpu)
1396 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1397 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1398 struct kvm_rmap_desc *d;
1400 for (j = 0; j < m->npages; ++j) {
1401 struct page *page = m->phys_mem[j];
1405 if (!(page->private & 1)) {
1409 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1411 for (k = 0; k < RMAP_EXT; ++k)
1412 if (d->shadow_ptes[k])
1423 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1426 struct kvm_mmu_page *page;
1429 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1430 u64 *pt = __va(page->page_hpa);
1432 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1435 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1438 if (!(ent & PT_PRESENT_MASK))
1440 if (!(ent & PT_WRITABLE_MASK))
1448 static void audit_rmap(struct kvm_vcpu *vcpu)
1450 int n_rmap = count_rmaps(vcpu);
1451 int n_actual = count_writable_mappings(vcpu);
1453 if (n_rmap != n_actual)
1454 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1455 __FUNCTION__, audit_msg, n_rmap, n_actual);
1458 static void audit_write_protection(struct kvm_vcpu *vcpu)
1460 struct kvm_mmu_page *page;
1462 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1466 if (page->role.metaphysical)
1469 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1471 pg = pfn_to_page(hfn);
1473 printk(KERN_ERR "%s: (%s) shadow page has writable"
1474 " mappings: gfn %lx role %x\n",
1475 __FUNCTION__, audit_msg, page->gfn,
1480 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1487 audit_write_protection(vcpu);
1488 audit_mappings(vcpu);