2 * Kernel-based Virtual Machine driver for Linux
6 * Copyright (C) 2006 Qumranet, Inc.
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
18 #include "x86_emulate.h"
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/vmalloc.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
25 #include <linux/sched.h>
29 MODULE_AUTHOR("Qumranet");
30 MODULE_LICENSE("GPL");
32 #define IOPM_ALLOC_ORDER 2
33 #define MSRPM_ALLOC_ORDER 1
39 #define DR7_GD_MASK (1 << 13)
40 #define DR6_BD_MASK (1 << 13)
42 #define SEG_TYPE_LDT 2
43 #define SEG_TYPE_BUSY_TSS16 3
45 #define KVM_EFER_LMA (1 << 10)
46 #define KVM_EFER_LME (1 << 8)
48 #define SVM_FEATURE_NPT (1 << 0)
49 #define SVM_FEATURE_LBRV (1 << 1)
50 #define SVM_DEATURE_SVML (1 << 2)
52 static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
54 return (struct vcpu_svm*)vcpu->_priv;
57 unsigned long iopm_base;
58 unsigned long msrpm_base;
60 struct kvm_ldttss_desc {
63 unsigned base1 : 8, type : 5, dpl : 2, p : 1;
64 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
67 } __attribute__((packed));
75 struct kvm_ldttss_desc *tss_desc;
77 struct page *save_area;
80 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
81 static uint32_t svm_features;
83 struct svm_init_data {
88 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
90 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
91 #define MSRS_RANGE_SIZE 2048
92 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
94 #define MAX_INST_SIZE 15
96 static inline u32 svm_has(u32 feat)
98 return svm_features & feat;
101 static unsigned get_addr_size(struct kvm_vcpu *vcpu)
103 struct vmcb_save_area *sa = &to_svm(vcpu)->vmcb->save;
106 if (!(sa->cr0 & X86_CR0_PE) || (sa->rflags & X86_EFLAGS_VM))
109 cs_attrib = sa->cs.attrib;
111 return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
112 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
115 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
117 int word_index = __ffs(vcpu->irq_summary);
118 int bit_index = __ffs(vcpu->irq_pending[word_index]);
119 int irq = word_index * BITS_PER_LONG + bit_index;
121 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
122 if (!vcpu->irq_pending[word_index])
123 clear_bit(word_index, &vcpu->irq_summary);
127 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
129 set_bit(irq, vcpu->irq_pending);
130 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
133 static inline void clgi(void)
135 asm volatile (SVM_CLGI);
138 static inline void stgi(void)
140 asm volatile (SVM_STGI);
143 static inline void invlpga(unsigned long addr, u32 asid)
145 asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
148 static inline unsigned long kvm_read_cr2(void)
152 asm volatile ("mov %%cr2, %0" : "=r" (cr2));
156 static inline void kvm_write_cr2(unsigned long val)
158 asm volatile ("mov %0, %%cr2" :: "r" (val));
161 static inline unsigned long read_dr6(void)
165 asm volatile ("mov %%dr6, %0" : "=r" (dr6));
169 static inline void write_dr6(unsigned long val)
171 asm volatile ("mov %0, %%dr6" :: "r" (val));
174 static inline unsigned long read_dr7(void)
178 asm volatile ("mov %%dr7, %0" : "=r" (dr7));
182 static inline void write_dr7(unsigned long val)
184 asm volatile ("mov %0, %%dr7" :: "r" (val));
187 static inline void force_new_asid(struct kvm_vcpu *vcpu)
189 to_svm(vcpu)->asid_generation--;
192 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
194 force_new_asid(vcpu);
197 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
199 if (!(efer & KVM_EFER_LMA))
200 efer &= ~KVM_EFER_LME;
202 to_svm(vcpu)->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
203 vcpu->shadow_efer = efer;
206 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
208 struct vcpu_svm *svm = to_svm(vcpu);
210 svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
211 SVM_EVTINJ_VALID_ERR |
212 SVM_EVTINJ_TYPE_EXEPT |
214 svm->vmcb->control.event_inj_err = error_code;
217 static void inject_ud(struct kvm_vcpu *vcpu)
219 to_svm(vcpu)->vmcb->control.event_inj = SVM_EVTINJ_VALID |
220 SVM_EVTINJ_TYPE_EXEPT |
224 static int is_page_fault(uint32_t info)
226 info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
227 return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
230 static int is_external_interrupt(u32 info)
232 info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
233 return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
236 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
238 struct vcpu_svm *svm = to_svm(vcpu);
240 if (!svm->next_rip) {
241 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
244 if (svm->next_rip - svm->vmcb->save.rip > 15) {
245 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
251 vcpu->rip = svm->vmcb->save.rip = svm->next_rip;
252 svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
254 vcpu->interrupt_window_open = 1;
257 static int has_svm(void)
259 uint32_t eax, ebx, ecx, edx;
261 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
262 printk(KERN_INFO "has_svm: not amd\n");
266 cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
267 if (eax < SVM_CPUID_FUNC) {
268 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
272 cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
273 if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
274 printk(KERN_DEBUG "has_svm: svm not available\n");
280 static void svm_hardware_disable(void *garbage)
282 struct svm_cpu_data *svm_data
283 = per_cpu(svm_data, raw_smp_processor_id());
288 wrmsrl(MSR_VM_HSAVE_PA, 0);
289 rdmsrl(MSR_EFER, efer);
290 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
291 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
292 __free_page(svm_data->save_area);
297 static void svm_hardware_enable(void *garbage)
300 struct svm_cpu_data *svm_data;
303 struct desc_ptr gdt_descr;
305 struct Xgt_desc_struct gdt_descr;
307 struct desc_struct *gdt;
308 int me = raw_smp_processor_id();
311 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
314 svm_data = per_cpu(svm_data, me);
317 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
322 svm_data->asid_generation = 1;
323 svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
324 svm_data->next_asid = svm_data->max_asid + 1;
325 svm_features = cpuid_edx(SVM_CPUID_FUNC);
327 asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
328 gdt = (struct desc_struct *)gdt_descr.address;
329 svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
331 rdmsrl(MSR_EFER, efer);
332 wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
334 wrmsrl(MSR_VM_HSAVE_PA,
335 page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
338 static int svm_cpu_init(int cpu)
340 struct svm_cpu_data *svm_data;
343 svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
347 svm_data->save_area = alloc_page(GFP_KERNEL);
349 if (!svm_data->save_area)
352 per_cpu(svm_data, cpu) = svm_data;
362 static int set_msr_interception(u32 *msrpm, unsigned msr,
367 for (i = 0; i < NUM_MSR_MAPS; i++) {
368 if (msr >= msrpm_ranges[i] &&
369 msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
370 u32 msr_offset = (i * MSRS_IN_RANGE + msr -
371 msrpm_ranges[i]) * 2;
373 u32 *base = msrpm + (msr_offset / 32);
374 u32 msr_shift = msr_offset % 32;
375 u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
376 *base = (*base & ~(0x3 << msr_shift)) |
381 printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
385 static __init int svm_hardware_setup(void)
388 struct page *iopm_pages;
389 struct page *msrpm_pages;
390 void *iopm_va, *msrpm_va;
393 kvm_emulator_want_group7_invlpg();
395 iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
400 iopm_va = page_address(iopm_pages);
401 memset(iopm_va, 0xff, PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
402 clear_bit(0x80, iopm_va); /* allow direct access to PC debug port */
403 iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
406 msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
412 msrpm_va = page_address(msrpm_pages);
413 memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
414 msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
417 set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
418 set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
419 set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
420 set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
421 set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
422 set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
424 set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
425 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
426 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
427 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
429 for_each_online_cpu(cpu) {
430 r = svm_cpu_init(cpu);
437 __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
440 __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
445 static __exit void svm_hardware_unsetup(void)
447 __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
448 __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
449 iopm_base = msrpm_base = 0;
452 static void init_seg(struct vmcb_seg *seg)
455 seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
456 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
461 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
464 seg->attrib = SVM_SELECTOR_P_MASK | type;
469 static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
474 static void init_vmcb(struct vmcb *vmcb)
476 struct vmcb_control_area *control = &vmcb->control;
477 struct vmcb_save_area *save = &vmcb->save;
479 control->intercept_cr_read = INTERCEPT_CR0_MASK |
483 control->intercept_cr_write = INTERCEPT_CR0_MASK |
487 control->intercept_dr_read = INTERCEPT_DR0_MASK |
492 control->intercept_dr_write = INTERCEPT_DR0_MASK |
499 control->intercept_exceptions = 1 << PF_VECTOR;
502 control->intercept = (1ULL << INTERCEPT_INTR) |
503 (1ULL << INTERCEPT_NMI) |
504 (1ULL << INTERCEPT_SMI) |
506 * selective cr0 intercept bug?
507 * 0: 0f 22 d8 mov %eax,%cr3
508 * 3: 0f 20 c0 mov %cr0,%eax
509 * 6: 0d 00 00 00 80 or $0x80000000,%eax
510 * b: 0f 22 c0 mov %eax,%cr0
511 * set cr3 ->interception
512 * get cr0 ->interception
513 * set cr0 -> no interception
515 /* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
516 (1ULL << INTERCEPT_CPUID) |
517 (1ULL << INTERCEPT_HLT) |
518 (1ULL << INTERCEPT_INVLPGA) |
519 (1ULL << INTERCEPT_IOIO_PROT) |
520 (1ULL << INTERCEPT_MSR_PROT) |
521 (1ULL << INTERCEPT_TASK_SWITCH) |
522 (1ULL << INTERCEPT_SHUTDOWN) |
523 (1ULL << INTERCEPT_VMRUN) |
524 (1ULL << INTERCEPT_VMMCALL) |
525 (1ULL << INTERCEPT_VMLOAD) |
526 (1ULL << INTERCEPT_VMSAVE) |
527 (1ULL << INTERCEPT_STGI) |
528 (1ULL << INTERCEPT_CLGI) |
529 (1ULL << INTERCEPT_SKINIT) |
530 (1ULL << INTERCEPT_MONITOR) |
531 (1ULL << INTERCEPT_MWAIT);
533 control->iopm_base_pa = iopm_base;
534 control->msrpm_base_pa = msrpm_base;
535 control->tsc_offset = 0;
536 control->int_ctl = V_INTR_MASKING_MASK;
544 save->cs.selector = 0xf000;
545 /* Executable/Readable Code Segment */
546 save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
547 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
548 save->cs.limit = 0xffff;
550 * cs.base should really be 0xffff0000, but vmx can't handle that, so
551 * be consistent with it.
553 * Replace when we have real mode working for vmx.
555 save->cs.base = 0xf0000;
557 save->gdtr.limit = 0xffff;
558 save->idtr.limit = 0xffff;
560 init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
561 init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
563 save->efer = MSR_EFER_SVME_MASK;
565 save->dr6 = 0xffff0ff0;
568 save->rip = 0x0000fff0;
571 * cr0 val on cpu init should be 0x60000010, we enable cpu
572 * cache by default. the orderly way is to enable cache in bios.
574 save->cr0 = 0x00000010 | X86_CR0_PG | X86_CR0_WP;
575 save->cr4 = X86_CR4_PAE;
579 static int svm_create_vcpu(struct kvm_vcpu *vcpu)
581 struct vcpu_svm *svm;
586 svm = kzalloc(sizeof *svm, GFP_KERNEL);
589 page = alloc_page(GFP_KERNEL);
593 svm->vmcb = page_address(page);
594 clear_page(svm->vmcb);
595 svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
596 svm->asid_generation = 0;
597 memset(svm->db_regs, 0, sizeof(svm->db_regs));
598 init_vmcb(svm->vmcb);
604 vcpu->fpu_active = 1;
605 vcpu->apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
606 if (vcpu->vcpu_id == 0)
607 vcpu->apic_base |= MSR_IA32_APICBASE_BSP;
617 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
619 struct vcpu_svm *svm = to_svm(vcpu);
624 __free_page(pfn_to_page(svm->vmcb_pa >> PAGE_SHIFT));
629 static void svm_vcpu_load(struct kvm_vcpu *vcpu)
631 struct vcpu_svm *svm = to_svm(vcpu);
635 if (unlikely(cpu != vcpu->cpu)) {
639 * Make sure that the guest sees a monotonically
643 delta = vcpu->host_tsc - tsc_this;
644 svm->vmcb->control.tsc_offset += delta;
648 for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
649 rdmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
652 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
654 struct vcpu_svm *svm = to_svm(vcpu);
657 for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
658 wrmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
660 rdtscll(vcpu->host_tsc);
664 static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
668 static void svm_cache_regs(struct kvm_vcpu *vcpu)
670 struct vcpu_svm *svm = to_svm(vcpu);
672 vcpu->regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
673 vcpu->regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
674 vcpu->rip = svm->vmcb->save.rip;
677 static void svm_decache_regs(struct kvm_vcpu *vcpu)
679 struct vcpu_svm *svm = to_svm(vcpu);
680 svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
681 svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
682 svm->vmcb->save.rip = vcpu->rip;
685 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
687 return to_svm(vcpu)->vmcb->save.rflags;
690 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
692 to_svm(vcpu)->vmcb->save.rflags = rflags;
695 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
697 struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
700 case VCPU_SREG_CS: return &save->cs;
701 case VCPU_SREG_DS: return &save->ds;
702 case VCPU_SREG_ES: return &save->es;
703 case VCPU_SREG_FS: return &save->fs;
704 case VCPU_SREG_GS: return &save->gs;
705 case VCPU_SREG_SS: return &save->ss;
706 case VCPU_SREG_TR: return &save->tr;
707 case VCPU_SREG_LDTR: return &save->ldtr;
713 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
715 struct vmcb_seg *s = svm_seg(vcpu, seg);
720 static void svm_get_segment(struct kvm_vcpu *vcpu,
721 struct kvm_segment *var, int seg)
723 struct vmcb_seg *s = svm_seg(vcpu, seg);
726 var->limit = s->limit;
727 var->selector = s->selector;
728 var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
729 var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
730 var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
731 var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
732 var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
733 var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
734 var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
735 var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
736 var->unusable = !var->present;
739 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
741 struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
743 *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
744 *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
747 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
749 struct vcpu_svm *svm = to_svm(vcpu);
751 dt->limit = svm->vmcb->save.idtr.limit;
752 dt->base = svm->vmcb->save.idtr.base;
755 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
757 struct vcpu_svm *svm = to_svm(vcpu);
759 svm->vmcb->save.idtr.limit = dt->limit;
760 svm->vmcb->save.idtr.base = dt->base ;
763 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
765 struct vcpu_svm *svm = to_svm(vcpu);
767 dt->limit = svm->vmcb->save.gdtr.limit;
768 dt->base = svm->vmcb->save.gdtr.base;
771 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
773 struct vcpu_svm *svm = to_svm(vcpu);
775 svm->vmcb->save.gdtr.limit = dt->limit;
776 svm->vmcb->save.gdtr.base = dt->base ;
779 static void svm_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
783 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
785 struct vcpu_svm *svm = to_svm(vcpu);
788 if (vcpu->shadow_efer & KVM_EFER_LME) {
789 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
790 vcpu->shadow_efer |= KVM_EFER_LMA;
791 svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
794 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG) ) {
795 vcpu->shadow_efer &= ~KVM_EFER_LMA;
796 svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
800 if ((vcpu->cr0 & X86_CR0_TS) && !(cr0 & X86_CR0_TS)) {
801 svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
802 vcpu->fpu_active = 1;
806 cr0 |= X86_CR0_PG | X86_CR0_WP;
807 cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
808 svm->vmcb->save.cr0 = cr0;
811 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
814 to_svm(vcpu)->vmcb->save.cr4 = cr4 | X86_CR4_PAE;
817 static void svm_set_segment(struct kvm_vcpu *vcpu,
818 struct kvm_segment *var, int seg)
820 struct vcpu_svm *svm = to_svm(vcpu);
821 struct vmcb_seg *s = svm_seg(vcpu, seg);
824 s->limit = var->limit;
825 s->selector = var->selector;
829 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
830 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
831 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
832 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
833 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
834 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
835 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
836 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
838 if (seg == VCPU_SREG_CS)
840 = (svm->vmcb->save.cs.attrib
841 >> SVM_SELECTOR_DPL_SHIFT) & 3;
847 svm(vcpu)->vmcb->control.int_ctl &= ~V_TPR_MASK;
848 svm(vcpu)->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
852 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
857 static void load_host_msrs(struct kvm_vcpu *vcpu)
860 wrmsrl(MSR_GS_BASE, to_svm(vcpu)->host_gs_base);
864 static void save_host_msrs(struct kvm_vcpu *vcpu)
867 rdmsrl(MSR_GS_BASE, to_svm(vcpu)->host_gs_base);
871 static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
873 struct vcpu_svm *svm = to_svm(vcpu);
875 if (svm_data->next_asid > svm_data->max_asid) {
876 ++svm_data->asid_generation;
877 svm_data->next_asid = 1;
878 svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
881 vcpu->cpu = svm_data->cpu;
882 svm->asid_generation = svm_data->asid_generation;
883 svm->vmcb->control.asid = svm_data->next_asid++;
886 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
888 invlpga(address, to_svm(vcpu)->vmcb->control.asid); // is needed?
891 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
893 return to_svm(vcpu)->db_regs[dr];
896 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
899 struct vcpu_svm *svm = to_svm(vcpu);
903 if (svm->vmcb->save.dr7 & DR7_GD_MASK) {
904 svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
905 svm->vmcb->save.dr6 |= DR6_BD_MASK;
906 *exception = DB_VECTOR;
912 svm->db_regs[dr] = value;
915 if (vcpu->cr4 & X86_CR4_DE) {
916 *exception = UD_VECTOR;
920 if (value & ~((1ULL << 32) - 1)) {
921 *exception = GP_VECTOR;
924 svm->vmcb->save.dr7 = value;
928 printk(KERN_DEBUG "%s: unexpected dr %u\n",
930 *exception = UD_VECTOR;
935 static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
937 struct vcpu_svm *svm = to_svm(vcpu);
938 u32 exit_int_info = svm->vmcb->control.exit_int_info;
941 enum emulation_result er;
944 if (is_external_interrupt(exit_int_info))
945 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
947 spin_lock(&vcpu->kvm->lock);
949 fault_address = svm->vmcb->control.exit_info_2;
950 error_code = svm->vmcb->control.exit_info_1;
951 r = kvm_mmu_page_fault(vcpu, fault_address, error_code);
953 spin_unlock(&vcpu->kvm->lock);
957 spin_unlock(&vcpu->kvm->lock);
960 er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
961 spin_unlock(&vcpu->kvm->lock);
966 case EMULATE_DO_MMIO:
967 ++vcpu->stat.mmio_exits;
970 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
976 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
980 static int nm_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
982 struct vcpu_svm *svm = to_svm(vcpu);
984 svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
985 if (!(vcpu->cr0 & X86_CR0_TS))
986 svm->vmcb->save.cr0 &= ~X86_CR0_TS;
987 vcpu->fpu_active = 1;
992 static int shutdown_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
994 struct vcpu_svm *svm = to_svm(vcpu);
996 * VMCB is undefined after a SHUTDOWN intercept
997 * so reinitialize it.
999 clear_page(svm->vmcb);
1000 init_vmcb(svm->vmcb);
1002 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1006 static int io_get_override(struct kvm_vcpu *vcpu,
1007 struct vmcb_seg **seg,
1010 struct vcpu_svm *svm = to_svm(vcpu);
1011 u8 inst[MAX_INST_SIZE];
1012 unsigned ins_length;
1016 rip = svm->vmcb->save.rip;
1017 ins_length = svm->next_rip - rip;
1018 rip += svm->vmcb->save.cs.base;
1020 if (ins_length > MAX_INST_SIZE)
1022 "%s: inst length err, cs base 0x%llx rip 0x%llx "
1023 "next rip 0x%llx ins_length %u\n",
1025 svm->vmcb->save.cs.base,
1026 svm->vmcb->save.rip,
1027 svm->vmcb->control.exit_info_2,
1030 if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
1036 for (i = 0; i < ins_length; i++)
1047 *seg = &svm->vmcb->save.cs;
1050 *seg = &svm->vmcb->save.ss;
1053 *seg = &svm->vmcb->save.ds;
1056 *seg = &svm->vmcb->save.es;
1059 *seg = &svm->vmcb->save.fs;
1062 *seg = &svm->vmcb->save.gs;
1067 printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
1071 static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, gva_t *address)
1073 unsigned long addr_mask;
1075 struct vmcb_seg *seg;
1077 struct vcpu_svm *svm = to_svm(vcpu);
1078 struct vmcb_save_area *save_area = &svm->vmcb->save;
1079 u16 cs_attrib = save_area->cs.attrib;
1080 unsigned addr_size = get_addr_size(vcpu);
1082 if (!io_get_override(vcpu, &seg, &addr_override))
1086 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
1089 reg = &vcpu->regs[VCPU_REGS_RDI];
1090 seg = &svm->vmcb->save.es;
1092 reg = &vcpu->regs[VCPU_REGS_RSI];
1093 seg = (seg) ? seg : &svm->vmcb->save.ds;
1096 addr_mask = ~0ULL >> (64 - (addr_size * 8));
1098 if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
1099 !(svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
1100 *address = (*reg & addr_mask);
1104 if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
1105 svm_inject_gp(vcpu, 0);
1109 *address = (*reg & addr_mask) + seg->base;
1113 static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1115 struct vcpu_svm *svm = to_svm(vcpu);
1116 u32 io_info = svm->vmcb->control.exit_info_1; //address size bug?
1117 int size, down, in, string, rep;
1119 unsigned long count;
1122 ++vcpu->stat.io_exits;
1124 svm->next_rip = svm->vmcb->control.exit_info_2;
1126 in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
1127 port = io_info >> 16;
1128 size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
1129 string = (io_info & SVM_IOIO_STR_MASK) != 0;
1130 rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1132 down = (svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
1137 addr_mask = io_adress(vcpu, in, &address);
1139 printk(KERN_DEBUG "%s: get io address failed\n",
1145 count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1147 return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1148 address, rep, port);
1151 static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1156 static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1158 struct vcpu_svm *svm = to_svm(vcpu);
1160 svm->next_rip = svm->vmcb->save.rip + 1;
1161 skip_emulated_instruction(vcpu);
1162 return kvm_emulate_halt(vcpu);
1165 static int vmmcall_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1167 struct vcpu_svm *svm = to_svm(vcpu);
1169 svm->next_rip = svm->vmcb->save.rip + 3;
1170 skip_emulated_instruction(vcpu);
1171 return kvm_hypercall(vcpu, kvm_run);
1174 static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1180 static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1182 printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1183 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1187 static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1189 struct vcpu_svm *svm = to_svm(vcpu);
1191 svm->next_rip = svm->vmcb->save.rip + 2;
1192 kvm_emulate_cpuid(vcpu);
1196 static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1198 if (emulate_instruction(vcpu, NULL, 0, 0) != EMULATE_DONE)
1199 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1203 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1205 struct vcpu_svm *svm = to_svm(vcpu);
1208 case MSR_IA32_TIME_STAMP_COUNTER: {
1212 *data = svm->vmcb->control.tsc_offset + tsc;
1216 *data = svm->vmcb->save.star;
1218 #ifdef CONFIG_X86_64
1220 *data = svm->vmcb->save.lstar;
1223 *data = svm->vmcb->save.cstar;
1225 case MSR_KERNEL_GS_BASE:
1226 *data = svm->vmcb->save.kernel_gs_base;
1228 case MSR_SYSCALL_MASK:
1229 *data = svm->vmcb->save.sfmask;
1232 case MSR_IA32_SYSENTER_CS:
1233 *data = svm->vmcb->save.sysenter_cs;
1235 case MSR_IA32_SYSENTER_EIP:
1236 *data = svm->vmcb->save.sysenter_eip;
1238 case MSR_IA32_SYSENTER_ESP:
1239 *data = svm->vmcb->save.sysenter_esp;
1242 return kvm_get_msr_common(vcpu, ecx, data);
1247 static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1249 struct vcpu_svm *svm = to_svm(vcpu);
1250 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1253 if (svm_get_msr(vcpu, ecx, &data))
1254 svm_inject_gp(vcpu, 0);
1256 svm->vmcb->save.rax = data & 0xffffffff;
1257 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1258 svm->next_rip = svm->vmcb->save.rip + 2;
1259 skip_emulated_instruction(vcpu);
1264 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1266 struct vcpu_svm *svm = to_svm(vcpu);
1269 case MSR_IA32_TIME_STAMP_COUNTER: {
1273 svm->vmcb->control.tsc_offset = data - tsc;
1277 svm->vmcb->save.star = data;
1279 #ifdef CONFIG_X86_64
1281 svm->vmcb->save.lstar = data;
1284 svm->vmcb->save.cstar = data;
1286 case MSR_KERNEL_GS_BASE:
1287 svm->vmcb->save.kernel_gs_base = data;
1289 case MSR_SYSCALL_MASK:
1290 svm->vmcb->save.sfmask = data;
1293 case MSR_IA32_SYSENTER_CS:
1294 svm->vmcb->save.sysenter_cs = data;
1296 case MSR_IA32_SYSENTER_EIP:
1297 svm->vmcb->save.sysenter_eip = data;
1299 case MSR_IA32_SYSENTER_ESP:
1300 svm->vmcb->save.sysenter_esp = data;
1303 return kvm_set_msr_common(vcpu, ecx, data);
1308 static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1310 struct vcpu_svm *svm = to_svm(vcpu);
1311 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1312 u64 data = (svm->vmcb->save.rax & -1u)
1313 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1314 svm->next_rip = svm->vmcb->save.rip + 2;
1315 if (svm_set_msr(vcpu, ecx, data))
1316 svm_inject_gp(vcpu, 0);
1318 skip_emulated_instruction(vcpu);
1322 static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1324 if (to_svm(vcpu)->vmcb->control.exit_info_1)
1325 return wrmsr_interception(vcpu, kvm_run);
1327 return rdmsr_interception(vcpu, kvm_run);
1330 static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1331 struct kvm_run *kvm_run)
1334 * If the user space waits to inject interrupts, exit as soon as
1337 if (kvm_run->request_interrupt_window &&
1338 !vcpu->irq_summary) {
1339 ++vcpu->stat.irq_window_exits;
1340 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1347 static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1348 struct kvm_run *kvm_run) = {
1349 [SVM_EXIT_READ_CR0] = emulate_on_interception,
1350 [SVM_EXIT_READ_CR3] = emulate_on_interception,
1351 [SVM_EXIT_READ_CR4] = emulate_on_interception,
1353 [SVM_EXIT_WRITE_CR0] = emulate_on_interception,
1354 [SVM_EXIT_WRITE_CR3] = emulate_on_interception,
1355 [SVM_EXIT_WRITE_CR4] = emulate_on_interception,
1356 [SVM_EXIT_READ_DR0] = emulate_on_interception,
1357 [SVM_EXIT_READ_DR1] = emulate_on_interception,
1358 [SVM_EXIT_READ_DR2] = emulate_on_interception,
1359 [SVM_EXIT_READ_DR3] = emulate_on_interception,
1360 [SVM_EXIT_WRITE_DR0] = emulate_on_interception,
1361 [SVM_EXIT_WRITE_DR1] = emulate_on_interception,
1362 [SVM_EXIT_WRITE_DR2] = emulate_on_interception,
1363 [SVM_EXIT_WRITE_DR3] = emulate_on_interception,
1364 [SVM_EXIT_WRITE_DR5] = emulate_on_interception,
1365 [SVM_EXIT_WRITE_DR7] = emulate_on_interception,
1366 [SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception,
1367 [SVM_EXIT_EXCP_BASE + NM_VECTOR] = nm_interception,
1368 [SVM_EXIT_INTR] = nop_on_interception,
1369 [SVM_EXIT_NMI] = nop_on_interception,
1370 [SVM_EXIT_SMI] = nop_on_interception,
1371 [SVM_EXIT_INIT] = nop_on_interception,
1372 [SVM_EXIT_VINTR] = interrupt_window_interception,
1373 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1374 [SVM_EXIT_CPUID] = cpuid_interception,
1375 [SVM_EXIT_HLT] = halt_interception,
1376 [SVM_EXIT_INVLPG] = emulate_on_interception,
1377 [SVM_EXIT_INVLPGA] = invalid_op_interception,
1378 [SVM_EXIT_IOIO] = io_interception,
1379 [SVM_EXIT_MSR] = msr_interception,
1380 [SVM_EXIT_TASK_SWITCH] = task_switch_interception,
1381 [SVM_EXIT_SHUTDOWN] = shutdown_interception,
1382 [SVM_EXIT_VMRUN] = invalid_op_interception,
1383 [SVM_EXIT_VMMCALL] = vmmcall_interception,
1384 [SVM_EXIT_VMLOAD] = invalid_op_interception,
1385 [SVM_EXIT_VMSAVE] = invalid_op_interception,
1386 [SVM_EXIT_STGI] = invalid_op_interception,
1387 [SVM_EXIT_CLGI] = invalid_op_interception,
1388 [SVM_EXIT_SKINIT] = invalid_op_interception,
1389 [SVM_EXIT_MONITOR] = invalid_op_interception,
1390 [SVM_EXIT_MWAIT] = invalid_op_interception,
1394 static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1396 struct vcpu_svm *svm = to_svm(vcpu);
1397 u32 exit_code = svm->vmcb->control.exit_code;
1399 if (is_external_interrupt(svm->vmcb->control.exit_int_info) &&
1400 exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1401 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1403 __FUNCTION__, svm->vmcb->control.exit_int_info,
1406 if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
1407 || svm_exit_handlers[exit_code] == 0) {
1408 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1409 kvm_run->hw.hardware_exit_reason = exit_code;
1413 return svm_exit_handlers[exit_code](vcpu, kvm_run);
1416 static void reload_tss(struct kvm_vcpu *vcpu)
1418 int cpu = raw_smp_processor_id();
1420 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1421 svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1425 static void pre_svm_run(struct kvm_vcpu *vcpu)
1427 struct vcpu_svm *svm = to_svm(vcpu);
1428 int cpu = raw_smp_processor_id();
1430 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1432 svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1433 if (vcpu->cpu != cpu ||
1434 svm->asid_generation != svm_data->asid_generation)
1435 new_asid(vcpu, svm_data);
1439 static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1441 struct vmcb_control_area *control;
1443 control = &to_svm(vcpu)->vmcb->control;
1444 control->int_vector = pop_irq(vcpu);
1445 control->int_ctl &= ~V_INTR_PRIO_MASK;
1446 control->int_ctl |= V_IRQ_MASK |
1447 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1450 static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1452 struct vmcb_control_area *control = &to_svm(vcpu)->vmcb->control;
1454 if (control->int_ctl & V_IRQ_MASK) {
1455 control->int_ctl &= ~V_IRQ_MASK;
1456 push_irq(vcpu, control->int_vector);
1459 vcpu->interrupt_window_open =
1460 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1463 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1464 struct kvm_run *kvm_run)
1466 struct vcpu_svm *svm = to_svm(vcpu);
1467 struct vmcb_control_area *control = &svm->vmcb->control;
1469 vcpu->interrupt_window_open =
1470 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1471 (svm->vmcb->save.rflags & X86_EFLAGS_IF));
1473 if (vcpu->interrupt_window_open && vcpu->irq_summary)
1475 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1477 kvm_do_inject_irq(vcpu);
1480 * Interrupts blocked. Wait for unblock.
1482 if (!vcpu->interrupt_window_open &&
1483 (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1484 control->intercept |= 1ULL << INTERCEPT_VINTR;
1486 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1489 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1490 struct kvm_run *kvm_run)
1492 struct vcpu_svm *svm = to_svm(vcpu);
1494 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1495 vcpu->irq_summary == 0);
1496 kvm_run->if_flag = (svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1497 kvm_run->cr8 = vcpu->cr8;
1498 kvm_run->apic_base = vcpu->apic_base;
1502 * Check if userspace requested an interrupt window, and that the
1503 * interrupt window is open.
1505 * No need to exit to userspace if we already have an interrupt queued.
1507 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1508 struct kvm_run *kvm_run)
1510 return (!vcpu->irq_summary &&
1511 kvm_run->request_interrupt_window &&
1512 vcpu->interrupt_window_open &&
1513 (to_svm(vcpu)->vmcb->save.rflags & X86_EFLAGS_IF));
1516 static void save_db_regs(unsigned long *db_regs)
1518 asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1519 asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1520 asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1521 asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1524 static void load_db_regs(unsigned long *db_regs)
1526 asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1527 asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1528 asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1529 asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1532 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1534 force_new_asid(vcpu);
1537 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1539 struct vcpu_svm *svm = to_svm(vcpu);
1546 r = kvm_mmu_reload(vcpu);
1550 if (!vcpu->mmio_read_completed)
1551 do_interrupt_requests(vcpu, kvm_run);
1555 vcpu->guest_mode = 1;
1557 if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
1558 svm_flush_tlb(vcpu);
1562 save_host_msrs(vcpu);
1563 fs_selector = read_fs();
1564 gs_selector = read_gs();
1565 ldt_selector = read_ldt();
1566 svm->host_cr2 = kvm_read_cr2();
1567 svm->host_dr6 = read_dr6();
1568 svm->host_dr7 = read_dr7();
1569 svm->vmcb->save.cr2 = vcpu->cr2;
1571 if (svm->vmcb->save.dr7 & 0xff) {
1573 save_db_regs(svm->host_db_regs);
1574 load_db_regs(svm->db_regs);
1577 if (vcpu->fpu_active) {
1578 fx_save(vcpu->host_fx_image);
1579 fx_restore(vcpu->guest_fx_image);
1583 #ifdef CONFIG_X86_64
1584 "push %%rbx; push %%rcx; push %%rdx;"
1585 "push %%rsi; push %%rdi; push %%rbp;"
1586 "push %%r8; push %%r9; push %%r10; push %%r11;"
1587 "push %%r12; push %%r13; push %%r14; push %%r15;"
1589 "push %%ebx; push %%ecx; push %%edx;"
1590 "push %%esi; push %%edi; push %%ebp;"
1593 #ifdef CONFIG_X86_64
1594 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1595 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1596 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1597 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1598 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1599 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1600 "mov %c[r8](%[vcpu]), %%r8 \n\t"
1601 "mov %c[r9](%[vcpu]), %%r9 \n\t"
1602 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1603 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1604 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1605 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1606 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1607 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1609 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1610 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1611 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1612 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1613 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1614 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1617 #ifdef CONFIG_X86_64
1618 /* Enter guest mode */
1620 "mov %c[svm](%[vcpu]), %%rax \n\t"
1621 "mov %c[vmcb](%%rax), %%rax \n\t"
1627 /* Enter guest mode */
1629 "mov %c[svm](%[vcpu]), %%eax \n\t"
1630 "mov %c[vmcb](%%eax), %%eax \n\t"
1637 /* Save guest registers, load host registers */
1638 #ifdef CONFIG_X86_64
1639 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1640 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1641 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1642 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1643 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1644 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1645 "mov %%r8, %c[r8](%[vcpu]) \n\t"
1646 "mov %%r9, %c[r9](%[vcpu]) \n\t"
1647 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1648 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1649 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1650 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1651 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1652 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1654 "pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1655 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1656 "pop %%rbp; pop %%rdi; pop %%rsi;"
1657 "pop %%rdx; pop %%rcx; pop %%rbx; \n\t"
1659 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1660 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1661 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1662 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1663 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1664 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1666 "pop %%ebp; pop %%edi; pop %%esi;"
1667 "pop %%edx; pop %%ecx; pop %%ebx; \n\t"
1671 [svm]"i"(offsetof(struct kvm_vcpu, _priv)),
1672 [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1673 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1674 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1675 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1676 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1677 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1678 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
1679 #ifdef CONFIG_X86_64
1680 ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1681 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1682 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1683 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1684 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1685 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1686 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1687 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1691 vcpu->guest_mode = 0;
1693 if (vcpu->fpu_active) {
1694 fx_save(vcpu->guest_fx_image);
1695 fx_restore(vcpu->host_fx_image);
1698 if ((svm->vmcb->save.dr7 & 0xff))
1699 load_db_regs(svm->host_db_regs);
1701 vcpu->cr2 = svm->vmcb->save.cr2;
1703 write_dr6(svm->host_dr6);
1704 write_dr7(svm->host_dr7);
1705 kvm_write_cr2(svm->host_cr2);
1707 load_fs(fs_selector);
1708 load_gs(gs_selector);
1709 load_ldt(ldt_selector);
1710 load_host_msrs(vcpu);
1715 * Profile KVM exit RIPs:
1717 if (unlikely(prof_on == KVM_PROFILING))
1718 profile_hit(KVM_PROFILING,
1719 (void *)(unsigned long)svm->vmcb->save.rip);
1723 kvm_reput_irq(vcpu);
1727 if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1728 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1729 kvm_run->fail_entry.hardware_entry_failure_reason
1730 = svm->vmcb->control.exit_code;
1731 post_kvm_run_save(vcpu, kvm_run);
1735 r = handle_exit(vcpu, kvm_run);
1737 if (signal_pending(current)) {
1738 ++vcpu->stat.signal_exits;
1739 post_kvm_run_save(vcpu, kvm_run);
1740 kvm_run->exit_reason = KVM_EXIT_INTR;
1744 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1745 ++vcpu->stat.request_irq_exits;
1746 post_kvm_run_save(vcpu, kvm_run);
1747 kvm_run->exit_reason = KVM_EXIT_INTR;
1753 post_kvm_run_save(vcpu, kvm_run);
1757 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1759 struct vcpu_svm *svm = to_svm(vcpu);
1761 svm->vmcb->save.cr3 = root;
1762 force_new_asid(vcpu);
1764 if (vcpu->fpu_active) {
1765 svm->vmcb->control.intercept_exceptions |= (1 << NM_VECTOR);
1766 svm->vmcb->save.cr0 |= X86_CR0_TS;
1767 vcpu->fpu_active = 0;
1771 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1775 struct vcpu_svm *svm = to_svm(vcpu);
1776 uint32_t exit_int_info = svm->vmcb->control.exit_int_info;
1778 ++vcpu->stat.pf_guest;
1780 if (is_page_fault(exit_int_info)) {
1782 svm->vmcb->control.event_inj_err = 0;
1783 svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1784 SVM_EVTINJ_VALID_ERR |
1785 SVM_EVTINJ_TYPE_EXEPT |
1790 svm->vmcb->save.cr2 = addr;
1791 svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1792 SVM_EVTINJ_VALID_ERR |
1793 SVM_EVTINJ_TYPE_EXEPT |
1795 svm->vmcb->control.event_inj_err = err_code;
1799 static int is_disabled(void)
1803 rdmsrl(MSR_VM_CR, vm_cr);
1804 if (vm_cr & (1 << SVM_VM_CR_SVM_DISABLE))
1811 svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1814 * Patch in the VMMCALL instruction:
1816 hypercall[0] = 0x0f;
1817 hypercall[1] = 0x01;
1818 hypercall[2] = 0xd9;
1819 hypercall[3] = 0xc3;
1822 static struct kvm_arch_ops svm_arch_ops = {
1823 .cpu_has_kvm_support = has_svm,
1824 .disabled_by_bios = is_disabled,
1825 .hardware_setup = svm_hardware_setup,
1826 .hardware_unsetup = svm_hardware_unsetup,
1827 .hardware_enable = svm_hardware_enable,
1828 .hardware_disable = svm_hardware_disable,
1830 .vcpu_create = svm_create_vcpu,
1831 .vcpu_free = svm_free_vcpu,
1833 .vcpu_load = svm_vcpu_load,
1834 .vcpu_put = svm_vcpu_put,
1835 .vcpu_decache = svm_vcpu_decache,
1837 .set_guest_debug = svm_guest_debug,
1838 .get_msr = svm_get_msr,
1839 .set_msr = svm_set_msr,
1840 .get_segment_base = svm_get_segment_base,
1841 .get_segment = svm_get_segment,
1842 .set_segment = svm_set_segment,
1843 .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1844 .decache_cr4_guest_bits = svm_decache_cr4_guest_bits,
1845 .set_cr0 = svm_set_cr0,
1846 .set_cr3 = svm_set_cr3,
1847 .set_cr4 = svm_set_cr4,
1848 .set_efer = svm_set_efer,
1849 .get_idt = svm_get_idt,
1850 .set_idt = svm_set_idt,
1851 .get_gdt = svm_get_gdt,
1852 .set_gdt = svm_set_gdt,
1853 .get_dr = svm_get_dr,
1854 .set_dr = svm_set_dr,
1855 .cache_regs = svm_cache_regs,
1856 .decache_regs = svm_decache_regs,
1857 .get_rflags = svm_get_rflags,
1858 .set_rflags = svm_set_rflags,
1860 .invlpg = svm_invlpg,
1861 .tlb_flush = svm_flush_tlb,
1862 .inject_page_fault = svm_inject_page_fault,
1864 .inject_gp = svm_inject_gp,
1866 .run = svm_vcpu_run,
1867 .skip_emulated_instruction = skip_emulated_instruction,
1868 .vcpu_setup = svm_vcpu_setup,
1869 .patch_hypercall = svm_patch_hypercall,
1872 static int __init svm_init(void)
1874 return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
1877 static void __exit svm_exit(void)
1882 module_init(svm_init)
1883 module_exit(svm_exit)