drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "x86_emulate.h"
  20 #include "irq.h"
  21 #include "vmx.h"
  22 #include "segment_descriptor.h"
  23
  24 #include <linux/module.h>
  25 #include <linux/kernel.h>
  26 #include <linux/mm.h>
  27 #include <linux/highmem.h>
  28 #include <linux/sched.h>
  29
  30 #include <asm/io.h>
  31 #include <asm/desc.h>
  32
  33 MODULE_AUTHOR("Qumranet");
  34 MODULE_LICENSE("GPL");
  35
  36 struct vmcs {
  37         u32 revision_id;
  38         u32 abort;
  39         char data[0];
  40 };
  41
  42 struct vcpu_vmx {
  43         struct kvm_vcpu       vcpu;
  44         int                   launched;
  45         u8                    fail;
  46         struct kvm_msr_entry *guest_msrs;
  47         struct kvm_msr_entry *host_msrs;
  48         int                   nmsrs;
  49         int                   save_nmsrs;
  50         int                   msr_offset_efer;
  51 #ifdef CONFIG_X86_64
  52         int                   msr_offset_kernel_gs_base;
  53 #endif
  54         struct vmcs          *vmcs;
  55         struct {
  56                 int           loaded;
  57                 u16           fs_sel, gs_sel, ldt_sel;
  58                 int           gs_ldt_reload_needed;
  59                 int           fs_reload_needed;
  60         }host_state;
  61
  62 };
  63
  64 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
  65 {
  66         return container_of(vcpu, struct vcpu_vmx, vcpu);
  67 }
  68
  69 static int init_rmode_tss(struct kvm *kvm);
  70
  71 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  72 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  73
  74 static struct page *vmx_io_bitmap_a;
  75 static struct page *vmx_io_bitmap_b;
  76
  77 #define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
  78
  79 static struct vmcs_config {
  80         int size;
  81         int order;
  82         u32 revision_id;
  83         u32 pin_based_exec_ctrl;
  84         u32 cpu_based_exec_ctrl;
  85         u32 vmexit_ctrl;
  86         u32 vmentry_ctrl;
  87 } vmcs_config;
  88
  89 #define VMX_SEGMENT_FIELD(seg)                                  \
  90         [VCPU_SREG_##seg] = {                                   \
  91                 .selector = GUEST_##seg##_SELECTOR,             \
  92                 .base = GUEST_##seg##_BASE,                     \
  93                 .limit = GUEST_##seg##_LIMIT,                   \
  94                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  95         }
  96
  97 static struct kvm_vmx_segment_field {
  98         unsigned selector;
  99         unsigned base;
 100         unsigned limit;
 101         unsigned ar_bytes;
 102 } kvm_vmx_segment_fields[] = {
 103         VMX_SEGMENT_FIELD(CS),
 104         VMX_SEGMENT_FIELD(DS),
 105         VMX_SEGMENT_FIELD(ES),
 106         VMX_SEGMENT_FIELD(FS),
 107         VMX_SEGMENT_FIELD(GS),
 108         VMX_SEGMENT_FIELD(SS),
 109         VMX_SEGMENT_FIELD(TR),
 110         VMX_SEGMENT_FIELD(LDTR),
 111 };
 112
 113 /*
 114  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
 115  * away by decrementing the array size.
 116  */
 117 static const u32 vmx_msr_index[] = {
 118 #ifdef CONFIG_X86_64
 119         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
 120 #endif
 121         MSR_EFER, MSR_K6_STAR,
 122 };
 123 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
 124
 125 static void load_msrs(struct kvm_msr_entry *e, int n)
 126 {
 127         int i;
 128
 129         for (i = 0; i < n; ++i)
 130                 wrmsrl(e[i].index, e[i].data);
 131 }
 132
 133 static void save_msrs(struct kvm_msr_entry *e, int n)
 134 {
 135         int i;
 136
 137         for (i = 0; i < n; ++i)
 138                 rdmsrl(e[i].index, e[i].data);
 139 }
 140
 141 static inline u64 msr_efer_save_restore_bits(struct kvm_msr_entry msr)
 142 {
 143         return (u64)msr.data & EFER_SAVE_RESTORE_BITS;
 144 }
 145
 146 static inline int msr_efer_need_save_restore(struct vcpu_vmx *vmx)
 147 {
 148         int efer_offset = vmx->msr_offset_efer;
 149         return msr_efer_save_restore_bits(vmx->host_msrs[efer_offset]) !=
 150                 msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 151 }
 152
 153 static inline int is_page_fault(u32 intr_info)
 154 {
 155         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 156                              INTR_INFO_VALID_MASK)) ==
 157                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 158 }
 159
 160 static inline int is_no_device(u32 intr_info)
 161 {
 162         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 163                              INTR_INFO_VALID_MASK)) ==
 164                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 165 }
 166
 167 static inline int is_invalid_opcode(u32 intr_info)
 168 {
 169         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 170                              INTR_INFO_VALID_MASK)) ==
 171                 (INTR_TYPE_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
 172 }
 173
 174 static inline int is_external_interrupt(u32 intr_info)
 175 {
 176         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 177                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 178 }
 179
 180 static inline int cpu_has_vmx_tpr_shadow(void)
 181 {
 182         return (vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW);
 183 }
 184
 185 static inline int vm_need_tpr_shadow(struct kvm *kvm)
 186 {
 187         return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)));
 188 }
 189
 190 static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
 191 {
 192         int i;
 193
 194         for (i = 0; i < vmx->nmsrs; ++i)
 195                 if (vmx->guest_msrs[i].index == msr)
 196                         return i;
 197         return -1;
 198 }
 199
 200 static struct kvm_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
 201 {
 202         int i;
 203
 204         i = __find_msr_index(vmx, msr);
 205         if (i >= 0)
 206                 return &vmx->guest_msrs[i];
 207         return NULL;
 208 }
 209
 210 static void vmcs_clear(struct vmcs *vmcs)
 211 {
 212         u64 phys_addr = __pa(vmcs);
 213         u8 error;
 214
 215         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 216                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 217                       : "cc", "memory");
 218         if (error)
 219                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 220                        vmcs, phys_addr);
 221 }
 222
 223 static void __vcpu_clear(void *arg)
 224 {
 225         struct vcpu_vmx *vmx = arg;
 226         int cpu = raw_smp_processor_id();
 227
 228         if (vmx->vcpu.cpu == cpu)
 229                 vmcs_clear(vmx->vmcs);
 230         if (per_cpu(current_vmcs, cpu) == vmx->vmcs)
 231                 per_cpu(current_vmcs, cpu) = NULL;
 232         rdtscll(vmx->vcpu.host_tsc);
 233 }
 234
 235 static void vcpu_clear(struct vcpu_vmx *vmx)
 236 {
 237         if (vmx->vcpu.cpu != raw_smp_processor_id() && vmx->vcpu.cpu != -1)
 238                 smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear,
 239                                          vmx, 0, 1);
 240         else
 241                 __vcpu_clear(vmx);
 242         vmx->launched = 0;
 243 }
 244
 245 static unsigned long vmcs_readl(unsigned long field)
 246 {
 247         unsigned long value;
 248
 249         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 250                       : "=a"(value) : "d"(field) : "cc");
 251         return value;
 252 }
 253
 254 static u16 vmcs_read16(unsigned long field)
 255 {
 256         return vmcs_readl(field);
 257 }
 258
 259 static u32 vmcs_read32(unsigned long field)
 260 {
 261         return vmcs_readl(field);
 262 }
 263
 264 static u64 vmcs_read64(unsigned long field)
 265 {
 266 #ifdef CONFIG_X86_64
 267         return vmcs_readl(field);
 268 #else
 269         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 270 #endif
 271 }
 272
 273 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 274 {
 275         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 276                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 277         dump_stack();
 278 }
 279
 280 static void vmcs_writel(unsigned long field, unsigned long value)
 281 {
 282         u8 error;
 283
 284         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 285                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 286         if (unlikely(error))
 287                 vmwrite_error(field, value);
 288 }
 289
 290 static void vmcs_write16(unsigned long field, u16 value)
 291 {
 292         vmcs_writel(field, value);
 293 }
 294
 295 static void vmcs_write32(unsigned long field, u32 value)
 296 {
 297         vmcs_writel(field, value);
 298 }
 299
 300 static void vmcs_write64(unsigned long field, u64 value)
 301 {
 302 #ifdef CONFIG_X86_64
 303         vmcs_writel(field, value);
 304 #else
 305         vmcs_writel(field, value);
 306         asm volatile ("");
 307         vmcs_writel(field+1, value >> 32);
 308 #endif
 309 }
 310
 311 static void vmcs_clear_bits(unsigned long field, u32 mask)
 312 {
 313         vmcs_writel(field, vmcs_readl(field) & ~mask);
 314 }
 315
 316 static void vmcs_set_bits(unsigned long field, u32 mask)
 317 {
 318         vmcs_writel(field, vmcs_readl(field) | mask);
 319 }
 320
 321 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 322 {
 323         u32 eb;
 324
 325         eb = (1u << PF_VECTOR) | (1u << UD_VECTOR);
 326         if (!vcpu->fpu_active)
 327                 eb |= 1u << NM_VECTOR;
 328         if (vcpu->guest_debug.enabled)
 329                 eb |= 1u << 1;
 330         if (vcpu->rmode.active)
 331                 eb = ~0;
 332         vmcs_write32(EXCEPTION_BITMAP, eb);
 333 }
 334
 335 static void reload_tss(void)
 336 {
 337 #ifndef CONFIG_X86_64
 338
 339         /*
 340          * VT restores TR but not its size.  Useless.
 341          */
 342         struct descriptor_table gdt;
 343         struct segment_descriptor *descs;
 344
 345         get_gdt(&gdt);
 346         descs = (void *)gdt.base;
 347         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 348         load_TR_desc();
 349 #endif
 350 }
 351
 352 static void load_transition_efer(struct vcpu_vmx *vmx)
 353 {
 354         u64 trans_efer;
 355         int efer_offset = vmx->msr_offset_efer;
 356
 357         trans_efer = vmx->host_msrs[efer_offset].data;
 358         trans_efer &= ~EFER_SAVE_RESTORE_BITS;
 359         trans_efer |= msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 360         wrmsrl(MSR_EFER, trans_efer);
 361         vmx->vcpu.stat.efer_reload++;
 362 }
 363
 364 static void vmx_save_host_state(struct kvm_vcpu *vcpu)
 365 {
 366         struct vcpu_vmx *vmx = to_vmx(vcpu);
 367
 368         if (vmx->host_state.loaded)
 369                 return;
 370
 371         vmx->host_state.loaded = 1;
 372         /*
 373          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 374          * allow segment selectors with cpl > 0 or ti == 1.
 375          */
 376         vmx->host_state.ldt_sel = read_ldt();
 377         vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
 378         vmx->host_state.fs_sel = read_fs();
 379         if (!(vmx->host_state.fs_sel & 7)) {
 380                 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
 381                 vmx->host_state.fs_reload_needed = 0;
 382         } else {
 383                 vmcs_write16(HOST_FS_SELECTOR, 0);
 384                 vmx->host_state.fs_reload_needed = 1;
 385         }
 386         vmx->host_state.gs_sel = read_gs();
 387         if (!(vmx->host_state.gs_sel & 7))
 388                 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
 389         else {
 390                 vmcs_write16(HOST_GS_SELECTOR, 0);
 391                 vmx->host_state.gs_ldt_reload_needed = 1;
 392         }
 393
 394 #ifdef CONFIG_X86_64
 395         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 396         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 397 #else
 398         vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
 399         vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
 400 #endif
 401
 402 #ifdef CONFIG_X86_64
 403         if (is_long_mode(&vmx->vcpu)) {
 404                 save_msrs(vmx->host_msrs +
 405                           vmx->msr_offset_kernel_gs_base, 1);
 406         }
 407 #endif
 408         load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 409         if (msr_efer_need_save_restore(vmx))
 410                 load_transition_efer(vmx);
 411 }
 412
 413 static void vmx_load_host_state(struct vcpu_vmx *vmx)
 414 {
 415         unsigned long flags;
 416
 417         if (!vmx->host_state.loaded)
 418                 return;
 419
 420         vmx->host_state.loaded = 0;
 421         if (vmx->host_state.fs_reload_needed)
 422                 load_fs(vmx->host_state.fs_sel);
 423         if (vmx->host_state.gs_ldt_reload_needed) {
 424                 load_ldt(vmx->host_state.ldt_sel);
 425                 /*
 426                  * If we have to reload gs, we must take care to
 427                  * preserve our gs base.
 428                  */
 429                 local_irq_save(flags);
 430                 load_gs(vmx->host_state.gs_sel);
 431 #ifdef CONFIG_X86_64
 432                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 433 #endif
 434                 local_irq_restore(flags);
 435         }
 436         reload_tss();
 437         save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 438         load_msrs(vmx->host_msrs, vmx->save_nmsrs);
 439         if (msr_efer_need_save_restore(vmx))
 440                 load_msrs(vmx->host_msrs + vmx->msr_offset_efer, 1);
 441 }
 442
 443 /*
 444  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 445  * vcpu mutex is already taken.
 446  */
 447 static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 448 {
 449         struct vcpu_vmx *vmx = to_vmx(vcpu);
 450         u64 phys_addr = __pa(vmx->vmcs);
 451         u64 tsc_this, delta;
 452
 453         if (vcpu->cpu != cpu) {
 454                 vcpu_clear(vmx);
 455                 kvm_migrate_apic_timer(vcpu);
 456         }
 457
 458         if (per_cpu(current_vmcs, cpu) != vmx->vmcs) {
 459                 u8 error;
 460
 461                 per_cpu(current_vmcs, cpu) = vmx->vmcs;
 462                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 463                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 464                               : "cc");
 465                 if (error)
 466                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 467                                vmx->vmcs, phys_addr);
 468         }
 469
 470         if (vcpu->cpu != cpu) {
 471                 struct descriptor_table dt;
 472                 unsigned long sysenter_esp;
 473
 474                 vcpu->cpu = cpu;
 475                 /*
 476                  * Linux uses per-cpu TSS and GDT, so set these when switching
 477                  * processors.
 478                  */
 479                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 480                 get_gdt(&dt);
 481                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 482
 483                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 484                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 485
 486                 /*
 487                  * Make sure the time stamp counter is monotonous.
 488                  */
 489                 rdtscll(tsc_this);
 490                 delta = vcpu->host_tsc - tsc_this;
 491                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 492         }
 493 }
 494
 495 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 496 {
 497         vmx_load_host_state(to_vmx(vcpu));
 498         kvm_put_guest_fpu(vcpu);
 499 }
 500
 501 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 502 {
 503         if (vcpu->fpu_active)
 504                 return;
 505         vcpu->fpu_active = 1;
 506         vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
 507         if (vcpu->cr0 & X86_CR0_TS)
 508                 vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 509         update_exception_bitmap(vcpu);
 510 }
 511
 512 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 513 {
 514         if (!vcpu->fpu_active)
 515                 return;
 516         vcpu->fpu_active = 0;
 517         vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 518         update_exception_bitmap(vcpu);
 519 }
 520
 521 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 522 {
 523         vcpu_clear(to_vmx(vcpu));
 524 }
 525
 526 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 527 {
 528         return vmcs_readl(GUEST_RFLAGS);
 529 }
 530
 531 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 532 {
 533         if (vcpu->rmode.active)
 534                 rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
 535         vmcs_writel(GUEST_RFLAGS, rflags);
 536 }
 537
 538 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 539 {
 540         unsigned long rip;
 541         u32 interruptibility;
 542
 543         rip = vmcs_readl(GUEST_RIP);
 544         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 545         vmcs_writel(GUEST_RIP, rip);
 546
 547         /*
 548          * We emulated an instruction, so temporary interrupt blocking
 549          * should be removed, if set.
 550          */
 551         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 552         if (interruptibility & 3)
 553                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 554                              interruptibility & ~3);
 555         vcpu->interrupt_window_open = 1;
 556 }
 557
 558 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 559 {
 560         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 561                vmcs_readl(GUEST_RIP));
 562         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 563         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 564                      GP_VECTOR |
 565                      INTR_TYPE_EXCEPTION |
 566                      INTR_INFO_DELIEVER_CODE_MASK |
 567                      INTR_INFO_VALID_MASK);
 568 }
 569
 570 static void vmx_inject_ud(struct kvm_vcpu *vcpu)
 571 {
 572         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 573                      UD_VECTOR |
 574                      INTR_TYPE_EXCEPTION |
 575                      INTR_INFO_VALID_MASK);
 576 }
 577
 578 /*
 579  * Swap MSR entry in host/guest MSR entry array.
 580  */
 581 #ifdef CONFIG_X86_64
 582 static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
 583 {
 584         struct kvm_msr_entry tmp;
 585
 586         tmp = vmx->guest_msrs[to];
 587         vmx->guest_msrs[to] = vmx->guest_msrs[from];
 588         vmx->guest_msrs[from] = tmp;
 589         tmp = vmx->host_msrs[to];
 590         vmx->host_msrs[to] = vmx->host_msrs[from];
 591         vmx->host_msrs[from] = tmp;
 592 }
 593 #endif
 594
 595 /*
 596  * Set up the vmcs to automatically save and restore system
 597  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 598  * mode, as fiddling with msrs is very expensive.
 599  */
 600 static void setup_msrs(struct vcpu_vmx *vmx)
 601 {
 602         int save_nmsrs;
 603
 604         save_nmsrs = 0;
 605 #ifdef CONFIG_X86_64
 606         if (is_long_mode(&vmx->vcpu)) {
 607                 int index;
 608
 609                 index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
 610                 if (index >= 0)
 611                         move_msr_up(vmx, index, save_nmsrs++);
 612                 index = __find_msr_index(vmx, MSR_LSTAR);
 613                 if (index >= 0)
 614                         move_msr_up(vmx, index, save_nmsrs++);
 615                 index = __find_msr_index(vmx, MSR_CSTAR);
 616                 if (index >= 0)
 617                         move_msr_up(vmx, index, save_nmsrs++);
 618                 index = __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 619                 if (index >= 0)
 620                         move_msr_up(vmx, index, save_nmsrs++);
 621                 /*
 622                  * MSR_K6_STAR is only needed on long mode guests, and only
 623                  * if efer.sce is enabled.
 624                  */
 625                 index = __find_msr_index(vmx, MSR_K6_STAR);
 626                 if ((index >= 0) && (vmx->vcpu.shadow_efer & EFER_SCE))
 627                         move_msr_up(vmx, index, save_nmsrs++);
 628         }
 629 #endif
 630         vmx->save_nmsrs = save_nmsrs;
 631
 632 #ifdef CONFIG_X86_64
 633         vmx->msr_offset_kernel_gs_base =
 634                 __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 635 #endif
 636         vmx->msr_offset_efer = __find_msr_index(vmx, MSR_EFER);
 637 }
 638
 639 /*
 640  * reads and returns guest's timestamp counter "register"
 641  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 642  */
 643 static u64 guest_read_tsc(void)
 644 {
 645         u64 host_tsc, tsc_offset;
 646
 647         rdtscll(host_tsc);
 648         tsc_offset = vmcs_read64(TSC_OFFSET);
 649         return host_tsc + tsc_offset;
 650 }
 651
 652 /*
 653  * writes 'guest_tsc' into guest's timestamp counter "register"
 654  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 655  */
 656 static void guest_write_tsc(u64 guest_tsc)
 657 {
 658         u64 host_tsc;
 659
 660         rdtscll(host_tsc);
 661         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 662 }
 663
 664 /*
 665  * Reads an msr value (of 'msr_index') into 'pdata'.
 666  * Returns 0 on success, non-0 otherwise.
 667  * Assumes vcpu_load() was already called.
 668  */
 669 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 670 {
 671         u64 data;
 672         struct kvm_msr_entry *msr;
 673
 674         if (!pdata) {
 675                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 676                 return -EINVAL;
 677         }
 678
 679         switch (msr_index) {
 680 #ifdef CONFIG_X86_64
 681         case MSR_FS_BASE:
 682                 data = vmcs_readl(GUEST_FS_BASE);
 683                 break;
 684         case MSR_GS_BASE:
 685                 data = vmcs_readl(GUEST_GS_BASE);
 686                 break;
 687         case MSR_EFER:
 688                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 689 #endif
 690         case MSR_IA32_TIME_STAMP_COUNTER:
 691                 data = guest_read_tsc();
 692                 break;
 693         case MSR_IA32_SYSENTER_CS:
 694                 data = vmcs_read32(GUEST_SYSENTER_CS);
 695                 break;
 696         case MSR_IA32_SYSENTER_EIP:
 697                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 698                 break;
 699         case MSR_IA32_SYSENTER_ESP:
 700                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 701                 break;
 702         default:
 703                 msr = find_msr_entry(to_vmx(vcpu), msr_index);
 704                 if (msr) {
 705                         data = msr->data;
 706                         break;
 707                 }
 708                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 709         }
 710
 711         *pdata = data;
 712         return 0;
 713 }
 714
 715 /*
 716  * Writes msr value into into the appropriate "register".
 717  * Returns 0 on success, non-0 otherwise.
 718  * Assumes vcpu_load() was already called.
 719  */
 720 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 721 {
 722         struct vcpu_vmx *vmx = to_vmx(vcpu);
 723         struct kvm_msr_entry *msr;
 724         int ret = 0;
 725
 726         switch (msr_index) {
 727 #ifdef CONFIG_X86_64
 728         case MSR_EFER:
 729                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 730                 if (vmx->host_state.loaded)
 731                         load_transition_efer(vmx);
 732                 break;
 733         case MSR_FS_BASE:
 734                 vmcs_writel(GUEST_FS_BASE, data);
 735                 break;
 736         case MSR_GS_BASE:
 737                 vmcs_writel(GUEST_GS_BASE, data);
 738                 break;
 739 #endif
 740         case MSR_IA32_SYSENTER_CS:
 741                 vmcs_write32(GUEST_SYSENTER_CS, data);
 742                 break;
 743         case MSR_IA32_SYSENTER_EIP:
 744                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 745                 break;
 746         case MSR_IA32_SYSENTER_ESP:
 747                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 748                 break;
 749         case MSR_IA32_TIME_STAMP_COUNTER:
 750                 guest_write_tsc(data);
 751                 break;
 752         default:
 753                 msr = find_msr_entry(vmx, msr_index);
 754                 if (msr) {
 755                         msr->data = data;
 756                         if (vmx->host_state.loaded)
 757                                 load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 758                         break;
 759                 }
 760                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 761         }
 762
 763         return ret;
 764 }
 765
 766 /*
 767  * Sync the rsp and rip registers into the vcpu structure.  This allows
 768  * registers to be accessed by indexing vcpu->regs.
 769  */
 770 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 771 {
 772         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 773         vcpu->rip = vmcs_readl(GUEST_RIP);
 774 }
 775
 776 /*
 777  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 778  * modification.
 779  */
 780 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 781 {
 782         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 783         vmcs_writel(GUEST_RIP, vcpu->rip);
 784 }
 785
 786 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 787 {
 788         unsigned long dr7 = 0x400;
 789         int old_singlestep;
 790
 791         old_singlestep = vcpu->guest_debug.singlestep;
 792
 793         vcpu->guest_debug.enabled = dbg->enabled;
 794         if (vcpu->guest_debug.enabled) {
 795                 int i;
 796
 797                 dr7 |= 0x200;  /* exact */
 798                 for (i = 0; i < 4; ++i) {
 799                         if (!dbg->breakpoints[i].enabled)
 800                                 continue;
 801                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 802                         dr7 |= 2 << (i*2);    /* global enable */
 803                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 804                 }
 805
 806                 vcpu->guest_debug.singlestep = dbg->singlestep;
 807         } else
 808                 vcpu->guest_debug.singlestep = 0;
 809
 810         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 811                 unsigned long flags;
 812
 813                 flags = vmcs_readl(GUEST_RFLAGS);
 814                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 815                 vmcs_writel(GUEST_RFLAGS, flags);
 816         }
 817
 818         update_exception_bitmap(vcpu);
 819         vmcs_writel(GUEST_DR7, dr7);
 820
 821         return 0;
 822 }
 823
 824 static int vmx_get_irq(struct kvm_vcpu *vcpu)
 825 {
 826         u32 idtv_info_field;
 827
 828         idtv_info_field = vmcs_read32(IDT_VECTORING_INFO_FIELD);
 829         if (idtv_info_field & INTR_INFO_VALID_MASK) {
 830                 if (is_external_interrupt(idtv_info_field))
 831                         return idtv_info_field & VECTORING_INFO_VECTOR_MASK;
 832                 else
 833                         printk("pending exception: not handled yet\n");
 834         }
 835         return -1;
 836 }
 837
 838 static __init int cpu_has_kvm_support(void)
 839 {
 840         unsigned long ecx = cpuid_ecx(1);
 841         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 842 }
 843
 844 static __init int vmx_disabled_by_bios(void)
 845 {
 846         u64 msr;
 847
 848         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 849         return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 850                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 851             == MSR_IA32_FEATURE_CONTROL_LOCKED;
 852         /* locked but not enabled */
 853 }
 854
 855 static void hardware_enable(void *garbage)
 856 {
 857         int cpu = raw_smp_processor_id();
 858         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 859         u64 old;
 860
 861         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 862         if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 863                     MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 864             != (MSR_IA32_FEATURE_CONTROL_LOCKED |
 865                 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 866                 /* enable and lock */
 867                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
 868                        MSR_IA32_FEATURE_CONTROL_LOCKED |
 869                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);
 870         write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
 871         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 872                       : "memory", "cc");
 873 }
 874
 875 static void hardware_disable(void *garbage)
 876 {
 877         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 878 }
 879
 880 static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
 881                                       u32 msr, u32* result)
 882 {
 883         u32 vmx_msr_low, vmx_msr_high;
 884         u32 ctl = ctl_min | ctl_opt;
 885
 886         rdmsr(msr, vmx_msr_low, vmx_msr_high);
 887
 888         ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
 889         ctl |= vmx_msr_low;  /* bit == 1 in low word  ==> must be one  */
 890
 891         /* Ensure minimum (required) set of control bits are supported. */
 892         if (ctl_min & ~ctl)
 893                 return -EIO;
 894
 895         *result = ctl;
 896         return 0;
 897 }
 898
 899 static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
 900 {
 901         u32 vmx_msr_low, vmx_msr_high;
 902         u32 min, opt;
 903         u32 _pin_based_exec_control = 0;
 904         u32 _cpu_based_exec_control = 0;
 905         u32 _vmexit_control = 0;
 906         u32 _vmentry_control = 0;
 907
 908         min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
 909         opt = 0;
 910         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
 911                                 &_pin_based_exec_control) < 0)
 912                 return -EIO;
 913
 914         min = CPU_BASED_HLT_EXITING |
 915 #ifdef CONFIG_X86_64
 916               CPU_BASED_CR8_LOAD_EXITING |
 917               CPU_BASED_CR8_STORE_EXITING |
 918 #endif
 919               CPU_BASED_USE_IO_BITMAPS |
 920               CPU_BASED_MOV_DR_EXITING |
 921               CPU_BASED_USE_TSC_OFFSETING;
 922 #ifdef CONFIG_X86_64
 923         opt = CPU_BASED_TPR_SHADOW;
 924 #else
 925         opt = 0;
 926 #endif
 927         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
 928                                 &_cpu_based_exec_control) < 0)
 929                 return -EIO;
 930 #ifdef CONFIG_X86_64
 931         if ((_cpu_based_exec_control & CPU_BASED_TPR_SHADOW))
 932                 _cpu_based_exec_control &= ~CPU_BASED_CR8_LOAD_EXITING &
 933                                            ~CPU_BASED_CR8_STORE_EXITING;
 934 #endif
 935
 936         min = 0;
 937 #ifdef CONFIG_X86_64
 938         min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
 939 #endif
 940         opt = 0;
 941         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
 942                                 &_vmexit_control) < 0)
 943                 return -EIO;
 944
 945         min = opt = 0;
 946         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
 947                                 &_vmentry_control) < 0)
 948                 return -EIO;
 949
 950         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 951
 952         /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
 953         if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
 954                 return -EIO;
 955
 956 #ifdef CONFIG_X86_64
 957         /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
 958         if (vmx_msr_high & (1u<<16))
 959                 return -EIO;
 960 #endif
 961
 962         /* Require Write-Back (WB) memory type for VMCS accesses. */
 963         if (((vmx_msr_high >> 18) & 15) != 6)
 964                 return -EIO;
 965
 966         vmcs_conf->size = vmx_msr_high & 0x1fff;
 967         vmcs_conf->order = get_order(vmcs_config.size);
 968         vmcs_conf->revision_id = vmx_msr_low;
 969
 970         vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
 971         vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
 972         vmcs_conf->vmexit_ctrl         = _vmexit_control;
 973         vmcs_conf->vmentry_ctrl        = _vmentry_control;
 974
 975         return 0;
 976 }
 977
 978 static struct vmcs *alloc_vmcs_cpu(int cpu)
 979 {
 980         int node = cpu_to_node(cpu);
 981         struct page *pages;
 982         struct vmcs *vmcs;
 983
 984         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_config.order);
 985         if (!pages)
 986                 return NULL;
 987         vmcs = page_address(pages);
 988         memset(vmcs, 0, vmcs_config.size);
 989         vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
 990         return vmcs;
 991 }
 992
 993 static struct vmcs *alloc_vmcs(void)
 994 {
 995         return alloc_vmcs_cpu(raw_smp_processor_id());
 996 }
 997
 998 static void free_vmcs(struct vmcs *vmcs)
 999 {
1000         free_pages((unsigned long)vmcs, vmcs_config.order);
1001 }
1002
1003 static void free_kvm_area(void)
1004 {
1005         int cpu;
1006
1007         for_each_online_cpu(cpu)
1008                 free_vmcs(per_cpu(vmxarea, cpu));
1009 }
1010
1011 static __init int alloc_kvm_area(void)
1012 {
1013         int cpu;
1014
1015         for_each_online_cpu(cpu) {
1016                 struct vmcs *vmcs;
1017
1018                 vmcs = alloc_vmcs_cpu(cpu);
1019                 if (!vmcs) {
1020                         free_kvm_area();
1021                         return -ENOMEM;
1022                 }
1023
1024                 per_cpu(vmxarea, cpu) = vmcs;
1025         }
1026         return 0;
1027 }
1028
1029 static __init int hardware_setup(void)
1030 {
1031         if (setup_vmcs_config(&vmcs_config) < 0)
1032                 return -EIO;
1033         return alloc_kvm_area();
1034 }
1035
1036 static __exit void hardware_unsetup(void)
1037 {
1038         free_kvm_area();
1039 }
1040
1041 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
1042 {
1043         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1044
1045         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
1046                 vmcs_write16(sf->selector, save->selector);
1047                 vmcs_writel(sf->base, save->base);
1048                 vmcs_write32(sf->limit, save->limit);
1049                 vmcs_write32(sf->ar_bytes, save->ar);
1050         } else {
1051                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
1052                         << AR_DPL_SHIFT;
1053                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
1054         }
1055 }
1056
1057 static void enter_pmode(struct kvm_vcpu *vcpu)
1058 {
1059         unsigned long flags;
1060
1061         vcpu->rmode.active = 0;
1062
1063         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
1064         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
1065         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
1066
1067         flags = vmcs_readl(GUEST_RFLAGS);
1068         flags &= ~(X86_EFLAGS_IOPL | X86_EFLAGS_VM);
1069         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
1070         vmcs_writel(GUEST_RFLAGS, flags);
1071
1072         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
1073                         (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
1074
1075         update_exception_bitmap(vcpu);
1076
1077         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
1078         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
1079         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
1080         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
1081
1082         vmcs_write16(GUEST_SS_SELECTOR, 0);
1083         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
1084
1085         vmcs_write16(GUEST_CS_SELECTOR,
1086                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
1087         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1088 }
1089
1090 static gva_t rmode_tss_base(struct kvm* kvm)
1091 {
1092         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
1093         return base_gfn << PAGE_SHIFT;
1094 }
1095
1096 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
1097 {
1098         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1099
1100         save->selector = vmcs_read16(sf->selector);
1101         save->base = vmcs_readl(sf->base);
1102         save->limit = vmcs_read32(sf->limit);
1103         save->ar = vmcs_read32(sf->ar_bytes);
1104         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
1105         vmcs_write32(sf->limit, 0xffff);
1106         vmcs_write32(sf->ar_bytes, 0xf3);
1107 }
1108
1109 static void enter_rmode(struct kvm_vcpu *vcpu)
1110 {
1111         unsigned long flags;
1112
1113         vcpu->rmode.active = 1;
1114
1115         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
1116         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
1117
1118         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
1119         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
1120
1121         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
1122         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1123
1124         flags = vmcs_readl(GUEST_RFLAGS);
1125         vcpu->rmode.save_iopl = (flags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
1126
1127         flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
1128
1129         vmcs_writel(GUEST_RFLAGS, flags);
1130         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
1131         update_exception_bitmap(vcpu);
1132
1133         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
1134         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
1135         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
1136
1137         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
1138         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1139         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
1140                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
1141         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
1142
1143         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
1144         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
1145         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
1146         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
1147
1148         kvm_mmu_reset_context(vcpu);
1149         init_rmode_tss(vcpu->kvm);
1150 }
1151
1152 #ifdef CONFIG_X86_64
1153
1154 static void enter_lmode(struct kvm_vcpu *vcpu)
1155 {
1156         u32 guest_tr_ar;
1157
1158         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
1159         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
1160                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
1161                        __FUNCTION__);
1162                 vmcs_write32(GUEST_TR_AR_BYTES,
1163                              (guest_tr_ar & ~AR_TYPE_MASK)
1164                              | AR_TYPE_BUSY_64_TSS);
1165         }
1166
1167         vcpu->shadow_efer |= EFER_LMA;
1168
1169         find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
1170         vmcs_write32(VM_ENTRY_CONTROLS,
1171                      vmcs_read32(VM_ENTRY_CONTROLS)
1172                      | VM_ENTRY_IA32E_MODE);
1173 }
1174
1175 static void exit_lmode(struct kvm_vcpu *vcpu)
1176 {
1177         vcpu->shadow_efer &= ~EFER_LMA;
1178
1179         vmcs_write32(VM_ENTRY_CONTROLS,
1180                      vmcs_read32(VM_ENTRY_CONTROLS)
1181                      & ~VM_ENTRY_IA32E_MODE);
1182 }
1183
1184 #endif
1185
1186 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1187 {
1188         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
1189         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
1190 }
1191
1192 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1193 {
1194         vmx_fpu_deactivate(vcpu);
1195
1196         if (vcpu->rmode.active && (cr0 & X86_CR0_PE))
1197                 enter_pmode(vcpu);
1198
1199         if (!vcpu->rmode.active && !(cr0 & X86_CR0_PE))
1200                 enter_rmode(vcpu);
1201
1202 #ifdef CONFIG_X86_64
1203         if (vcpu->shadow_efer & EFER_LME) {
1204                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
1205                         enter_lmode(vcpu);
1206                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
1207                         exit_lmode(vcpu);
1208         }
1209 #endif
1210
1211         vmcs_writel(CR0_READ_SHADOW, cr0);
1212         vmcs_writel(GUEST_CR0,
1213                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1214         vcpu->cr0 = cr0;
1215
1216         if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
1217                 vmx_fpu_activate(vcpu);
1218 }
1219
1220 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1221 {
1222         vmcs_writel(GUEST_CR3, cr3);
1223         if (vcpu->cr0 & X86_CR0_PE)
1224                 vmx_fpu_deactivate(vcpu);
1225 }
1226
1227 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1228 {
1229         vmcs_writel(CR4_READ_SHADOW, cr4);
1230         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
1231                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1232         vcpu->cr4 = cr4;
1233 }
1234
1235 #ifdef CONFIG_X86_64
1236
1237 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1238 {
1239         struct vcpu_vmx *vmx = to_vmx(vcpu);
1240         struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
1241
1242         vcpu->shadow_efer = efer;
1243         if (efer & EFER_LMA) {
1244                 vmcs_write32(VM_ENTRY_CONTROLS,
1245                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1246                                      VM_ENTRY_IA32E_MODE);
1247                 msr->data = efer;
1248
1249         } else {
1250                 vmcs_write32(VM_ENTRY_CONTROLS,
1251                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1252                                      ~VM_ENTRY_IA32E_MODE);
1253
1254                 msr->data = efer & ~EFER_LME;
1255         }
1256         setup_msrs(vmx);
1257 }
1258
1259 #endif
1260
1261 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1262 {
1263         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1264
1265         return vmcs_readl(sf->base);
1266 }
1267
1268 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1269                             struct kvm_segment *var, int seg)
1270 {
1271         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1272         u32 ar;
1273
1274         var->base = vmcs_readl(sf->base);
1275         var->limit = vmcs_read32(sf->limit);
1276         var->selector = vmcs_read16(sf->selector);
1277         ar = vmcs_read32(sf->ar_bytes);
1278         if (ar & AR_UNUSABLE_MASK)
1279                 ar = 0;
1280         var->type = ar & 15;
1281         var->s = (ar >> 4) & 1;
1282         var->dpl = (ar >> 5) & 3;
1283         var->present = (ar >> 7) & 1;
1284         var->avl = (ar >> 12) & 1;
1285         var->l = (ar >> 13) & 1;
1286         var->db = (ar >> 14) & 1;
1287         var->g = (ar >> 15) & 1;
1288         var->unusable = (ar >> 16) & 1;
1289 }
1290
1291 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1292 {
1293         u32 ar;
1294
1295         if (var->unusable)
1296                 ar = 1 << 16;
1297         else {
1298                 ar = var->type & 15;
1299                 ar |= (var->s & 1) << 4;
1300                 ar |= (var->dpl & 3) << 5;
1301                 ar |= (var->present & 1) << 7;
1302                 ar |= (var->avl & 1) << 12;
1303                 ar |= (var->l & 1) << 13;
1304                 ar |= (var->db & 1) << 14;
1305                 ar |= (var->g & 1) << 15;
1306         }
1307         if (ar == 0) /* a 0 value means unusable */
1308                 ar = AR_UNUSABLE_MASK;
1309
1310         return ar;
1311 }
1312
1313 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1314                             struct kvm_segment *var, int seg)
1315 {
1316         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1317         u32 ar;
1318
1319         if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1320                 vcpu->rmode.tr.selector = var->selector;
1321                 vcpu->rmode.tr.base = var->base;
1322                 vcpu->rmode.tr.limit = var->limit;
1323                 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1324                 return;
1325         }
1326         vmcs_writel(sf->base, var->base);
1327         vmcs_write32(sf->limit, var->limit);
1328         vmcs_write16(sf->selector, var->selector);
1329         if (vcpu->rmode.active && var->s) {
1330                 /*
1331                  * Hack real-mode segments into vm86 compatibility.
1332                  */
1333                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1334                         vmcs_writel(sf->base, 0xf0000);
1335                 ar = 0xf3;
1336         } else
1337                 ar = vmx_segment_access_rights(var);
1338         vmcs_write32(sf->ar_bytes, ar);
1339 }
1340
1341 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1342 {
1343         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1344
1345         *db = (ar >> 14) & 1;
1346         *l = (ar >> 13) & 1;
1347 }
1348
1349 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1350 {
1351         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1352         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1353 }
1354
1355 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1356 {
1357         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1358         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1359 }
1360
1361 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1362 {
1363         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1364         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1365 }
1366
1367 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1368 {
1369         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1370         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1371 }
1372
1373 static int init_rmode_tss(struct kvm* kvm)
1374 {
1375         struct page *p1, *p2, *p3;
1376         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1377         char *page;
1378
1379         p1 = gfn_to_page(kvm, fn++);
1380         p2 = gfn_to_page(kvm, fn++);
1381         p3 = gfn_to_page(kvm, fn);
1382
1383         if (!p1 || !p2 || !p3) {
1384                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1385                 return 0;
1386         }
1387
1388         page = kmap_atomic(p1, KM_USER0);
1389         clear_page(page);
1390         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1391         kunmap_atomic(page, KM_USER0);
1392
1393         page = kmap_atomic(p2, KM_USER0);
1394         clear_page(page);
1395         kunmap_atomic(page, KM_USER0);
1396
1397         page = kmap_atomic(p3, KM_USER0);
1398         clear_page(page);
1399         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1400         kunmap_atomic(page, KM_USER0);
1401
1402         return 1;
1403 }
1404
1405 static void seg_setup(int seg)
1406 {
1407         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1408
1409         vmcs_write16(sf->selector, 0);
1410         vmcs_writel(sf->base, 0);
1411         vmcs_write32(sf->limit, 0xffff);
1412         vmcs_write32(sf->ar_bytes, 0x93);
1413 }
1414
1415 /*
1416  * Sets up the vmcs for emulated real mode.
1417  */
1418 static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
1419 {
1420         u32 host_sysenter_cs;
1421         u32 junk;
1422         unsigned long a;
1423         struct descriptor_table dt;
1424         int i;
1425         int ret = 0;
1426         unsigned long kvm_vmx_return;
1427         u64 msr;
1428         u32 exec_control;
1429
1430         if (!init_rmode_tss(vmx->vcpu.kvm)) {
1431                 ret = -ENOMEM;
1432                 goto out;
1433         }
1434
1435         vmx->vcpu.rmode.active = 0;
1436
1437         vmx->vcpu.regs[VCPU_REGS_RDX] = get_rdx_init_val();
1438         set_cr8(&vmx->vcpu, 0);
1439         msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1440         if (vmx->vcpu.vcpu_id == 0)
1441                 msr |= MSR_IA32_APICBASE_BSP;
1442         kvm_set_apic_base(&vmx->vcpu, msr);
1443
1444         fx_init(&vmx->vcpu);
1445
1446         /*
1447          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1448          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1449          */
1450         if (vmx->vcpu.vcpu_id == 0) {
1451                 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1452                 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1453         } else {
1454                 vmcs_write16(GUEST_CS_SELECTOR, vmx->vcpu.sipi_vector << 8);
1455                 vmcs_writel(GUEST_CS_BASE, vmx->vcpu.sipi_vector << 12);
1456         }
1457         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1458         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1459
1460         seg_setup(VCPU_SREG_DS);
1461         seg_setup(VCPU_SREG_ES);
1462         seg_setup(VCPU_SREG_FS);
1463         seg_setup(VCPU_SREG_GS);
1464         seg_setup(VCPU_SREG_SS);
1465
1466         vmcs_write16(GUEST_TR_SELECTOR, 0);
1467         vmcs_writel(GUEST_TR_BASE, 0);
1468         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1469         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1470
1471         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1472         vmcs_writel(GUEST_LDTR_BASE, 0);
1473         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1474         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1475
1476         vmcs_write32(GUEST_SYSENTER_CS, 0);
1477         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1478         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1479
1480         vmcs_writel(GUEST_RFLAGS, 0x02);
1481         if (vmx->vcpu.vcpu_id == 0)
1482                 vmcs_writel(GUEST_RIP, 0xfff0);
1483         else
1484                 vmcs_writel(GUEST_RIP, 0);
1485         vmcs_writel(GUEST_RSP, 0);
1486
1487         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1488         vmcs_writel(GUEST_DR7, 0x400);
1489
1490         vmcs_writel(GUEST_GDTR_BASE, 0);
1491         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1492
1493         vmcs_writel(GUEST_IDTR_BASE, 0);
1494         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1495
1496         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1497         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1498         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1499
1500         /* I/O */
1501         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1502         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1503
1504         guest_write_tsc(0);
1505
1506         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1507
1508         /* Special registers */
1509         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1510
1511         /* Control */
1512         vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
1513                 vmcs_config.pin_based_exec_ctrl);
1514
1515         exec_control = vmcs_config.cpu_based_exec_ctrl;
1516         if (!vm_need_tpr_shadow(vmx->vcpu.kvm)) {
1517                 exec_control &= ~CPU_BASED_TPR_SHADOW;
1518 #ifdef CONFIG_X86_64
1519                 exec_control |= CPU_BASED_CR8_STORE_EXITING |
1520                                 CPU_BASED_CR8_LOAD_EXITING;
1521 #endif
1522         }
1523         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
1524
1525         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1526         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1527         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1528
1529         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1530         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1531         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1532
1533         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1534         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1535         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1536         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1537         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1538         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1539 #ifdef CONFIG_X86_64
1540         rdmsrl(MSR_FS_BASE, a);
1541         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1542         rdmsrl(MSR_GS_BASE, a);
1543         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1544 #else
1545         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1546         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1547 #endif
1548
1549         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1550
1551         get_idt(&dt);
1552         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1553
1554         asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1555         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1556         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1557         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1558         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1559
1560         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1561         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1562         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1563         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1564         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1565         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1566
1567         for (i = 0; i < NR_VMX_MSR; ++i) {
1568                 u32 index = vmx_msr_index[i];
1569                 u32 data_low, data_high;
1570                 u64 data;
1571                 int j = vmx->nmsrs;
1572
1573                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1574                         continue;
1575                 if (wrmsr_safe(index, data_low, data_high) < 0)
1576                         continue;
1577                 data = data_low | ((u64)data_high << 32);
1578                 vmx->host_msrs[j].index = index;
1579                 vmx->host_msrs[j].reserved = 0;
1580                 vmx->host_msrs[j].data = data;
1581                 vmx->guest_msrs[j] = vmx->host_msrs[j];
1582                 ++vmx->nmsrs;
1583         }
1584
1585         setup_msrs(vmx);
1586
1587         vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
1588
1589         /* 22.2.1, 20.8.1 */
1590         vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
1591
1592         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1593
1594 #ifdef CONFIG_X86_64
1595         vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);
1596         if (vm_need_tpr_shadow(vmx->vcpu.kvm))
1597                 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
1598                              page_to_phys(vmx->vcpu.apic->regs_page));
1599         vmcs_write32(TPR_THRESHOLD, 0);
1600 #endif
1601
1602         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1603         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1604
1605         vmx->vcpu.cr0 = 0x60000010;
1606         vmx_set_cr0(&vmx->vcpu, vmx->vcpu.cr0); // enter rmode
1607         vmx_set_cr4(&vmx->vcpu, 0);
1608 #ifdef CONFIG_X86_64
1609         vmx_set_efer(&vmx->vcpu, 0);
1610 #endif
1611         vmx_fpu_activate(&vmx->vcpu);
1612         update_exception_bitmap(&vmx->vcpu);
1613
1614         return 0;
1615
1616 out:
1617         return ret;
1618 }
1619
1620 static void vmx_vcpu_reset(struct kvm_vcpu *vcpu)
1621 {
1622         struct vcpu_vmx *vmx = to_vmx(vcpu);
1623
1624         vmx_vcpu_setup(vmx);
1625 }
1626
1627 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1628 {
1629         u16 ent[2];
1630         u16 cs;
1631         u16 ip;
1632         unsigned long flags;
1633         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1634         u16 sp =  vmcs_readl(GUEST_RSP);
1635         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1636
1637         if (sp > ss_limit || sp < 6 ) {
1638                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1639                             __FUNCTION__,
1640                             vmcs_readl(GUEST_RSP),
1641                             vmcs_readl(GUEST_SS_BASE),
1642                             vmcs_read32(GUEST_SS_LIMIT));
1643                 return;
1644         }
1645
1646         if (emulator_read_std(irq * sizeof(ent), &ent, sizeof(ent), vcpu) !=
1647                                                         X86EMUL_CONTINUE) {
1648                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1649                 return;
1650         }
1651
1652         flags =  vmcs_readl(GUEST_RFLAGS);
1653         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1654         ip =  vmcs_readl(GUEST_RIP);
1655
1656
1657         if (emulator_write_emulated(ss_base + sp - 2, &flags, 2, vcpu) != X86EMUL_CONTINUE ||
1658             emulator_write_emulated(ss_base + sp - 4, &cs, 2, vcpu) != X86EMUL_CONTINUE ||
1659             emulator_write_emulated(ss_base + sp - 6, &ip, 2, vcpu) != X86EMUL_CONTINUE) {
1660                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1661                 return;
1662         }
1663
1664         vmcs_writel(GUEST_RFLAGS, flags &
1665                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1666         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1667         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1668         vmcs_writel(GUEST_RIP, ent[0]);
1669         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1670 }
1671
1672 static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
1673 {
1674         if (vcpu->rmode.active) {
1675                 inject_rmode_irq(vcpu, irq);
1676                 return;
1677         }
1678         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1679                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1680 }
1681
1682 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1683 {
1684         int word_index = __ffs(vcpu->irq_summary);
1685         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1686         int irq = word_index * BITS_PER_LONG + bit_index;
1687
1688         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1689         if (!vcpu->irq_pending[word_index])
1690                 clear_bit(word_index, &vcpu->irq_summary);
1691         vmx_inject_irq(vcpu, irq);
1692 }
1693
1694
1695 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1696                                        struct kvm_run *kvm_run)
1697 {
1698         u32 cpu_based_vm_exec_control;
1699
1700         vcpu->interrupt_window_open =
1701                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1702                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1703
1704         if (vcpu->interrupt_window_open &&
1705             vcpu->irq_summary &&
1706             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1707                 /*
1708                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1709                  */
1710                 kvm_do_inject_irq(vcpu);
1711
1712         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1713         if (!vcpu->interrupt_window_open &&
1714             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1715                 /*
1716                  * Interrupts blocked.  Wait for unblock.
1717                  */
1718                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1719         else
1720                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1721         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1722 }
1723
1724 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1725 {
1726         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1727
1728         set_debugreg(dbg->bp[0], 0);
1729         set_debugreg(dbg->bp[1], 1);
1730         set_debugreg(dbg->bp[2], 2);
1731         set_debugreg(dbg->bp[3], 3);
1732
1733         if (dbg->singlestep) {
1734                 unsigned long flags;
1735
1736                 flags = vmcs_readl(GUEST_RFLAGS);
1737                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1738                 vmcs_writel(GUEST_RFLAGS, flags);
1739         }
1740 }
1741
1742 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1743                                   int vec, u32 err_code)
1744 {
1745         if (!vcpu->rmode.active)
1746                 return 0;
1747
1748         /*
1749          * Instruction with address size override prefix opcode 0x67
1750          * Cause the #SS fault with 0 error code in VM86 mode.
1751          */
1752         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1753                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1754                         return 1;
1755         return 0;
1756 }
1757
1758 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1759 {
1760         u32 intr_info, error_code;
1761         unsigned long cr2, rip;
1762         u32 vect_info;
1763         enum emulation_result er;
1764         int r;
1765
1766         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1767         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1768
1769         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1770                                                 !is_page_fault(intr_info)) {
1771                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1772                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1773         }
1774
1775         if (!irqchip_in_kernel(vcpu->kvm) && is_external_interrupt(vect_info)) {
1776                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1777                 set_bit(irq, vcpu->irq_pending);
1778                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1779         }
1780
1781         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) /* nmi */
1782                 return 1;  /* already handled by vmx_vcpu_run() */
1783
1784         if (is_no_device(intr_info)) {
1785                 vmx_fpu_activate(vcpu);
1786                 return 1;
1787         }
1788
1789         if (is_invalid_opcode(intr_info)) {
1790                 er = emulate_instruction(vcpu, kvm_run, 0, 0);
1791                 if (er != EMULATE_DONE)
1792                         vmx_inject_ud(vcpu);
1793
1794                 return 1;
1795         }
1796
1797         error_code = 0;
1798         rip = vmcs_readl(GUEST_RIP);
1799         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1800                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1801         if (is_page_fault(intr_info)) {
1802                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1803
1804                 mutex_lock(&vcpu->kvm->lock);
1805                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1806                 if (r < 0) {
1807                         mutex_unlock(&vcpu->kvm->lock);
1808                         return r;
1809                 }
1810                 if (!r) {
1811                         mutex_unlock(&vcpu->kvm->lock);
1812                         return 1;
1813                 }
1814
1815                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1816                 mutex_unlock(&vcpu->kvm->lock);
1817
1818                 switch (er) {
1819                 case EMULATE_DONE:
1820                         return 1;
1821                 case EMULATE_DO_MMIO:
1822                         ++vcpu->stat.mmio_exits;
1823                         return 0;
1824                  case EMULATE_FAIL:
1825                         kvm_report_emulation_failure(vcpu, "pagetable");
1826                         break;
1827                 default:
1828                         BUG();
1829                 }
1830         }
1831
1832         if (vcpu->rmode.active &&
1833             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1834                                                                 error_code)) {
1835                 if (vcpu->halt_request) {
1836                         vcpu->halt_request = 0;
1837                         return kvm_emulate_halt(vcpu);
1838                 }
1839                 return 1;
1840         }
1841
1842         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1843                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1844                 return 0;
1845         }
1846         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1847         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1848         kvm_run->ex.error_code = error_code;
1849         return 0;
1850 }
1851
1852 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1853                                      struct kvm_run *kvm_run)
1854 {
1855         ++vcpu->stat.irq_exits;
1856         return 1;
1857 }
1858
1859 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1860 {
1861         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1862         return 0;
1863 }
1864
1865 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1866 {
1867         unsigned long exit_qualification;
1868         int size, down, in, string, rep;
1869         unsigned port;
1870
1871         ++vcpu->stat.io_exits;
1872         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
1873         string = (exit_qualification & 16) != 0;
1874
1875         if (string) {
1876                 if (emulate_instruction(vcpu, kvm_run, 0, 0) == EMULATE_DO_MMIO)
1877                         return 0;
1878                 return 1;
1879         }
1880
1881         size = (exit_qualification & 7) + 1;
1882         in = (exit_qualification & 8) != 0;
1883         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1884         rep = (exit_qualification & 32) != 0;
1885         port = exit_qualification >> 16;
1886
1887         return kvm_emulate_pio(vcpu, kvm_run, in, size, port);
1888 }
1889
1890 static void
1891 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1892 {
1893         /*
1894          * Patch in the VMCALL instruction:
1895          */
1896         hypercall[0] = 0x0f;
1897         hypercall[1] = 0x01;
1898         hypercall[2] = 0xc1;
1899 }
1900
1901 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1902 {
1903         unsigned long exit_qualification;
1904         int cr;
1905         int reg;
1906
1907         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
1908         cr = exit_qualification & 15;
1909         reg = (exit_qualification >> 8) & 15;
1910         switch ((exit_qualification >> 4) & 3) {
1911         case 0: /* mov to cr */
1912                 switch (cr) {
1913                 case 0:
1914                         vcpu_load_rsp_rip(vcpu);
1915                         set_cr0(vcpu, vcpu->regs[reg]);
1916                         skip_emulated_instruction(vcpu);
1917                         return 1;
1918                 case 3:
1919                         vcpu_load_rsp_rip(vcpu);
1920                         set_cr3(vcpu, vcpu->regs[reg]);
1921                         skip_emulated_instruction(vcpu);
1922                         return 1;
1923                 case 4:
1924                         vcpu_load_rsp_rip(vcpu);
1925                         set_cr4(vcpu, vcpu->regs[reg]);
1926                         skip_emulated_instruction(vcpu);
1927                         return 1;
1928                 case 8:
1929                         vcpu_load_rsp_rip(vcpu);
1930                         set_cr8(vcpu, vcpu->regs[reg]);
1931                         skip_emulated_instruction(vcpu);
1932                         kvm_run->exit_reason = KVM_EXIT_SET_TPR;
1933                         return 0;
1934                 };
1935                 break;
1936         case 2: /* clts */
1937                 vcpu_load_rsp_rip(vcpu);
1938                 vmx_fpu_deactivate(vcpu);
1939                 vcpu->cr0 &= ~X86_CR0_TS;
1940                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1941                 vmx_fpu_activate(vcpu);
1942                 skip_emulated_instruction(vcpu);
1943                 return 1;
1944         case 1: /*mov from cr*/
1945                 switch (cr) {
1946                 case 3:
1947                         vcpu_load_rsp_rip(vcpu);
1948                         vcpu->regs[reg] = vcpu->cr3;
1949                         vcpu_put_rsp_rip(vcpu);
1950                         skip_emulated_instruction(vcpu);
1951                         return 1;
1952                 case 8:
1953                         vcpu_load_rsp_rip(vcpu);
1954                         vcpu->regs[reg] = get_cr8(vcpu);
1955                         vcpu_put_rsp_rip(vcpu);
1956                         skip_emulated_instruction(vcpu);
1957                         return 1;
1958                 }
1959                 break;
1960         case 3: /* lmsw */
1961                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1962
1963                 skip_emulated_instruction(vcpu);
1964                 return 1;
1965         default:
1966                 break;
1967         }
1968         kvm_run->exit_reason = 0;
1969         pr_unimpl(vcpu, "unhandled control register: op %d cr %d\n",
1970                (int)(exit_qualification >> 4) & 3, cr);
1971         return 0;
1972 }
1973
1974 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1975 {
1976         unsigned long exit_qualification;
1977         unsigned long val;
1978         int dr, reg;
1979
1980         /*
1981          * FIXME: this code assumes the host is debugging the guest.
1982          *        need to deal with guest debugging itself too.
1983          */
1984         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
1985         dr = exit_qualification & 7;
1986         reg = (exit_qualification >> 8) & 15;
1987         vcpu_load_rsp_rip(vcpu);
1988         if (exit_qualification & 16) {
1989                 /* mov from dr */
1990                 switch (dr) {
1991                 case 6:
1992                         val = 0xffff0ff0;
1993                         break;
1994                 case 7:
1995                         val = 0x400;
1996                         break;
1997                 default:
1998                         val = 0;
1999                 }
2000                 vcpu->regs[reg] = val;
2001         } else {
2002                 /* mov to dr */
2003         }
2004         vcpu_put_rsp_rip(vcpu);
2005         skip_emulated_instruction(vcpu);
2006         return 1;
2007 }
2008
2009 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2010 {
2011         kvm_emulate_cpuid(vcpu);
2012         return 1;
2013 }
2014
2015 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2016 {
2017         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
2018         u64 data;
2019
2020         if (vmx_get_msr(vcpu, ecx, &data)) {
2021                 vmx_inject_gp(vcpu, 0);
2022                 return 1;
2023         }
2024
2025         /* FIXME: handling of bits 32:63 of rax, rdx */
2026         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
2027         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
2028         skip_emulated_instruction(vcpu);
2029         return 1;
2030 }
2031
2032 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2033 {
2034         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
2035         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
2036                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
2037
2038         if (vmx_set_msr(vcpu, ecx, data) != 0) {
2039                 vmx_inject_gp(vcpu, 0);
2040                 return 1;
2041         }
2042
2043         skip_emulated_instruction(vcpu);
2044         return 1;
2045 }
2046
2047 static int handle_tpr_below_threshold(struct kvm_vcpu *vcpu,
2048                                       struct kvm_run *kvm_run)
2049 {
2050         return 1;
2051 }
2052
2053 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
2054                                    struct kvm_run *kvm_run)
2055 {
2056         u32 cpu_based_vm_exec_control;
2057
2058         /* clear pending irq */
2059         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2060         cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
2061         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2062         /*
2063          * If the user space waits to inject interrupts, exit as soon as
2064          * possible
2065          */
2066         if (kvm_run->request_interrupt_window &&
2067             !vcpu->irq_summary) {
2068                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
2069                 ++vcpu->stat.irq_window_exits;
2070                 return 0;
2071         }
2072         return 1;
2073 }
2074
2075 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2076 {
2077         skip_emulated_instruction(vcpu);
2078         return kvm_emulate_halt(vcpu);
2079 }
2080
2081 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2082 {
2083         skip_emulated_instruction(vcpu);
2084         kvm_emulate_hypercall(vcpu);
2085         return 1;
2086 }
2087
2088 /*
2089  * The exit handlers return 1 if the exit was handled fully and guest execution
2090  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
2091  * to be done to userspace and return 0.
2092  */
2093 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
2094                                       struct kvm_run *kvm_run) = {
2095         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
2096         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
2097         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
2098         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
2099         [EXIT_REASON_CR_ACCESS]               = handle_cr,
2100         [EXIT_REASON_DR_ACCESS]               = handle_dr,
2101         [EXIT_REASON_CPUID]                   = handle_cpuid,
2102         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
2103         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
2104         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
2105         [EXIT_REASON_HLT]                     = handle_halt,
2106         [EXIT_REASON_VMCALL]                  = handle_vmcall,
2107         [EXIT_REASON_TPR_BELOW_THRESHOLD]     = handle_tpr_below_threshold
2108 };
2109
2110 static const int kvm_vmx_max_exit_handlers =
2111         ARRAY_SIZE(kvm_vmx_exit_handlers);
2112
2113 /*
2114  * The guest has exited.  See if we can fix it or if we need userspace
2115  * assistance.
2116  */
2117 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2118 {
2119         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2120         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
2121         struct vcpu_vmx *vmx = to_vmx(vcpu);
2122
2123         if (unlikely(vmx->fail)) {
2124                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2125                 kvm_run->fail_entry.hardware_entry_failure_reason
2126                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2127                 return 0;
2128         }
2129
2130         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
2131                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
2132                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
2133                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
2134         if (exit_reason < kvm_vmx_max_exit_handlers
2135             && kvm_vmx_exit_handlers[exit_reason])
2136                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
2137         else {
2138                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
2139                 kvm_run->hw.hardware_exit_reason = exit_reason;
2140         }
2141         return 0;
2142 }
2143
2144 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2145 {
2146 }
2147
2148 static void update_tpr_threshold(struct kvm_vcpu *vcpu)
2149 {
2150         int max_irr, tpr;
2151
2152         if (!vm_need_tpr_shadow(vcpu->kvm))
2153                 return;
2154
2155         if (!kvm_lapic_enabled(vcpu) ||
2156             ((max_irr = kvm_lapic_find_highest_irr(vcpu)) == -1)) {
2157                 vmcs_write32(TPR_THRESHOLD, 0);
2158                 return;
2159         }
2160
2161         tpr = (kvm_lapic_get_cr8(vcpu) & 0x0f) << 4;
2162         vmcs_write32(TPR_THRESHOLD, (max_irr > tpr) ? tpr >> 4 : max_irr >> 4);
2163 }
2164
2165 static void enable_irq_window(struct kvm_vcpu *vcpu)
2166 {
2167         u32 cpu_based_vm_exec_control;
2168
2169         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2170         cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
2171         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2172 }
2173
2174 static void vmx_intr_assist(struct kvm_vcpu *vcpu)
2175 {
2176         u32 idtv_info_field, intr_info_field;
2177         int has_ext_irq, interrupt_window_open;
2178         int vector;
2179
2180         kvm_inject_pending_timer_irqs(vcpu);
2181         update_tpr_threshold(vcpu);
2182
2183         has_ext_irq = kvm_cpu_has_interrupt(vcpu);
2184         intr_info_field = vmcs_read32(VM_ENTRY_INTR_INFO_FIELD);
2185         idtv_info_field = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2186         if (intr_info_field & INTR_INFO_VALID_MASK) {
2187                 if (idtv_info_field & INTR_INFO_VALID_MASK) {
2188                         /* TODO: fault when IDT_Vectoring */
2189                         printk(KERN_ERR "Fault when IDT_Vectoring\n");
2190                 }
2191                 if (has_ext_irq)
2192                         enable_irq_window(vcpu);
2193                 return;
2194         }
2195         if (unlikely(idtv_info_field & INTR_INFO_VALID_MASK)) {
2196                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, idtv_info_field);
2197                 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
2198                                 vmcs_read32(VM_EXIT_INSTRUCTION_LEN));
2199
2200                 if (unlikely(idtv_info_field & INTR_INFO_DELIEVER_CODE_MASK))
2201                         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
2202                                 vmcs_read32(IDT_VECTORING_ERROR_CODE));
2203                 if (unlikely(has_ext_irq))
2204                         enable_irq_window(vcpu);
2205                 return;
2206         }
2207         if (!has_ext_irq)
2208                 return;
2209         interrupt_window_open =
2210                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
2211                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
2212         if (interrupt_window_open) {
2213                 vector = kvm_cpu_get_interrupt(vcpu);
2214                 vmx_inject_irq(vcpu, vector);
2215                 kvm_timer_intr_post(vcpu, vector);
2216         } else
2217                 enable_irq_window(vcpu);
2218 }
2219
2220 static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2221 {
2222         struct vcpu_vmx *vmx = to_vmx(vcpu);
2223         u32 intr_info;
2224
2225         /*
2226          * Loading guest fpu may have cleared host cr0.ts
2227          */
2228         vmcs_writel(HOST_CR0, read_cr0());
2229
2230         asm (
2231                 /* Store host registers */
2232 #ifdef CONFIG_X86_64
2233                 "push %%rax; push %%rbx; push %%rdx;"
2234                 "push %%rsi; push %%rdi; push %%rbp;"
2235                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
2236                 "push %%r12; push %%r13; push %%r14; push %%r15;"
2237                 "push %%rcx \n\t"
2238                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2239 #else
2240                 "pusha; push %%ecx \n\t"
2241                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2242 #endif
2243                 /* Check if vmlaunch of vmresume is needed */
2244                 "cmp $0, %1 \n\t"
2245                 /* Load guest registers.  Don't clobber flags. */
2246 #ifdef CONFIG_X86_64
2247                 "mov %c[cr2](%3), %%rax \n\t"
2248                 "mov %%rax, %%cr2 \n\t"
2249                 "mov %c[rax](%3), %%rax \n\t"
2250                 "mov %c[rbx](%3), %%rbx \n\t"
2251                 "mov %c[rdx](%3), %%rdx \n\t"
2252                 "mov %c[rsi](%3), %%rsi \n\t"
2253                 "mov %c[rdi](%3), %%rdi \n\t"
2254                 "mov %c[rbp](%3), %%rbp \n\t"
2255                 "mov %c[r8](%3),  %%r8  \n\t"
2256                 "mov %c[r9](%3),  %%r9  \n\t"
2257                 "mov %c[r10](%3), %%r10 \n\t"
2258                 "mov %c[r11](%3), %%r11 \n\t"
2259                 "mov %c[r12](%3), %%r12 \n\t"
2260                 "mov %c[r13](%3), %%r13 \n\t"
2261                 "mov %c[r14](%3), %%r14 \n\t"
2262                 "mov %c[r15](%3), %%r15 \n\t"
2263                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2264 #else
2265                 "mov %c[cr2](%3), %%eax \n\t"
2266                 "mov %%eax,   %%cr2 \n\t"
2267                 "mov %c[rax](%3), %%eax \n\t"
2268                 "mov %c[rbx](%3), %%ebx \n\t"
2269                 "mov %c[rdx](%3), %%edx \n\t"
2270                 "mov %c[rsi](%3), %%esi \n\t"
2271                 "mov %c[rdi](%3), %%edi \n\t"
2272                 "mov %c[rbp](%3), %%ebp \n\t"
2273                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2274 #endif
2275                 /* Enter guest mode */
2276                 "jne .Llaunched \n\t"
2277                 ASM_VMX_VMLAUNCH "\n\t"
2278                 "jmp .Lkvm_vmx_return \n\t"
2279                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2280                 ".Lkvm_vmx_return: "
2281                 /* Save guest registers, load host registers, keep flags */
2282 #ifdef CONFIG_X86_64
2283                 "xchg %3,     (%%rsp) \n\t"
2284                 "mov %%rax, %c[rax](%3) \n\t"
2285                 "mov %%rbx, %c[rbx](%3) \n\t"
2286                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2287                 "mov %%rdx, %c[rdx](%3) \n\t"
2288                 "mov %%rsi, %c[rsi](%3) \n\t"
2289                 "mov %%rdi, %c[rdi](%3) \n\t"
2290                 "mov %%rbp, %c[rbp](%3) \n\t"
2291                 "mov %%r8,  %c[r8](%3) \n\t"
2292                 "mov %%r9,  %c[r9](%3) \n\t"
2293                 "mov %%r10, %c[r10](%3) \n\t"
2294                 "mov %%r11, %c[r11](%3) \n\t"
2295                 "mov %%r12, %c[r12](%3) \n\t"
2296                 "mov %%r13, %c[r13](%3) \n\t"
2297                 "mov %%r14, %c[r14](%3) \n\t"
2298                 "mov %%r15, %c[r15](%3) \n\t"
2299                 "mov %%cr2, %%rax   \n\t"
2300                 "mov %%rax, %c[cr2](%3) \n\t"
2301                 "mov (%%rsp), %3 \n\t"
2302
2303                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2304                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2305                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2306                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2307 #else
2308                 "xchg %3, (%%esp) \n\t"
2309                 "mov %%eax, %c[rax](%3) \n\t"
2310                 "mov %%ebx, %c[rbx](%3) \n\t"
2311                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2312                 "mov %%edx, %c[rdx](%3) \n\t"
2313                 "mov %%esi, %c[rsi](%3) \n\t"
2314                 "mov %%edi, %c[rdi](%3) \n\t"
2315                 "mov %%ebp, %c[rbp](%3) \n\t"
2316                 "mov %%cr2, %%eax  \n\t"
2317                 "mov %%eax, %c[cr2](%3) \n\t"
2318                 "mov (%%esp), %3 \n\t"
2319
2320                 "pop %%ecx; popa \n\t"
2321 #endif
2322                 "setbe %0 \n\t"
2323               : "=q" (vmx->fail)
2324               : "r"(vmx->launched), "d"((unsigned long)HOST_RSP),
2325                 "c"(vcpu),
2326                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2327                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2328                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2329                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2330                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2331                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2332                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2333 #ifdef CONFIG_X86_64
2334                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2335                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2336                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2337                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2338                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2339                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2340                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2341                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2342 #endif
2343                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2344               : "cc", "memory" );
2345
2346         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2347
2348         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2349         vmx->launched = 1;
2350
2351         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
2352
2353         /* We need to handle NMIs before interrupts are enabled */
2354         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) /* nmi */
2355                 asm("int $2");
2356 }
2357
2358 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2359                                   unsigned long addr,
2360                                   u32 err_code)
2361 {
2362         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2363
2364         ++vcpu->stat.pf_guest;
2365
2366         if (is_page_fault(vect_info)) {
2367                 printk(KERN_DEBUG "inject_page_fault: "
2368                        "double fault 0x%lx @ 0x%lx\n",
2369                        addr, vmcs_readl(GUEST_RIP));
2370                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2371                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2372                              DF_VECTOR |
2373                              INTR_TYPE_EXCEPTION |
2374                              INTR_INFO_DELIEVER_CODE_MASK |
2375                              INTR_INFO_VALID_MASK);
2376                 return;
2377         }
2378         vcpu->cr2 = addr;
2379         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2380         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2381                      PF_VECTOR |
2382                      INTR_TYPE_EXCEPTION |
2383                      INTR_INFO_DELIEVER_CODE_MASK |
2384                      INTR_INFO_VALID_MASK);
2385
2386 }
2387
2388 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2389 {
2390         struct vcpu_vmx *vmx = to_vmx(vcpu);
2391
2392         if (vmx->vmcs) {
2393                 on_each_cpu(__vcpu_clear, vmx, 0, 1);
2394                 free_vmcs(vmx->vmcs);
2395                 vmx->vmcs = NULL;
2396         }
2397 }
2398
2399 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2400 {
2401         struct vcpu_vmx *vmx = to_vmx(vcpu);
2402
2403         vmx_free_vmcs(vcpu);
2404         kfree(vmx->host_msrs);
2405         kfree(vmx->guest_msrs);
2406         kvm_vcpu_uninit(vcpu);
2407         kmem_cache_free(kvm_vcpu_cache, vmx);
2408 }
2409
2410 static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
2411 {
2412         int err;
2413         struct vcpu_vmx *vmx = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
2414         int cpu;
2415
2416         if (!vmx)
2417                 return ERR_PTR(-ENOMEM);
2418
2419         err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
2420         if (err)
2421                 goto free_vcpu;
2422
2423         if (irqchip_in_kernel(kvm)) {
2424                 err = kvm_create_lapic(&vmx->vcpu);
2425                 if (err < 0)
2426                         goto free_vcpu;
2427         }
2428
2429         vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2430         if (!vmx->guest_msrs) {
2431                 err = -ENOMEM;
2432                 goto uninit_vcpu;
2433         }
2434
2435         vmx->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2436         if (!vmx->host_msrs)
2437                 goto free_guest_msrs;
2438
2439         vmx->vmcs = alloc_vmcs();
2440         if (!vmx->vmcs)
2441                 goto free_msrs;
2442
2443         vmcs_clear(vmx->vmcs);
2444
2445         cpu = get_cpu();
2446         vmx_vcpu_load(&vmx->vcpu, cpu);
2447         err = vmx_vcpu_setup(vmx);
2448         vmx_vcpu_put(&vmx->vcpu);
2449         put_cpu();
2450         if (err)
2451                 goto free_vmcs;
2452
2453         return &vmx->vcpu;
2454
2455 free_vmcs:
2456         free_vmcs(vmx->vmcs);
2457 free_msrs:
2458         kfree(vmx->host_msrs);
2459 free_guest_msrs:
2460         kfree(vmx->guest_msrs);
2461 uninit_vcpu:
2462         kvm_vcpu_uninit(&vmx->vcpu);
2463 free_vcpu:
2464         kmem_cache_free(kvm_vcpu_cache, vmx);
2465         return ERR_PTR(err);
2466 }
2467
2468 static void __init vmx_check_processor_compat(void *rtn)
2469 {
2470         struct vmcs_config vmcs_conf;
2471
2472         *(int *)rtn = 0;
2473         if (setup_vmcs_config(&vmcs_conf) < 0)
2474                 *(int *)rtn = -EIO;
2475         if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
2476                 printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
2477                                 smp_processor_id());
2478                 *(int *)rtn = -EIO;
2479         }
2480 }
2481
2482 static struct kvm_x86_ops vmx_x86_ops = {
2483         .cpu_has_kvm_support = cpu_has_kvm_support,
2484         .disabled_by_bios = vmx_disabled_by_bios,
2485         .hardware_setup = hardware_setup,
2486         .hardware_unsetup = hardware_unsetup,
2487         .check_processor_compatibility = vmx_check_processor_compat,
2488         .hardware_enable = hardware_enable,
2489         .hardware_disable = hardware_disable,
2490
2491         .vcpu_create = vmx_create_vcpu,
2492         .vcpu_free = vmx_free_vcpu,
2493         .vcpu_reset = vmx_vcpu_reset,
2494
2495         .prepare_guest_switch = vmx_save_host_state,
2496         .vcpu_load = vmx_vcpu_load,
2497         .vcpu_put = vmx_vcpu_put,
2498         .vcpu_decache = vmx_vcpu_decache,
2499
2500         .set_guest_debug = set_guest_debug,
2501         .guest_debug_pre = kvm_guest_debug_pre,
2502         .get_msr = vmx_get_msr,
2503         .set_msr = vmx_set_msr,
2504         .get_segment_base = vmx_get_segment_base,
2505         .get_segment = vmx_get_segment,
2506         .set_segment = vmx_set_segment,
2507         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2508         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2509         .set_cr0 = vmx_set_cr0,
2510         .set_cr3 = vmx_set_cr3,
2511         .set_cr4 = vmx_set_cr4,
2512 #ifdef CONFIG_X86_64
2513         .set_efer = vmx_set_efer,
2514 #endif
2515         .get_idt = vmx_get_idt,
2516         .set_idt = vmx_set_idt,
2517         .get_gdt = vmx_get_gdt,
2518         .set_gdt = vmx_set_gdt,
2519         .cache_regs = vcpu_load_rsp_rip,
2520         .decache_regs = vcpu_put_rsp_rip,
2521         .get_rflags = vmx_get_rflags,
2522         .set_rflags = vmx_set_rflags,
2523
2524         .tlb_flush = vmx_flush_tlb,
2525         .inject_page_fault = vmx_inject_page_fault,
2526
2527         .inject_gp = vmx_inject_gp,
2528
2529         .run = vmx_vcpu_run,
2530         .handle_exit = kvm_handle_exit,
2531         .skip_emulated_instruction = skip_emulated_instruction,
2532         .patch_hypercall = vmx_patch_hypercall,
2533         .get_irq = vmx_get_irq,
2534         .set_irq = vmx_inject_irq,
2535         .inject_pending_irq = vmx_intr_assist,
2536         .inject_pending_vectors = do_interrupt_requests,
2537 };
2538
2539 static int __init vmx_init(void)
2540 {
2541         void *iova;
2542         int r;
2543
2544         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2545         if (!vmx_io_bitmap_a)
2546                 return -ENOMEM;
2547
2548         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2549         if (!vmx_io_bitmap_b) {
2550                 r = -ENOMEM;
2551                 goto out;
2552         }
2553
2554         /*
2555          * Allow direct access to the PC debug port (it is often used for I/O
2556          * delays, but the vmexits simply slow things down).
2557          */
2558         iova = kmap(vmx_io_bitmap_a);
2559         memset(iova, 0xff, PAGE_SIZE);
2560         clear_bit(0x80, iova);
2561         kunmap(vmx_io_bitmap_a);
2562
2563         iova = kmap(vmx_io_bitmap_b);
2564         memset(iova, 0xff, PAGE_SIZE);
2565         kunmap(vmx_io_bitmap_b);
2566
2567         r = kvm_init_x86(&vmx_x86_ops, sizeof(struct vcpu_vmx), THIS_MODULE);
2568         if (r)
2569                 goto out1;
2570
2571         return 0;
2572
2573 out1:
2574         __free_page(vmx_io_bitmap_b);
2575 out:
2576         __free_page(vmx_io_bitmap_a);
2577         return r;
2578 }
2579
2580 static void __exit vmx_exit(void)
2581 {
2582         __free_page(vmx_io_bitmap_b);
2583         __free_page(vmx_io_bitmap_a);
2584
2585         kvm_exit_x86();
2586 }
2587
2588 module_init(vmx_init)
2589 module_exit(vmx_exit)