drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "x86_emulate.h"
  20 #include "vmx.h"
  21 #include "segment_descriptor.h"
  22
  23 #include <linux/module.h>
  24 #include <linux/kernel.h>
  25 #include <linux/mm.h>
  26 #include <linux/highmem.h>
  27 #include <linux/profile.h>
  28 #include <linux/sched.h>
  29
  30 #include <asm/io.h>
  31 #include <asm/desc.h>
  32
  33 MODULE_AUTHOR("Qumranet");
  34 MODULE_LICENSE("GPL");
  35
  36 struct vmcs {
  37         u32 revision_id;
  38         u32 abort;
  39         char data[0];
  40 };
  41
  42 struct vcpu_vmx {
  43         struct kvm_vcpu       vcpu;
  44         int                   launched;
  45         struct kvm_msr_entry *guest_msrs;
  46         struct kvm_msr_entry *host_msrs;
  47         int                   nmsrs;
  48         int                   save_nmsrs;
  49         int                   msr_offset_efer;
  50 #ifdef CONFIG_X86_64
  51         int                   msr_offset_kernel_gs_base;
  52 #endif
  53         struct vmcs          *vmcs;
  54         struct {
  55                 int           loaded;
  56                 u16           fs_sel, gs_sel, ldt_sel;
  57                 int           fs_gs_ldt_reload_needed;
  58         }host_state;
  59
  60 };
  61
  62 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
  63 {
  64         return container_of(vcpu, struct vcpu_vmx, vcpu);
  65 }
  66
  67 static int init_rmode_tss(struct kvm *kvm);
  68
  69 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  70 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  71
  72 static struct page *vmx_io_bitmap_a;
  73 static struct page *vmx_io_bitmap_b;
  74
  75 #define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
  76
  77 static struct vmcs_config {
  78         int size;
  79         int order;
  80         u32 revision_id;
  81         u32 pin_based_exec_ctrl;
  82         u32 cpu_based_exec_ctrl;
  83         u32 vmexit_ctrl;
  84         u32 vmentry_ctrl;
  85 } vmcs_config;
  86
  87 #define VMX_SEGMENT_FIELD(seg)                                  \
  88         [VCPU_SREG_##seg] = {                                   \
  89                 .selector = GUEST_##seg##_SELECTOR,             \
  90                 .base = GUEST_##seg##_BASE,                     \
  91                 .limit = GUEST_##seg##_LIMIT,                   \
  92                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  93         }
  94
  95 static struct kvm_vmx_segment_field {
  96         unsigned selector;
  97         unsigned base;
  98         unsigned limit;
  99         unsigned ar_bytes;
 100 } kvm_vmx_segment_fields[] = {
 101         VMX_SEGMENT_FIELD(CS),
 102         VMX_SEGMENT_FIELD(DS),
 103         VMX_SEGMENT_FIELD(ES),
 104         VMX_SEGMENT_FIELD(FS),
 105         VMX_SEGMENT_FIELD(GS),
 106         VMX_SEGMENT_FIELD(SS),
 107         VMX_SEGMENT_FIELD(TR),
 108         VMX_SEGMENT_FIELD(LDTR),
 109 };
 110
 111 /*
 112  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
 113  * away by decrementing the array size.
 114  */
 115 static const u32 vmx_msr_index[] = {
 116 #ifdef CONFIG_X86_64
 117         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
 118 #endif
 119         MSR_EFER, MSR_K6_STAR,
 120 };
 121 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
 122
 123 static void load_msrs(struct kvm_msr_entry *e, int n)
 124 {
 125         int i;
 126
 127         for (i = 0; i < n; ++i)
 128                 wrmsrl(e[i].index, e[i].data);
 129 }
 130
 131 static void save_msrs(struct kvm_msr_entry *e, int n)
 132 {
 133         int i;
 134
 135         for (i = 0; i < n; ++i)
 136                 rdmsrl(e[i].index, e[i].data);
 137 }
 138
 139 static inline u64 msr_efer_save_restore_bits(struct kvm_msr_entry msr)
 140 {
 141         return (u64)msr.data & EFER_SAVE_RESTORE_BITS;
 142 }
 143
 144 static inline int msr_efer_need_save_restore(struct vcpu_vmx *vmx)
 145 {
 146         int efer_offset = vmx->msr_offset_efer;
 147         return msr_efer_save_restore_bits(vmx->host_msrs[efer_offset]) !=
 148                 msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 149 }
 150
 151 static inline int is_page_fault(u32 intr_info)
 152 {
 153         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 154                              INTR_INFO_VALID_MASK)) ==
 155                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 156 }
 157
 158 static inline int is_no_device(u32 intr_info)
 159 {
 160         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 161                              INTR_INFO_VALID_MASK)) ==
 162                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 163 }
 164
 165 static inline int is_external_interrupt(u32 intr_info)
 166 {
 167         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 168                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 169 }
 170
 171 static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
 172 {
 173         int i;
 174
 175         for (i = 0; i < vmx->nmsrs; ++i)
 176                 if (vmx->guest_msrs[i].index == msr)
 177                         return i;
 178         return -1;
 179 }
 180
 181 static struct kvm_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
 182 {
 183         int i;
 184
 185         i = __find_msr_index(vmx, msr);
 186         if (i >= 0)
 187                 return &vmx->guest_msrs[i];
 188         return NULL;
 189 }
 190
 191 static void vmcs_clear(struct vmcs *vmcs)
 192 {
 193         u64 phys_addr = __pa(vmcs);
 194         u8 error;
 195
 196         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 197                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 198                       : "cc", "memory");
 199         if (error)
 200                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 201                        vmcs, phys_addr);
 202 }
 203
 204 static void __vcpu_clear(void *arg)
 205 {
 206         struct vcpu_vmx *vmx = arg;
 207         int cpu = raw_smp_processor_id();
 208
 209         if (vmx->vcpu.cpu == cpu)
 210                 vmcs_clear(vmx->vmcs);
 211         if (per_cpu(current_vmcs, cpu) == vmx->vmcs)
 212                 per_cpu(current_vmcs, cpu) = NULL;
 213         rdtscll(vmx->vcpu.host_tsc);
 214 }
 215
 216 static void vcpu_clear(struct vcpu_vmx *vmx)
 217 {
 218         if (vmx->vcpu.cpu != raw_smp_processor_id() && vmx->vcpu.cpu != -1)
 219                 smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear,
 220                                          vmx, 0, 1);
 221         else
 222                 __vcpu_clear(vmx);
 223         vmx->launched = 0;
 224 }
 225
 226 static unsigned long vmcs_readl(unsigned long field)
 227 {
 228         unsigned long value;
 229
 230         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 231                       : "=a"(value) : "d"(field) : "cc");
 232         return value;
 233 }
 234
 235 static u16 vmcs_read16(unsigned long field)
 236 {
 237         return vmcs_readl(field);
 238 }
 239
 240 static u32 vmcs_read32(unsigned long field)
 241 {
 242         return vmcs_readl(field);
 243 }
 244
 245 static u64 vmcs_read64(unsigned long field)
 246 {
 247 #ifdef CONFIG_X86_64
 248         return vmcs_readl(field);
 249 #else
 250         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 251 #endif
 252 }
 253
 254 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 255 {
 256         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 257                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 258         dump_stack();
 259 }
 260
 261 static void vmcs_writel(unsigned long field, unsigned long value)
 262 {
 263         u8 error;
 264
 265         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 266                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 267         if (unlikely(error))
 268                 vmwrite_error(field, value);
 269 }
 270
 271 static void vmcs_write16(unsigned long field, u16 value)
 272 {
 273         vmcs_writel(field, value);
 274 }
 275
 276 static void vmcs_write32(unsigned long field, u32 value)
 277 {
 278         vmcs_writel(field, value);
 279 }
 280
 281 static void vmcs_write64(unsigned long field, u64 value)
 282 {
 283 #ifdef CONFIG_X86_64
 284         vmcs_writel(field, value);
 285 #else
 286         vmcs_writel(field, value);
 287         asm volatile ("");
 288         vmcs_writel(field+1, value >> 32);
 289 #endif
 290 }
 291
 292 static void vmcs_clear_bits(unsigned long field, u32 mask)
 293 {
 294         vmcs_writel(field, vmcs_readl(field) & ~mask);
 295 }
 296
 297 static void vmcs_set_bits(unsigned long field, u32 mask)
 298 {
 299         vmcs_writel(field, vmcs_readl(field) | mask);
 300 }
 301
 302 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 303 {
 304         u32 eb;
 305
 306         eb = 1u << PF_VECTOR;
 307         if (!vcpu->fpu_active)
 308                 eb |= 1u << NM_VECTOR;
 309         if (vcpu->guest_debug.enabled)
 310                 eb |= 1u << 1;
 311         if (vcpu->rmode.active)
 312                 eb = ~0;
 313         vmcs_write32(EXCEPTION_BITMAP, eb);
 314 }
 315
 316 static void reload_tss(void)
 317 {
 318 #ifndef CONFIG_X86_64
 319
 320         /*
 321          * VT restores TR but not its size.  Useless.
 322          */
 323         struct descriptor_table gdt;
 324         struct segment_descriptor *descs;
 325
 326         get_gdt(&gdt);
 327         descs = (void *)gdt.base;
 328         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 329         load_TR_desc();
 330 #endif
 331 }
 332
 333 static void load_transition_efer(struct vcpu_vmx *vmx)
 334 {
 335         u64 trans_efer;
 336         int efer_offset = vmx->msr_offset_efer;
 337
 338         trans_efer = vmx->host_msrs[efer_offset].data;
 339         trans_efer &= ~EFER_SAVE_RESTORE_BITS;
 340         trans_efer |= msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 341         wrmsrl(MSR_EFER, trans_efer);
 342         vmx->vcpu.stat.efer_reload++;
 343 }
 344
 345 static void vmx_save_host_state(struct vcpu_vmx *vmx)
 346 {
 347         if (vmx->host_state.loaded)
 348                 return;
 349
 350         vmx->host_state.loaded = 1;
 351         /*
 352          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 353          * allow segment selectors with cpl > 0 or ti == 1.
 354          */
 355         vmx->host_state.ldt_sel = read_ldt();
 356         vmx->host_state.fs_gs_ldt_reload_needed = vmx->host_state.ldt_sel;
 357         vmx->host_state.fs_sel = read_fs();
 358         if (!(vmx->host_state.fs_sel & 7))
 359                 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
 360         else {
 361                 vmcs_write16(HOST_FS_SELECTOR, 0);
 362                 vmx->host_state.fs_gs_ldt_reload_needed = 1;
 363         }
 364         vmx->host_state.gs_sel = read_gs();
 365         if (!(vmx->host_state.gs_sel & 7))
 366                 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
 367         else {
 368                 vmcs_write16(HOST_GS_SELECTOR, 0);
 369                 vmx->host_state.fs_gs_ldt_reload_needed = 1;
 370         }
 371
 372 #ifdef CONFIG_X86_64
 373         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 374         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 375 #else
 376         vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
 377         vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
 378 #endif
 379
 380 #ifdef CONFIG_X86_64
 381         if (is_long_mode(&vmx->vcpu)) {
 382                 save_msrs(vmx->host_msrs +
 383                           vmx->msr_offset_kernel_gs_base, 1);
 384         }
 385 #endif
 386         load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 387         if (msr_efer_need_save_restore(vmx))
 388                 load_transition_efer(vmx);
 389 }
 390
 391 static void vmx_load_host_state(struct vcpu_vmx *vmx)
 392 {
 393         unsigned long flags;
 394
 395         if (!vmx->host_state.loaded)
 396                 return;
 397
 398         vmx->host_state.loaded = 0;
 399         if (vmx->host_state.fs_gs_ldt_reload_needed) {
 400                 load_ldt(vmx->host_state.ldt_sel);
 401                 load_fs(vmx->host_state.fs_sel);
 402                 /*
 403                  * If we have to reload gs, we must take care to
 404                  * preserve our gs base.
 405                  */
 406                 local_irq_save(flags);
 407                 load_gs(vmx->host_state.gs_sel);
 408 #ifdef CONFIG_X86_64
 409                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 410 #endif
 411                 local_irq_restore(flags);
 412
 413                 reload_tss();
 414         }
 415         save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 416         load_msrs(vmx->host_msrs, vmx->save_nmsrs);
 417         if (msr_efer_need_save_restore(vmx))
 418                 load_msrs(vmx->host_msrs + vmx->msr_offset_efer, 1);
 419 }
 420
 421 /*
 422  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 423  * vcpu mutex is already taken.
 424  */
 425 static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 426 {
 427         struct vcpu_vmx *vmx = to_vmx(vcpu);
 428         u64 phys_addr = __pa(vmx->vmcs);
 429         u64 tsc_this, delta;
 430
 431         if (vcpu->cpu != cpu)
 432                 vcpu_clear(vmx);
 433
 434         if (per_cpu(current_vmcs, cpu) != vmx->vmcs) {
 435                 u8 error;
 436
 437                 per_cpu(current_vmcs, cpu) = vmx->vmcs;
 438                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 439                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 440                               : "cc");
 441                 if (error)
 442                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 443                                vmx->vmcs, phys_addr);
 444         }
 445
 446         if (vcpu->cpu != cpu) {
 447                 struct descriptor_table dt;
 448                 unsigned long sysenter_esp;
 449
 450                 vcpu->cpu = cpu;
 451                 /*
 452                  * Linux uses per-cpu TSS and GDT, so set these when switching
 453                  * processors.
 454                  */
 455                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 456                 get_gdt(&dt);
 457                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 458
 459                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 460                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 461
 462                 /*
 463                  * Make sure the time stamp counter is monotonous.
 464                  */
 465                 rdtscll(tsc_this);
 466                 delta = vcpu->host_tsc - tsc_this;
 467                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 468         }
 469 }
 470
 471 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 472 {
 473         vmx_load_host_state(to_vmx(vcpu));
 474         kvm_put_guest_fpu(vcpu);
 475 }
 476
 477 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 478 {
 479         if (vcpu->fpu_active)
 480                 return;
 481         vcpu->fpu_active = 1;
 482         vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
 483         if (vcpu->cr0 & X86_CR0_TS)
 484                 vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 485         update_exception_bitmap(vcpu);
 486 }
 487
 488 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 489 {
 490         if (!vcpu->fpu_active)
 491                 return;
 492         vcpu->fpu_active = 0;
 493         vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 494         update_exception_bitmap(vcpu);
 495 }
 496
 497 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 498 {
 499         vcpu_clear(to_vmx(vcpu));
 500 }
 501
 502 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 503 {
 504         return vmcs_readl(GUEST_RFLAGS);
 505 }
 506
 507 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 508 {
 509         vmcs_writel(GUEST_RFLAGS, rflags);
 510 }
 511
 512 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 513 {
 514         unsigned long rip;
 515         u32 interruptibility;
 516
 517         rip = vmcs_readl(GUEST_RIP);
 518         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 519         vmcs_writel(GUEST_RIP, rip);
 520
 521         /*
 522          * We emulated an instruction, so temporary interrupt blocking
 523          * should be removed, if set.
 524          */
 525         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 526         if (interruptibility & 3)
 527                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 528                              interruptibility & ~3);
 529         vcpu->interrupt_window_open = 1;
 530 }
 531
 532 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 533 {
 534         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 535                vmcs_readl(GUEST_RIP));
 536         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 537         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 538                      GP_VECTOR |
 539                      INTR_TYPE_EXCEPTION |
 540                      INTR_INFO_DELIEVER_CODE_MASK |
 541                      INTR_INFO_VALID_MASK);
 542 }
 543
 544 /*
 545  * Swap MSR entry in host/guest MSR entry array.
 546  */
 547 static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
 548 {
 549         struct kvm_msr_entry tmp;
 550
 551         tmp = vmx->guest_msrs[to];
 552         vmx->guest_msrs[to] = vmx->guest_msrs[from];
 553         vmx->guest_msrs[from] = tmp;
 554         tmp = vmx->host_msrs[to];
 555         vmx->host_msrs[to] = vmx->host_msrs[from];
 556         vmx->host_msrs[from] = tmp;
 557 }
 558
 559 /*
 560  * Set up the vmcs to automatically save and restore system
 561  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 562  * mode, as fiddling with msrs is very expensive.
 563  */
 564 static void setup_msrs(struct vcpu_vmx *vmx)
 565 {
 566         int save_nmsrs;
 567
 568         save_nmsrs = 0;
 569 #ifdef CONFIG_X86_64
 570         if (is_long_mode(&vmx->vcpu)) {
 571                 int index;
 572
 573                 index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
 574                 if (index >= 0)
 575                         move_msr_up(vmx, index, save_nmsrs++);
 576                 index = __find_msr_index(vmx, MSR_LSTAR);
 577                 if (index >= 0)
 578                         move_msr_up(vmx, index, save_nmsrs++);
 579                 index = __find_msr_index(vmx, MSR_CSTAR);
 580                 if (index >= 0)
 581                         move_msr_up(vmx, index, save_nmsrs++);
 582                 index = __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 583                 if (index >= 0)
 584                         move_msr_up(vmx, index, save_nmsrs++);
 585                 /*
 586                  * MSR_K6_STAR is only needed on long mode guests, and only
 587                  * if efer.sce is enabled.
 588                  */
 589                 index = __find_msr_index(vmx, MSR_K6_STAR);
 590                 if ((index >= 0) && (vmx->vcpu.shadow_efer & EFER_SCE))
 591                         move_msr_up(vmx, index, save_nmsrs++);
 592         }
 593 #endif
 594         vmx->save_nmsrs = save_nmsrs;
 595
 596 #ifdef CONFIG_X86_64
 597         vmx->msr_offset_kernel_gs_base =
 598                 __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 599 #endif
 600         vmx->msr_offset_efer = __find_msr_index(vmx, MSR_EFER);
 601 }
 602
 603 /*
 604  * reads and returns guest's timestamp counter "register"
 605  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 606  */
 607 static u64 guest_read_tsc(void)
 608 {
 609         u64 host_tsc, tsc_offset;
 610
 611         rdtscll(host_tsc);
 612         tsc_offset = vmcs_read64(TSC_OFFSET);
 613         return host_tsc + tsc_offset;
 614 }
 615
 616 /*
 617  * writes 'guest_tsc' into guest's timestamp counter "register"
 618  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 619  */
 620 static void guest_write_tsc(u64 guest_tsc)
 621 {
 622         u64 host_tsc;
 623
 624         rdtscll(host_tsc);
 625         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 626 }
 627
 628 /*
 629  * Reads an msr value (of 'msr_index') into 'pdata'.
 630  * Returns 0 on success, non-0 otherwise.
 631  * Assumes vcpu_load() was already called.
 632  */
 633 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 634 {
 635         u64 data;
 636         struct kvm_msr_entry *msr;
 637
 638         if (!pdata) {
 639                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 640                 return -EINVAL;
 641         }
 642
 643         switch (msr_index) {
 644 #ifdef CONFIG_X86_64
 645         case MSR_FS_BASE:
 646                 data = vmcs_readl(GUEST_FS_BASE);
 647                 break;
 648         case MSR_GS_BASE:
 649                 data = vmcs_readl(GUEST_GS_BASE);
 650                 break;
 651         case MSR_EFER:
 652                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 653 #endif
 654         case MSR_IA32_TIME_STAMP_COUNTER:
 655                 data = guest_read_tsc();
 656                 break;
 657         case MSR_IA32_SYSENTER_CS:
 658                 data = vmcs_read32(GUEST_SYSENTER_CS);
 659                 break;
 660         case MSR_IA32_SYSENTER_EIP:
 661                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 662                 break;
 663         case MSR_IA32_SYSENTER_ESP:
 664                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 665                 break;
 666         default:
 667                 msr = find_msr_entry(to_vmx(vcpu), msr_index);
 668                 if (msr) {
 669                         data = msr->data;
 670                         break;
 671                 }
 672                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 673         }
 674
 675         *pdata = data;
 676         return 0;
 677 }
 678
 679 /*
 680  * Writes msr value into into the appropriate "register".
 681  * Returns 0 on success, non-0 otherwise.
 682  * Assumes vcpu_load() was already called.
 683  */
 684 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 685 {
 686         struct vcpu_vmx *vmx = to_vmx(vcpu);
 687         struct kvm_msr_entry *msr;
 688         int ret = 0;
 689
 690         switch (msr_index) {
 691 #ifdef CONFIG_X86_64
 692         case MSR_EFER:
 693                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 694                 if (vmx->host_state.loaded)
 695                         load_transition_efer(vmx);
 696                 break;
 697         case MSR_FS_BASE:
 698                 vmcs_writel(GUEST_FS_BASE, data);
 699                 break;
 700         case MSR_GS_BASE:
 701                 vmcs_writel(GUEST_GS_BASE, data);
 702                 break;
 703 #endif
 704         case MSR_IA32_SYSENTER_CS:
 705                 vmcs_write32(GUEST_SYSENTER_CS, data);
 706                 break;
 707         case MSR_IA32_SYSENTER_EIP:
 708                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 709                 break;
 710         case MSR_IA32_SYSENTER_ESP:
 711                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 712                 break;
 713         case MSR_IA32_TIME_STAMP_COUNTER:
 714                 guest_write_tsc(data);
 715                 break;
 716         default:
 717                 msr = find_msr_entry(vmx, msr_index);
 718                 if (msr) {
 719                         msr->data = data;
 720                         if (vmx->host_state.loaded)
 721                                 load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 722                         break;
 723                 }
 724                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 725         }
 726
 727         return ret;
 728 }
 729
 730 /*
 731  * Sync the rsp and rip registers into the vcpu structure.  This allows
 732  * registers to be accessed by indexing vcpu->regs.
 733  */
 734 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 735 {
 736         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 737         vcpu->rip = vmcs_readl(GUEST_RIP);
 738 }
 739
 740 /*
 741  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 742  * modification.
 743  */
 744 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 745 {
 746         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 747         vmcs_writel(GUEST_RIP, vcpu->rip);
 748 }
 749
 750 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 751 {
 752         unsigned long dr7 = 0x400;
 753         int old_singlestep;
 754
 755         old_singlestep = vcpu->guest_debug.singlestep;
 756
 757         vcpu->guest_debug.enabled = dbg->enabled;
 758         if (vcpu->guest_debug.enabled) {
 759                 int i;
 760
 761                 dr7 |= 0x200;  /* exact */
 762                 for (i = 0; i < 4; ++i) {
 763                         if (!dbg->breakpoints[i].enabled)
 764                                 continue;
 765                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 766                         dr7 |= 2 << (i*2);    /* global enable */
 767                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 768                 }
 769
 770                 vcpu->guest_debug.singlestep = dbg->singlestep;
 771         } else
 772                 vcpu->guest_debug.singlestep = 0;
 773
 774         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 775                 unsigned long flags;
 776
 777                 flags = vmcs_readl(GUEST_RFLAGS);
 778                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 779                 vmcs_writel(GUEST_RFLAGS, flags);
 780         }
 781
 782         update_exception_bitmap(vcpu);
 783         vmcs_writel(GUEST_DR7, dr7);
 784
 785         return 0;
 786 }
 787
 788 static __init int cpu_has_kvm_support(void)
 789 {
 790         unsigned long ecx = cpuid_ecx(1);
 791         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 792 }
 793
 794 static __init int vmx_disabled_by_bios(void)
 795 {
 796         u64 msr;
 797
 798         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 799         return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 800                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 801             == MSR_IA32_FEATURE_CONTROL_LOCKED;
 802         /* locked but not enabled */
 803 }
 804
 805 static void hardware_enable(void *garbage)
 806 {
 807         int cpu = raw_smp_processor_id();
 808         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 809         u64 old;
 810
 811         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 812         if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 813                     MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 814             != (MSR_IA32_FEATURE_CONTROL_LOCKED |
 815                 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 816                 /* enable and lock */
 817                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
 818                        MSR_IA32_FEATURE_CONTROL_LOCKED |
 819                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);
 820         write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
 821         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 822                       : "memory", "cc");
 823 }
 824
 825 static void hardware_disable(void *garbage)
 826 {
 827         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 828 }
 829
 830 static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
 831                                       u32 msr, u32* result)
 832 {
 833         u32 vmx_msr_low, vmx_msr_high;
 834         u32 ctl = ctl_min | ctl_opt;
 835
 836         rdmsr(msr, vmx_msr_low, vmx_msr_high);
 837
 838         ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
 839         ctl |= vmx_msr_low;  /* bit == 1 in low word  ==> must be one  */
 840
 841         /* Ensure minimum (required) set of control bits are supported. */
 842         if (ctl_min & ~ctl)
 843                 return -1;
 844
 845         *result = ctl;
 846         return 0;
 847 }
 848
 849 static __init int setup_vmcs_config(void)
 850 {
 851         u32 vmx_msr_low, vmx_msr_high;
 852         u32 min, opt;
 853         u32 _pin_based_exec_control = 0;
 854         u32 _cpu_based_exec_control = 0;
 855         u32 _vmexit_control = 0;
 856         u32 _vmentry_control = 0;
 857
 858         min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
 859         opt = 0;
 860         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
 861                                 &_pin_based_exec_control) < 0)
 862                 return -1;
 863
 864         min = CPU_BASED_HLT_EXITING |
 865 #ifdef CONFIG_X86_64
 866               CPU_BASED_CR8_LOAD_EXITING |
 867               CPU_BASED_CR8_STORE_EXITING |
 868 #endif
 869               CPU_BASED_USE_IO_BITMAPS |
 870               CPU_BASED_MOV_DR_EXITING |
 871               CPU_BASED_USE_TSC_OFFSETING;
 872         opt = 0;
 873         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
 874                                 &_cpu_based_exec_control) < 0)
 875                 return -1;
 876
 877         min = 0;
 878 #ifdef CONFIG_X86_64
 879         min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
 880 #endif
 881         opt = 0;
 882         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
 883                                 &_vmexit_control) < 0)
 884                 return -1;
 885
 886         min = opt = 0;
 887         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
 888                                 &_vmentry_control) < 0)
 889                 return -1;
 890
 891         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 892
 893         /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
 894         if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
 895                 return -1;
 896
 897 #ifdef CONFIG_X86_64
 898         /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
 899         if (vmx_msr_high & (1u<<16))
 900                 return -1;
 901 #endif
 902
 903         /* Require Write-Back (WB) memory type for VMCS accesses. */
 904         if (((vmx_msr_high >> 18) & 15) != 6)
 905                 return -1;
 906
 907         vmcs_config.size = vmx_msr_high & 0x1fff;
 908         vmcs_config.order = get_order(vmcs_config.size);
 909         vmcs_config.revision_id = vmx_msr_low;
 910
 911         vmcs_config.pin_based_exec_ctrl = _pin_based_exec_control;
 912         vmcs_config.cpu_based_exec_ctrl = _cpu_based_exec_control;
 913         vmcs_config.vmexit_ctrl         = _vmexit_control;
 914         vmcs_config.vmentry_ctrl        = _vmentry_control;
 915
 916         return 0;
 917 }
 918
 919 static struct vmcs *alloc_vmcs_cpu(int cpu)
 920 {
 921         int node = cpu_to_node(cpu);
 922         struct page *pages;
 923         struct vmcs *vmcs;
 924
 925         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_config.order);
 926         if (!pages)
 927                 return NULL;
 928         vmcs = page_address(pages);
 929         memset(vmcs, 0, vmcs_config.size);
 930         vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
 931         return vmcs;
 932 }
 933
 934 static struct vmcs *alloc_vmcs(void)
 935 {
 936         return alloc_vmcs_cpu(raw_smp_processor_id());
 937 }
 938
 939 static void free_vmcs(struct vmcs *vmcs)
 940 {
 941         free_pages((unsigned long)vmcs, vmcs_config.order);
 942 }
 943
 944 static void free_kvm_area(void)
 945 {
 946         int cpu;
 947
 948         for_each_online_cpu(cpu)
 949                 free_vmcs(per_cpu(vmxarea, cpu));
 950 }
 951
 952 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 953
 954 static __init int alloc_kvm_area(void)
 955 {
 956         int cpu;
 957
 958         for_each_online_cpu(cpu) {
 959                 struct vmcs *vmcs;
 960
 961                 vmcs = alloc_vmcs_cpu(cpu);
 962                 if (!vmcs) {
 963                         free_kvm_area();
 964                         return -ENOMEM;
 965                 }
 966
 967                 per_cpu(vmxarea, cpu) = vmcs;
 968         }
 969         return 0;
 970 }
 971
 972 static __init int hardware_setup(void)
 973 {
 974         if (setup_vmcs_config() < 0)
 975                 return -1;
 976         return alloc_kvm_area();
 977 }
 978
 979 static __exit void hardware_unsetup(void)
 980 {
 981         free_kvm_area();
 982 }
 983
 984 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 985 {
 986         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 987
 988         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
 989                 vmcs_write16(sf->selector, save->selector);
 990                 vmcs_writel(sf->base, save->base);
 991                 vmcs_write32(sf->limit, save->limit);
 992                 vmcs_write32(sf->ar_bytes, save->ar);
 993         } else {
 994                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 995                         << AR_DPL_SHIFT;
 996                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 997         }
 998 }
 999
1000 static void enter_pmode(struct kvm_vcpu *vcpu)
1001 {
1002         unsigned long flags;
1003
1004         vcpu->rmode.active = 0;
1005
1006         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
1007         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
1008         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
1009
1010         flags = vmcs_readl(GUEST_RFLAGS);
1011         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
1012         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
1013         vmcs_writel(GUEST_RFLAGS, flags);
1014
1015         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
1016                         (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
1017
1018         update_exception_bitmap(vcpu);
1019
1020         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
1021         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
1022         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
1023         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
1024
1025         vmcs_write16(GUEST_SS_SELECTOR, 0);
1026         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
1027
1028         vmcs_write16(GUEST_CS_SELECTOR,
1029                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
1030         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1031 }
1032
1033 static int rmode_tss_base(struct kvm* kvm)
1034 {
1035         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
1036         return base_gfn << PAGE_SHIFT;
1037 }
1038
1039 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
1040 {
1041         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1042
1043         save->selector = vmcs_read16(sf->selector);
1044         save->base = vmcs_readl(sf->base);
1045         save->limit = vmcs_read32(sf->limit);
1046         save->ar = vmcs_read32(sf->ar_bytes);
1047         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
1048         vmcs_write32(sf->limit, 0xffff);
1049         vmcs_write32(sf->ar_bytes, 0xf3);
1050 }
1051
1052 static void enter_rmode(struct kvm_vcpu *vcpu)
1053 {
1054         unsigned long flags;
1055
1056         vcpu->rmode.active = 1;
1057
1058         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
1059         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
1060
1061         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
1062         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
1063
1064         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
1065         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1066
1067         flags = vmcs_readl(GUEST_RFLAGS);
1068         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
1069
1070         flags |= IOPL_MASK | X86_EFLAGS_VM;
1071
1072         vmcs_writel(GUEST_RFLAGS, flags);
1073         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
1074         update_exception_bitmap(vcpu);
1075
1076         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
1077         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
1078         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
1079
1080         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
1081         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1082         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
1083                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
1084         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
1085
1086         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
1087         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
1088         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
1089         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
1090
1091         init_rmode_tss(vcpu->kvm);
1092 }
1093
1094 #ifdef CONFIG_X86_64
1095
1096 static void enter_lmode(struct kvm_vcpu *vcpu)
1097 {
1098         u32 guest_tr_ar;
1099
1100         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
1101         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
1102                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
1103                        __FUNCTION__);
1104                 vmcs_write32(GUEST_TR_AR_BYTES,
1105                              (guest_tr_ar & ~AR_TYPE_MASK)
1106                              | AR_TYPE_BUSY_64_TSS);
1107         }
1108
1109         vcpu->shadow_efer |= EFER_LMA;
1110
1111         find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
1112         vmcs_write32(VM_ENTRY_CONTROLS,
1113                      vmcs_read32(VM_ENTRY_CONTROLS)
1114                      | VM_ENTRY_CONTROLS_IA32E_MASK);
1115 }
1116
1117 static void exit_lmode(struct kvm_vcpu *vcpu)
1118 {
1119         vcpu->shadow_efer &= ~EFER_LMA;
1120
1121         vmcs_write32(VM_ENTRY_CONTROLS,
1122                      vmcs_read32(VM_ENTRY_CONTROLS)
1123                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
1124 }
1125
1126 #endif
1127
1128 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1129 {
1130         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
1131         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
1132 }
1133
1134 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1135 {
1136         vmx_fpu_deactivate(vcpu);
1137
1138         if (vcpu->rmode.active && (cr0 & X86_CR0_PE))
1139                 enter_pmode(vcpu);
1140
1141         if (!vcpu->rmode.active && !(cr0 & X86_CR0_PE))
1142                 enter_rmode(vcpu);
1143
1144 #ifdef CONFIG_X86_64
1145         if (vcpu->shadow_efer & EFER_LME) {
1146                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
1147                         enter_lmode(vcpu);
1148                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
1149                         exit_lmode(vcpu);
1150         }
1151 #endif
1152
1153         vmcs_writel(CR0_READ_SHADOW, cr0);
1154         vmcs_writel(GUEST_CR0,
1155                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1156         vcpu->cr0 = cr0;
1157
1158         if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
1159                 vmx_fpu_activate(vcpu);
1160 }
1161
1162 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1163 {
1164         vmcs_writel(GUEST_CR3, cr3);
1165         if (vcpu->cr0 & X86_CR0_PE)
1166                 vmx_fpu_deactivate(vcpu);
1167 }
1168
1169 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1170 {
1171         vmcs_writel(CR4_READ_SHADOW, cr4);
1172         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
1173                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1174         vcpu->cr4 = cr4;
1175 }
1176
1177 #ifdef CONFIG_X86_64
1178
1179 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1180 {
1181         struct vcpu_vmx *vmx = to_vmx(vcpu);
1182         struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
1183
1184         vcpu->shadow_efer = efer;
1185         if (efer & EFER_LMA) {
1186                 vmcs_write32(VM_ENTRY_CONTROLS,
1187                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1188                                      VM_ENTRY_CONTROLS_IA32E_MASK);
1189                 msr->data = efer;
1190
1191         } else {
1192                 vmcs_write32(VM_ENTRY_CONTROLS,
1193                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1194                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
1195
1196                 msr->data = efer & ~EFER_LME;
1197         }
1198         setup_msrs(vmx);
1199 }
1200
1201 #endif
1202
1203 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1204 {
1205         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1206
1207         return vmcs_readl(sf->base);
1208 }
1209
1210 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1211                             struct kvm_segment *var, int seg)
1212 {
1213         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1214         u32 ar;
1215
1216         var->base = vmcs_readl(sf->base);
1217         var->limit = vmcs_read32(sf->limit);
1218         var->selector = vmcs_read16(sf->selector);
1219         ar = vmcs_read32(sf->ar_bytes);
1220         if (ar & AR_UNUSABLE_MASK)
1221                 ar = 0;
1222         var->type = ar & 15;
1223         var->s = (ar >> 4) & 1;
1224         var->dpl = (ar >> 5) & 3;
1225         var->present = (ar >> 7) & 1;
1226         var->avl = (ar >> 12) & 1;
1227         var->l = (ar >> 13) & 1;
1228         var->db = (ar >> 14) & 1;
1229         var->g = (ar >> 15) & 1;
1230         var->unusable = (ar >> 16) & 1;
1231 }
1232
1233 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1234 {
1235         u32 ar;
1236
1237         if (var->unusable)
1238                 ar = 1 << 16;
1239         else {
1240                 ar = var->type & 15;
1241                 ar |= (var->s & 1) << 4;
1242                 ar |= (var->dpl & 3) << 5;
1243                 ar |= (var->present & 1) << 7;
1244                 ar |= (var->avl & 1) << 12;
1245                 ar |= (var->l & 1) << 13;
1246                 ar |= (var->db & 1) << 14;
1247                 ar |= (var->g & 1) << 15;
1248         }
1249         if (ar == 0) /* a 0 value means unusable */
1250                 ar = AR_UNUSABLE_MASK;
1251
1252         return ar;
1253 }
1254
1255 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1256                             struct kvm_segment *var, int seg)
1257 {
1258         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1259         u32 ar;
1260
1261         if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1262                 vcpu->rmode.tr.selector = var->selector;
1263                 vcpu->rmode.tr.base = var->base;
1264                 vcpu->rmode.tr.limit = var->limit;
1265                 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1266                 return;
1267         }
1268         vmcs_writel(sf->base, var->base);
1269         vmcs_write32(sf->limit, var->limit);
1270         vmcs_write16(sf->selector, var->selector);
1271         if (vcpu->rmode.active && var->s) {
1272                 /*
1273                  * Hack real-mode segments into vm86 compatibility.
1274                  */
1275                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1276                         vmcs_writel(sf->base, 0xf0000);
1277                 ar = 0xf3;
1278         } else
1279                 ar = vmx_segment_access_rights(var);
1280         vmcs_write32(sf->ar_bytes, ar);
1281 }
1282
1283 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1284 {
1285         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1286
1287         *db = (ar >> 14) & 1;
1288         *l = (ar >> 13) & 1;
1289 }
1290
1291 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1292 {
1293         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1294         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1295 }
1296
1297 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1298 {
1299         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1300         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1301 }
1302
1303 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1304 {
1305         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1306         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1307 }
1308
1309 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1310 {
1311         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1312         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1313 }
1314
1315 static int init_rmode_tss(struct kvm* kvm)
1316 {
1317         struct page *p1, *p2, *p3;
1318         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1319         char *page;
1320
1321         p1 = gfn_to_page(kvm, fn++);
1322         p2 = gfn_to_page(kvm, fn++);
1323         p3 = gfn_to_page(kvm, fn);
1324
1325         if (!p1 || !p2 || !p3) {
1326                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1327                 return 0;
1328         }
1329
1330         page = kmap_atomic(p1, KM_USER0);
1331         clear_page(page);
1332         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1333         kunmap_atomic(page, KM_USER0);
1334
1335         page = kmap_atomic(p2, KM_USER0);
1336         clear_page(page);
1337         kunmap_atomic(page, KM_USER0);
1338
1339         page = kmap_atomic(p3, KM_USER0);
1340         clear_page(page);
1341         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1342         kunmap_atomic(page, KM_USER0);
1343
1344         return 1;
1345 }
1346
1347 static void seg_setup(int seg)
1348 {
1349         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1350
1351         vmcs_write16(sf->selector, 0);
1352         vmcs_writel(sf->base, 0);
1353         vmcs_write32(sf->limit, 0xffff);
1354         vmcs_write32(sf->ar_bytes, 0x93);
1355 }
1356
1357 /*
1358  * Sets up the vmcs for emulated real mode.
1359  */
1360 static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
1361 {
1362         u32 host_sysenter_cs;
1363         u32 junk;
1364         unsigned long a;
1365         struct descriptor_table dt;
1366         int i;
1367         int ret = 0;
1368         unsigned long kvm_vmx_return;
1369
1370         if (!init_rmode_tss(vmx->vcpu.kvm)) {
1371                 ret = -ENOMEM;
1372                 goto out;
1373         }
1374
1375         vmx->vcpu.regs[VCPU_REGS_RDX] = get_rdx_init_val();
1376         vmx->vcpu.cr8 = 0;
1377         vmx->vcpu.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1378         if (vmx->vcpu.vcpu_id == 0)
1379                 vmx->vcpu.apic_base |= MSR_IA32_APICBASE_BSP;
1380
1381         fx_init(&vmx->vcpu);
1382
1383         /*
1384          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1385          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1386          */
1387         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1388         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1389         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1390         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1391
1392         seg_setup(VCPU_SREG_DS);
1393         seg_setup(VCPU_SREG_ES);
1394         seg_setup(VCPU_SREG_FS);
1395         seg_setup(VCPU_SREG_GS);
1396         seg_setup(VCPU_SREG_SS);
1397
1398         vmcs_write16(GUEST_TR_SELECTOR, 0);
1399         vmcs_writel(GUEST_TR_BASE, 0);
1400         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1401         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1402
1403         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1404         vmcs_writel(GUEST_LDTR_BASE, 0);
1405         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1406         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1407
1408         vmcs_write32(GUEST_SYSENTER_CS, 0);
1409         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1410         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1411
1412         vmcs_writel(GUEST_RFLAGS, 0x02);
1413         vmcs_writel(GUEST_RIP, 0xfff0);
1414         vmcs_writel(GUEST_RSP, 0);
1415
1416         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1417         vmcs_writel(GUEST_DR7, 0x400);
1418
1419         vmcs_writel(GUEST_GDTR_BASE, 0);
1420         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1421
1422         vmcs_writel(GUEST_IDTR_BASE, 0);
1423         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1424
1425         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1426         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1427         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1428
1429         /* I/O */
1430         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1431         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1432
1433         guest_write_tsc(0);
1434
1435         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1436
1437         /* Special registers */
1438         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1439
1440         /* Control */
1441         vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
1442                 vmcs_config.pin_based_exec_ctrl);
1443         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
1444                 vmcs_config.cpu_based_exec_ctrl);
1445
1446         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1447         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1448         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1449
1450         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1451         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1452         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1453
1454         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1455         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1456         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1457         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1458         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1459         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1460 #ifdef CONFIG_X86_64
1461         rdmsrl(MSR_FS_BASE, a);
1462         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1463         rdmsrl(MSR_GS_BASE, a);
1464         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1465 #else
1466         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1467         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1468 #endif
1469
1470         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1471
1472         get_idt(&dt);
1473         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1474
1475         asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1476         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1477         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1478         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1479         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1480
1481         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1482         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1483         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1484         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1485         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1486         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1487
1488         for (i = 0; i < NR_VMX_MSR; ++i) {
1489                 u32 index = vmx_msr_index[i];
1490                 u32 data_low, data_high;
1491                 u64 data;
1492                 int j = vmx->nmsrs;
1493
1494                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1495                         continue;
1496                 if (wrmsr_safe(index, data_low, data_high) < 0)
1497                         continue;
1498                 data = data_low | ((u64)data_high << 32);
1499                 vmx->host_msrs[j].index = index;
1500                 vmx->host_msrs[j].reserved = 0;
1501                 vmx->host_msrs[j].data = data;
1502                 vmx->guest_msrs[j] = vmx->host_msrs[j];
1503                 ++vmx->nmsrs;
1504         }
1505
1506         setup_msrs(vmx);
1507
1508         vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
1509
1510         /* 22.2.1, 20.8.1 */
1511         vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
1512
1513         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1514
1515 #ifdef CONFIG_X86_64
1516         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1517         vmcs_writel(TPR_THRESHOLD, 0);
1518 #endif
1519
1520         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1521         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1522
1523         vmx->vcpu.cr0 = 0x60000010;
1524         vmx_set_cr0(&vmx->vcpu, vmx->vcpu.cr0); // enter rmode
1525         vmx_set_cr4(&vmx->vcpu, 0);
1526 #ifdef CONFIG_X86_64
1527         vmx_set_efer(&vmx->vcpu, 0);
1528 #endif
1529         vmx_fpu_activate(&vmx->vcpu);
1530         update_exception_bitmap(&vmx->vcpu);
1531
1532         return 0;
1533
1534 out:
1535         return ret;
1536 }
1537
1538 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1539 {
1540         u16 ent[2];
1541         u16 cs;
1542         u16 ip;
1543         unsigned long flags;
1544         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1545         u16 sp =  vmcs_readl(GUEST_RSP);
1546         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1547
1548         if (sp > ss_limit || sp < 6 ) {
1549                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1550                             __FUNCTION__,
1551                             vmcs_readl(GUEST_RSP),
1552                             vmcs_readl(GUEST_SS_BASE),
1553                             vmcs_read32(GUEST_SS_LIMIT));
1554                 return;
1555         }
1556
1557         if (emulator_read_std(irq * sizeof(ent), &ent, sizeof(ent), vcpu) !=
1558                                                         X86EMUL_CONTINUE) {
1559                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1560                 return;
1561         }
1562
1563         flags =  vmcs_readl(GUEST_RFLAGS);
1564         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1565         ip =  vmcs_readl(GUEST_RIP);
1566
1567
1568         if (emulator_write_emulated(ss_base + sp - 2, &flags, 2, vcpu) != X86EMUL_CONTINUE ||
1569             emulator_write_emulated(ss_base + sp - 4, &cs, 2, vcpu) != X86EMUL_CONTINUE ||
1570             emulator_write_emulated(ss_base + sp - 6, &ip, 2, vcpu) != X86EMUL_CONTINUE) {
1571                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1572                 return;
1573         }
1574
1575         vmcs_writel(GUEST_RFLAGS, flags &
1576                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1577         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1578         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1579         vmcs_writel(GUEST_RIP, ent[0]);
1580         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1581 }
1582
1583 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1584 {
1585         int word_index = __ffs(vcpu->irq_summary);
1586         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1587         int irq = word_index * BITS_PER_LONG + bit_index;
1588
1589         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1590         if (!vcpu->irq_pending[word_index])
1591                 clear_bit(word_index, &vcpu->irq_summary);
1592
1593         if (vcpu->rmode.active) {
1594                 inject_rmode_irq(vcpu, irq);
1595                 return;
1596         }
1597         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1598                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1599 }
1600
1601
1602 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1603                                        struct kvm_run *kvm_run)
1604 {
1605         u32 cpu_based_vm_exec_control;
1606
1607         vcpu->interrupt_window_open =
1608                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1609                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1610
1611         if (vcpu->interrupt_window_open &&
1612             vcpu->irq_summary &&
1613             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1614                 /*
1615                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1616                  */
1617                 kvm_do_inject_irq(vcpu);
1618
1619         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1620         if (!vcpu->interrupt_window_open &&
1621             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1622                 /*
1623                  * Interrupts blocked.  Wait for unblock.
1624                  */
1625                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1626         else
1627                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1628         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1629 }
1630
1631 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1632 {
1633         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1634
1635         set_debugreg(dbg->bp[0], 0);
1636         set_debugreg(dbg->bp[1], 1);
1637         set_debugreg(dbg->bp[2], 2);
1638         set_debugreg(dbg->bp[3], 3);
1639
1640         if (dbg->singlestep) {
1641                 unsigned long flags;
1642
1643                 flags = vmcs_readl(GUEST_RFLAGS);
1644                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1645                 vmcs_writel(GUEST_RFLAGS, flags);
1646         }
1647 }
1648
1649 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1650                                   int vec, u32 err_code)
1651 {
1652         if (!vcpu->rmode.active)
1653                 return 0;
1654
1655         /*
1656          * Instruction with address size override prefix opcode 0x67
1657          * Cause the #SS fault with 0 error code in VM86 mode.
1658          */
1659         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1660                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1661                         return 1;
1662         return 0;
1663 }
1664
1665 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1666 {
1667         u32 intr_info, error_code;
1668         unsigned long cr2, rip;
1669         u32 vect_info;
1670         enum emulation_result er;
1671         int r;
1672
1673         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1674         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1675
1676         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1677                                                 !is_page_fault(intr_info)) {
1678                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1679                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1680         }
1681
1682         if (is_external_interrupt(vect_info)) {
1683                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1684                 set_bit(irq, vcpu->irq_pending);
1685                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1686         }
1687
1688         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1689                 asm ("int $2");
1690                 return 1;
1691         }
1692
1693         if (is_no_device(intr_info)) {
1694                 vmx_fpu_activate(vcpu);
1695                 return 1;
1696         }
1697
1698         error_code = 0;
1699         rip = vmcs_readl(GUEST_RIP);
1700         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1701                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1702         if (is_page_fault(intr_info)) {
1703                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1704
1705                 mutex_lock(&vcpu->kvm->lock);
1706                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1707                 if (r < 0) {
1708                         mutex_unlock(&vcpu->kvm->lock);
1709                         return r;
1710                 }
1711                 if (!r) {
1712                         mutex_unlock(&vcpu->kvm->lock);
1713                         return 1;
1714                 }
1715
1716                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1717                 mutex_unlock(&vcpu->kvm->lock);
1718
1719                 switch (er) {
1720                 case EMULATE_DONE:
1721                         return 1;
1722                 case EMULATE_DO_MMIO:
1723                         ++vcpu->stat.mmio_exits;
1724                         return 0;
1725                  case EMULATE_FAIL:
1726                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1727                         break;
1728                 default:
1729                         BUG();
1730                 }
1731         }
1732
1733         if (vcpu->rmode.active &&
1734             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1735                                                                 error_code)) {
1736                 if (vcpu->halt_request) {
1737                         vcpu->halt_request = 0;
1738                         return kvm_emulate_halt(vcpu);
1739                 }
1740                 return 1;
1741         }
1742
1743         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1744                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1745                 return 0;
1746         }
1747         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1748         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1749         kvm_run->ex.error_code = error_code;
1750         return 0;
1751 }
1752
1753 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1754                                      struct kvm_run *kvm_run)
1755 {
1756         ++vcpu->stat.irq_exits;
1757         return 1;
1758 }
1759
1760 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1761 {
1762         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1763         return 0;
1764 }
1765
1766 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1767 {
1768         u64 inst;
1769         gva_t rip;
1770         int countr_size;
1771         int i;
1772
1773         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1774                 countr_size = 2;
1775         } else {
1776                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1777
1778                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1779                               (cs_ar & AR_DB_MASK) ? 4: 2;
1780         }
1781
1782         rip =  vmcs_readl(GUEST_RIP);
1783         if (countr_size != 8)
1784                 rip += vmcs_readl(GUEST_CS_BASE);
1785
1786         if (emulator_read_std(rip, &inst, sizeof(inst), vcpu) !=
1787                                                         X86EMUL_CONTINUE)
1788                 return 0;
1789
1790         for (i = 0; i < sizeof(inst); i++) {
1791                 switch (((u8*)&inst)[i]) {
1792                 case 0xf0:
1793                 case 0xf2:
1794                 case 0xf3:
1795                 case 0x2e:
1796                 case 0x36:
1797                 case 0x3e:
1798                 case 0x26:
1799                 case 0x64:
1800                 case 0x65:
1801                 case 0x66:
1802                         break;
1803                 case 0x67:
1804                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1805                 default:
1806                         goto done;
1807                 }
1808         }
1809         return 0;
1810 done:
1811         countr_size *= 8;
1812         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1813         //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1814         return 1;
1815 }
1816
1817 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1818 {
1819         u64 exit_qualification;
1820         int size, down, in, string, rep;
1821         unsigned port;
1822         unsigned long count;
1823         gva_t address;
1824
1825         ++vcpu->stat.io_exits;
1826         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1827         in = (exit_qualification & 8) != 0;
1828         size = (exit_qualification & 7) + 1;
1829         string = (exit_qualification & 16) != 0;
1830         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1831         count = 1;
1832         rep = (exit_qualification & 32) != 0;
1833         port = exit_qualification >> 16;
1834         address = 0;
1835         if (string) {
1836                 if (rep && !get_io_count(vcpu, &count))
1837                         return 1;
1838                 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1839         }
1840         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1841                              address, rep, port);
1842 }
1843
1844 static void
1845 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1846 {
1847         /*
1848          * Patch in the VMCALL instruction:
1849          */
1850         hypercall[0] = 0x0f;
1851         hypercall[1] = 0x01;
1852         hypercall[2] = 0xc1;
1853         hypercall[3] = 0xc3;
1854 }
1855
1856 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1857 {
1858         u64 exit_qualification;
1859         int cr;
1860         int reg;
1861
1862         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1863         cr = exit_qualification & 15;
1864         reg = (exit_qualification >> 8) & 15;
1865         switch ((exit_qualification >> 4) & 3) {
1866         case 0: /* mov to cr */
1867                 switch (cr) {
1868                 case 0:
1869                         vcpu_load_rsp_rip(vcpu);
1870                         set_cr0(vcpu, vcpu->regs[reg]);
1871                         skip_emulated_instruction(vcpu);
1872                         return 1;
1873                 case 3:
1874                         vcpu_load_rsp_rip(vcpu);
1875                         set_cr3(vcpu, vcpu->regs[reg]);
1876                         skip_emulated_instruction(vcpu);
1877                         return 1;
1878                 case 4:
1879                         vcpu_load_rsp_rip(vcpu);
1880                         set_cr4(vcpu, vcpu->regs[reg]);
1881                         skip_emulated_instruction(vcpu);
1882                         return 1;
1883                 case 8:
1884                         vcpu_load_rsp_rip(vcpu);
1885                         set_cr8(vcpu, vcpu->regs[reg]);
1886                         skip_emulated_instruction(vcpu);
1887                         return 1;
1888                 };
1889                 break;
1890         case 2: /* clts */
1891                 vcpu_load_rsp_rip(vcpu);
1892                 vmx_fpu_deactivate(vcpu);
1893                 vcpu->cr0 &= ~X86_CR0_TS;
1894                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1895                 vmx_fpu_activate(vcpu);
1896                 skip_emulated_instruction(vcpu);
1897                 return 1;
1898         case 1: /*mov from cr*/
1899                 switch (cr) {
1900                 case 3:
1901                         vcpu_load_rsp_rip(vcpu);
1902                         vcpu->regs[reg] = vcpu->cr3;
1903                         vcpu_put_rsp_rip(vcpu);
1904                         skip_emulated_instruction(vcpu);
1905                         return 1;
1906                 case 8:
1907                         vcpu_load_rsp_rip(vcpu);
1908                         vcpu->regs[reg] = vcpu->cr8;
1909                         vcpu_put_rsp_rip(vcpu);
1910                         skip_emulated_instruction(vcpu);
1911                         return 1;
1912                 }
1913                 break;
1914         case 3: /* lmsw */
1915                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1916
1917                 skip_emulated_instruction(vcpu);
1918                 return 1;
1919         default:
1920                 break;
1921         }
1922         kvm_run->exit_reason = 0;
1923         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1924                (int)(exit_qualification >> 4) & 3, cr);
1925         return 0;
1926 }
1927
1928 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1929 {
1930         u64 exit_qualification;
1931         unsigned long val;
1932         int dr, reg;
1933
1934         /*
1935          * FIXME: this code assumes the host is debugging the guest.
1936          *        need to deal with guest debugging itself too.
1937          */
1938         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1939         dr = exit_qualification & 7;
1940         reg = (exit_qualification >> 8) & 15;
1941         vcpu_load_rsp_rip(vcpu);
1942         if (exit_qualification & 16) {
1943                 /* mov from dr */
1944                 switch (dr) {
1945                 case 6:
1946                         val = 0xffff0ff0;
1947                         break;
1948                 case 7:
1949                         val = 0x400;
1950                         break;
1951                 default:
1952                         val = 0;
1953                 }
1954                 vcpu->regs[reg] = val;
1955         } else {
1956                 /* mov to dr */
1957         }
1958         vcpu_put_rsp_rip(vcpu);
1959         skip_emulated_instruction(vcpu);
1960         return 1;
1961 }
1962
1963 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1964 {
1965         kvm_emulate_cpuid(vcpu);
1966         return 1;
1967 }
1968
1969 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1970 {
1971         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1972         u64 data;
1973
1974         if (vmx_get_msr(vcpu, ecx, &data)) {
1975                 vmx_inject_gp(vcpu, 0);
1976                 return 1;
1977         }
1978
1979         /* FIXME: handling of bits 32:63 of rax, rdx */
1980         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1981         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1982         skip_emulated_instruction(vcpu);
1983         return 1;
1984 }
1985
1986 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1987 {
1988         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1989         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1990                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1991
1992         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1993                 vmx_inject_gp(vcpu, 0);
1994                 return 1;
1995         }
1996
1997         skip_emulated_instruction(vcpu);
1998         return 1;
1999 }
2000
2001 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2002                               struct kvm_run *kvm_run)
2003 {
2004         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
2005         kvm_run->cr8 = vcpu->cr8;
2006         kvm_run->apic_base = vcpu->apic_base;
2007         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
2008                                                   vcpu->irq_summary == 0);
2009 }
2010
2011 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
2012                                    struct kvm_run *kvm_run)
2013 {
2014         /*
2015          * If the user space waits to inject interrupts, exit as soon as
2016          * possible
2017          */
2018         if (kvm_run->request_interrupt_window &&
2019             !vcpu->irq_summary) {
2020                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
2021                 ++vcpu->stat.irq_window_exits;
2022                 return 0;
2023         }
2024         return 1;
2025 }
2026
2027 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2028 {
2029         skip_emulated_instruction(vcpu);
2030         return kvm_emulate_halt(vcpu);
2031 }
2032
2033 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2034 {
2035         skip_emulated_instruction(vcpu);
2036         return kvm_hypercall(vcpu, kvm_run);
2037 }
2038
2039 /*
2040  * The exit handlers return 1 if the exit was handled fully and guest execution
2041  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
2042  * to be done to userspace and return 0.
2043  */
2044 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
2045                                       struct kvm_run *kvm_run) = {
2046         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
2047         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
2048         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
2049         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
2050         [EXIT_REASON_CR_ACCESS]               = handle_cr,
2051         [EXIT_REASON_DR_ACCESS]               = handle_dr,
2052         [EXIT_REASON_CPUID]                   = handle_cpuid,
2053         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
2054         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
2055         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
2056         [EXIT_REASON_HLT]                     = handle_halt,
2057         [EXIT_REASON_VMCALL]                  = handle_vmcall,
2058 };
2059
2060 static const int kvm_vmx_max_exit_handlers =
2061         ARRAY_SIZE(kvm_vmx_exit_handlers);
2062
2063 /*
2064  * The guest has exited.  See if we can fix it or if we need userspace
2065  * assistance.
2066  */
2067 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2068 {
2069         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2070         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
2071
2072         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
2073                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
2074                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
2075                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
2076         if (exit_reason < kvm_vmx_max_exit_handlers
2077             && kvm_vmx_exit_handlers[exit_reason])
2078                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
2079         else {
2080                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
2081                 kvm_run->hw.hardware_exit_reason = exit_reason;
2082         }
2083         return 0;
2084 }
2085
2086 /*
2087  * Check if userspace requested an interrupt window, and that the
2088  * interrupt window is open.
2089  *
2090  * No need to exit to userspace if we already have an interrupt queued.
2091  */
2092 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2093                                           struct kvm_run *kvm_run)
2094 {
2095         return (!vcpu->irq_summary &&
2096                 kvm_run->request_interrupt_window &&
2097                 vcpu->interrupt_window_open &&
2098                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
2099 }
2100
2101 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2102 {
2103 }
2104
2105 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2106 {
2107         struct vcpu_vmx *vmx = to_vmx(vcpu);
2108         u8 fail;
2109         int r;
2110
2111 preempted:
2112         if (vcpu->guest_debug.enabled)
2113                 kvm_guest_debug_pre(vcpu);
2114
2115 again:
2116         r = kvm_mmu_reload(vcpu);
2117         if (unlikely(r))
2118                 goto out;
2119
2120         preempt_disable();
2121
2122         if (!vcpu->mmio_read_completed)
2123                 do_interrupt_requests(vcpu, kvm_run);
2124
2125         vmx_save_host_state(vmx);
2126         kvm_load_guest_fpu(vcpu);
2127
2128         /*
2129          * Loading guest fpu may have cleared host cr0.ts
2130          */
2131         vmcs_writel(HOST_CR0, read_cr0());
2132
2133         local_irq_disable();
2134
2135         vcpu->guest_mode = 1;
2136         if (vcpu->requests)
2137                 if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
2138                     vmx_flush_tlb(vcpu);
2139
2140         asm (
2141                 /* Store host registers */
2142 #ifdef CONFIG_X86_64
2143                 "push %%rax; push %%rbx; push %%rdx;"
2144                 "push %%rsi; push %%rdi; push %%rbp;"
2145                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
2146                 "push %%r12; push %%r13; push %%r14; push %%r15;"
2147                 "push %%rcx \n\t"
2148                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2149 #else
2150                 "pusha; push %%ecx \n\t"
2151                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2152 #endif
2153                 /* Check if vmlaunch of vmresume is needed */
2154                 "cmp $0, %1 \n\t"
2155                 /* Load guest registers.  Don't clobber flags. */
2156 #ifdef CONFIG_X86_64
2157                 "mov %c[cr2](%3), %%rax \n\t"
2158                 "mov %%rax, %%cr2 \n\t"
2159                 "mov %c[rax](%3), %%rax \n\t"
2160                 "mov %c[rbx](%3), %%rbx \n\t"
2161                 "mov %c[rdx](%3), %%rdx \n\t"
2162                 "mov %c[rsi](%3), %%rsi \n\t"
2163                 "mov %c[rdi](%3), %%rdi \n\t"
2164                 "mov %c[rbp](%3), %%rbp \n\t"
2165                 "mov %c[r8](%3),  %%r8  \n\t"
2166                 "mov %c[r9](%3),  %%r9  \n\t"
2167                 "mov %c[r10](%3), %%r10 \n\t"
2168                 "mov %c[r11](%3), %%r11 \n\t"
2169                 "mov %c[r12](%3), %%r12 \n\t"
2170                 "mov %c[r13](%3), %%r13 \n\t"
2171                 "mov %c[r14](%3), %%r14 \n\t"
2172                 "mov %c[r15](%3), %%r15 \n\t"
2173                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2174 #else
2175                 "mov %c[cr2](%3), %%eax \n\t"
2176                 "mov %%eax,   %%cr2 \n\t"
2177                 "mov %c[rax](%3), %%eax \n\t"
2178                 "mov %c[rbx](%3), %%ebx \n\t"
2179                 "mov %c[rdx](%3), %%edx \n\t"
2180                 "mov %c[rsi](%3), %%esi \n\t"
2181                 "mov %c[rdi](%3), %%edi \n\t"
2182                 "mov %c[rbp](%3), %%ebp \n\t"
2183                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2184 #endif
2185                 /* Enter guest mode */
2186                 "jne .Llaunched \n\t"
2187                 ASM_VMX_VMLAUNCH "\n\t"
2188                 "jmp .Lkvm_vmx_return \n\t"
2189                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2190                 ".Lkvm_vmx_return: "
2191                 /* Save guest registers, load host registers, keep flags */
2192 #ifdef CONFIG_X86_64
2193                 "xchg %3,     (%%rsp) \n\t"
2194                 "mov %%rax, %c[rax](%3) \n\t"
2195                 "mov %%rbx, %c[rbx](%3) \n\t"
2196                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2197                 "mov %%rdx, %c[rdx](%3) \n\t"
2198                 "mov %%rsi, %c[rsi](%3) \n\t"
2199                 "mov %%rdi, %c[rdi](%3) \n\t"
2200                 "mov %%rbp, %c[rbp](%3) \n\t"
2201                 "mov %%r8,  %c[r8](%3) \n\t"
2202                 "mov %%r9,  %c[r9](%3) \n\t"
2203                 "mov %%r10, %c[r10](%3) \n\t"
2204                 "mov %%r11, %c[r11](%3) \n\t"
2205                 "mov %%r12, %c[r12](%3) \n\t"
2206                 "mov %%r13, %c[r13](%3) \n\t"
2207                 "mov %%r14, %c[r14](%3) \n\t"
2208                 "mov %%r15, %c[r15](%3) \n\t"
2209                 "mov %%cr2, %%rax   \n\t"
2210                 "mov %%rax, %c[cr2](%3) \n\t"
2211                 "mov (%%rsp), %3 \n\t"
2212
2213                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2214                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2215                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2216                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2217 #else
2218                 "xchg %3, (%%esp) \n\t"
2219                 "mov %%eax, %c[rax](%3) \n\t"
2220                 "mov %%ebx, %c[rbx](%3) \n\t"
2221                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2222                 "mov %%edx, %c[rdx](%3) \n\t"
2223                 "mov %%esi, %c[rsi](%3) \n\t"
2224                 "mov %%edi, %c[rdi](%3) \n\t"
2225                 "mov %%ebp, %c[rbp](%3) \n\t"
2226                 "mov %%cr2, %%eax  \n\t"
2227                 "mov %%eax, %c[cr2](%3) \n\t"
2228                 "mov (%%esp), %3 \n\t"
2229
2230                 "pop %%ecx; popa \n\t"
2231 #endif
2232                 "setbe %0 \n\t"
2233               : "=q" (fail)
2234               : "r"(vmx->launched), "d"((unsigned long)HOST_RSP),
2235                 "c"(vcpu),
2236                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2237                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2238                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2239                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2240                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2241                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2242                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2243 #ifdef CONFIG_X86_64
2244                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2245                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2246                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2247                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2248                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2249                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2250                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2251                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2252 #endif
2253                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2254               : "cc", "memory" );
2255
2256         vcpu->guest_mode = 0;
2257         local_irq_enable();
2258
2259         ++vcpu->stat.exits;
2260
2261         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2262
2263         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2264         vmx->launched = 1;
2265
2266         preempt_enable();
2267
2268         if (unlikely(fail)) {
2269                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2270                 kvm_run->fail_entry.hardware_entry_failure_reason
2271                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2272                 r = 0;
2273                 goto out;
2274         }
2275         /*
2276          * Profile KVM exit RIPs:
2277          */
2278         if (unlikely(prof_on == KVM_PROFILING))
2279                 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2280
2281         r = kvm_handle_exit(kvm_run, vcpu);
2282         if (r > 0) {
2283                 /* Give scheduler a change to reschedule. */
2284                 if (signal_pending(current)) {
2285                         r = -EINTR;
2286                         kvm_run->exit_reason = KVM_EXIT_INTR;
2287                         ++vcpu->stat.signal_exits;
2288                         goto out;
2289                 }
2290
2291                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2292                         r = -EINTR;
2293                         kvm_run->exit_reason = KVM_EXIT_INTR;
2294                         ++vcpu->stat.request_irq_exits;
2295                         goto out;
2296                 }
2297                 if (!need_resched()) {
2298                         ++vcpu->stat.light_exits;
2299                         goto again;
2300                 }
2301         }
2302
2303 out:
2304         if (r > 0) {
2305                 kvm_resched(vcpu);
2306                 goto preempted;
2307         }
2308
2309         post_kvm_run_save(vcpu, kvm_run);
2310         return r;
2311 }
2312
2313 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2314                                   unsigned long addr,
2315                                   u32 err_code)
2316 {
2317         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2318
2319         ++vcpu->stat.pf_guest;
2320
2321         if (is_page_fault(vect_info)) {
2322                 printk(KERN_DEBUG "inject_page_fault: "
2323                        "double fault 0x%lx @ 0x%lx\n",
2324                        addr, vmcs_readl(GUEST_RIP));
2325                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2326                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2327                              DF_VECTOR |
2328                              INTR_TYPE_EXCEPTION |
2329                              INTR_INFO_DELIEVER_CODE_MASK |
2330                              INTR_INFO_VALID_MASK);
2331                 return;
2332         }
2333         vcpu->cr2 = addr;
2334         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2335         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2336                      PF_VECTOR |
2337                      INTR_TYPE_EXCEPTION |
2338                      INTR_INFO_DELIEVER_CODE_MASK |
2339                      INTR_INFO_VALID_MASK);
2340
2341 }
2342
2343 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2344 {
2345         struct vcpu_vmx *vmx = to_vmx(vcpu);
2346
2347         if (vmx->vmcs) {
2348                 on_each_cpu(__vcpu_clear, vmx, 0, 1);
2349                 free_vmcs(vmx->vmcs);
2350                 vmx->vmcs = NULL;
2351         }
2352 }
2353
2354 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2355 {
2356         struct vcpu_vmx *vmx = to_vmx(vcpu);
2357
2358         vmx_free_vmcs(vcpu);
2359         kfree(vmx->host_msrs);
2360         kfree(vmx->guest_msrs);
2361         kvm_vcpu_uninit(vcpu);
2362         kfree(vmx);
2363 }
2364
2365 static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
2366 {
2367         int err;
2368         struct vcpu_vmx *vmx = kzalloc(sizeof(*vmx), GFP_KERNEL);
2369         int cpu;
2370
2371         if (!vmx)
2372                 return ERR_PTR(-ENOMEM);
2373
2374         err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
2375         if (err)
2376                 goto free_vcpu;
2377
2378         vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2379         if (!vmx->guest_msrs) {
2380                 err = -ENOMEM;
2381                 goto uninit_vcpu;
2382         }
2383
2384         vmx->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2385         if (!vmx->host_msrs)
2386                 goto free_guest_msrs;
2387
2388         vmx->vmcs = alloc_vmcs();
2389         if (!vmx->vmcs)
2390                 goto free_msrs;
2391
2392         vmcs_clear(vmx->vmcs);
2393
2394         cpu = get_cpu();
2395         vmx_vcpu_load(&vmx->vcpu, cpu);
2396         err = vmx_vcpu_setup(vmx);
2397         vmx_vcpu_put(&vmx->vcpu);
2398         put_cpu();
2399         if (err)
2400                 goto free_vmcs;
2401
2402         return &vmx->vcpu;
2403
2404 free_vmcs:
2405         free_vmcs(vmx->vmcs);
2406 free_msrs:
2407         kfree(vmx->host_msrs);
2408 free_guest_msrs:
2409         kfree(vmx->guest_msrs);
2410 uninit_vcpu:
2411         kvm_vcpu_uninit(&vmx->vcpu);
2412 free_vcpu:
2413         kfree(vmx);
2414         return ERR_PTR(err);
2415 }
2416
2417 static struct kvm_arch_ops vmx_arch_ops = {
2418         .cpu_has_kvm_support = cpu_has_kvm_support,
2419         .disabled_by_bios = vmx_disabled_by_bios,
2420         .hardware_setup = hardware_setup,
2421         .hardware_unsetup = hardware_unsetup,
2422         .hardware_enable = hardware_enable,
2423         .hardware_disable = hardware_disable,
2424
2425         .vcpu_create = vmx_create_vcpu,
2426         .vcpu_free = vmx_free_vcpu,
2427
2428         .vcpu_load = vmx_vcpu_load,
2429         .vcpu_put = vmx_vcpu_put,
2430         .vcpu_decache = vmx_vcpu_decache,
2431
2432         .set_guest_debug = set_guest_debug,
2433         .get_msr = vmx_get_msr,
2434         .set_msr = vmx_set_msr,
2435         .get_segment_base = vmx_get_segment_base,
2436         .get_segment = vmx_get_segment,
2437         .set_segment = vmx_set_segment,
2438         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2439         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2440         .set_cr0 = vmx_set_cr0,
2441         .set_cr3 = vmx_set_cr3,
2442         .set_cr4 = vmx_set_cr4,
2443 #ifdef CONFIG_X86_64
2444         .set_efer = vmx_set_efer,
2445 #endif
2446         .get_idt = vmx_get_idt,
2447         .set_idt = vmx_set_idt,
2448         .get_gdt = vmx_get_gdt,
2449         .set_gdt = vmx_set_gdt,
2450         .cache_regs = vcpu_load_rsp_rip,
2451         .decache_regs = vcpu_put_rsp_rip,
2452         .get_rflags = vmx_get_rflags,
2453         .set_rflags = vmx_set_rflags,
2454
2455         .tlb_flush = vmx_flush_tlb,
2456         .inject_page_fault = vmx_inject_page_fault,
2457
2458         .inject_gp = vmx_inject_gp,
2459
2460         .run = vmx_vcpu_run,
2461         .skip_emulated_instruction = skip_emulated_instruction,
2462         .patch_hypercall = vmx_patch_hypercall,
2463 };
2464
2465 static int __init vmx_init(void)
2466 {
2467         void *iova;
2468         int r;
2469
2470         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2471         if (!vmx_io_bitmap_a)
2472                 return -ENOMEM;
2473
2474         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2475         if (!vmx_io_bitmap_b) {
2476                 r = -ENOMEM;
2477                 goto out;
2478         }
2479
2480         /*
2481          * Allow direct access to the PC debug port (it is often used for I/O
2482          * delays, but the vmexits simply slow things down).
2483          */
2484         iova = kmap(vmx_io_bitmap_a);
2485         memset(iova, 0xff, PAGE_SIZE);
2486         clear_bit(0x80, iova);
2487         kunmap(vmx_io_bitmap_a);
2488
2489         iova = kmap(vmx_io_bitmap_b);
2490         memset(iova, 0xff, PAGE_SIZE);
2491         kunmap(vmx_io_bitmap_b);
2492
2493         r = kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2494         if (r)
2495                 goto out1;
2496
2497         return 0;
2498
2499 out1:
2500         __free_page(vmx_io_bitmap_b);
2501 out:
2502         __free_page(vmx_io_bitmap_a);
2503         return r;
2504 }
2505
2506 static void __exit vmx_exit(void)
2507 {
2508         __free_page(vmx_io_bitmap_b);
2509         __free_page(vmx_io_bitmap_a);
2510
2511         kvm_exit_arch();
2512 }
2513
2514 module_init(vmx_init)
2515 module_exit(vmx_exit)