2 * driver for ENE KB3926 B/C/D/E/F CIR (pnp id: ENE0XXX)
4 * Copyright (C) 2010 Maxim Levitsky <maximlevitsky@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * Sami R. <maesesami@gmail.com> for lot of help in debugging and therefore
23 * bringing to life support for transmission & learning mode.
25 * Charlie Andrews <charliethepilot@googlemail.com> for lots of help in
26 * bringing up the support of new firmware buffer that is popular
29 * ENE for partial device documentation
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/pnp.h>
37 #include <linux/interrupt.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/input.h>
41 #include <media/ir-core.h>
42 #include <media/ir-common.h>
45 static int sample_period;
46 static bool learning_mode;
50 static void ene_set_reg_addr(struct ene_device *dev, u16 reg)
52 outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
53 outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
56 /* read a hardware register */
57 static u8 ene_read_reg(struct ene_device *dev, u16 reg)
60 ene_set_reg_addr(dev, reg);
61 retval = inb(dev->hw_io + ENE_IO);
62 dbg_regs("reg %04x == %02x", reg, retval);
66 /* write a hardware register */
67 static void ene_write_reg(struct ene_device *dev, u16 reg, u8 value)
69 dbg_regs("reg %04x <- %02x", reg, value);
70 ene_set_reg_addr(dev, reg);
71 outb(value, dev->hw_io + ENE_IO);
74 /* Set bits in hardware register */
75 static void ene_set_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
77 dbg_regs("reg %04x |= %02x", reg, mask);
78 ene_set_reg_addr(dev, reg);
79 outb(inb(dev->hw_io + ENE_IO) | mask, dev->hw_io + ENE_IO);
82 /* Clear bits in hardware register */
83 static void ene_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
85 dbg_regs("reg %04x &= ~%02x ", reg, mask);
86 ene_set_reg_addr(dev, reg);
87 outb(inb(dev->hw_io + ENE_IO) & ~mask, dev->hw_io + ENE_IO);
90 /* A helper to set/clear a bit in register according to boolean variable */
91 static void ene_set_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask,
95 ene_set_reg_mask(dev, reg, mask);
97 ene_clear_reg_mask(dev, reg, mask);
100 /* detect hardware features */
101 static int ene_hw_detect(struct ene_device *dev)
103 u8 chip_major, chip_minor;
104 u8 hw_revision, old_ver;
107 ene_clear_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
108 chip_major = ene_read_reg(dev, ENE_ECVER_MAJOR);
109 chip_minor = ene_read_reg(dev, ENE_ECVER_MINOR);
110 ene_set_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
112 hw_revision = ene_read_reg(dev, ENE_ECHV);
113 old_ver = ene_read_reg(dev, ENE_HW_VER_OLD);
115 dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) +
116 (ene_read_reg(dev, ENE_PLLFRL) >> 4);
118 if (sample_period != ENE_DEFAULT_SAMPLE_PERIOD)
119 dev->rx_period_adjust =
120 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 2 : 4;
122 if (hw_revision == 0xFF) {
123 ene_warn("device seems to be disabled");
124 ene_warn("send a mail to lirc-list@lists.sourceforge.net");
125 ene_warn("please attach output of acpidump and dmidecode");
129 ene_notice("chip is 0x%02x%02x - kbver = 0x%02x, rev = 0x%02x",
130 chip_major, chip_minor, old_ver, hw_revision);
132 ene_notice("PLL freq = %d", dev->pll_freq);
134 if (chip_major == 0x33) {
135 ene_warn("chips 0x33xx aren't supported");
139 if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) {
140 dev->hw_revision = ENE_HW_C;
141 ene_notice("KB3926C detected");
142 } else if (old_ver == 0x24 && hw_revision == 0xC0) {
143 dev->hw_revision = ENE_HW_B;
144 ene_notice("KB3926B detected");
146 dev->hw_revision = ENE_HW_D;
147 ene_notice("KB3926D or higher detected");
150 /* detect features hardware supports */
151 if (dev->hw_revision < ENE_HW_C)
154 fw_reg1 = ene_read_reg(dev, ENE_FW1);
155 fw_reg2 = ene_read_reg(dev, ENE_FW2);
157 ene_notice("Firmware regs: %02x %02x", fw_reg1, fw_reg2);
159 dev->hw_use_gpio_0a = !!(fw_reg2 & ENE_FW2_GP0A);
160 dev->hw_learning_and_tx_capable = !!(fw_reg2 & ENE_FW2_LEARNING);
161 dev->hw_extra_buffer = !!(fw_reg1 & ENE_FW1_HAS_EXTRA_BUF);
163 if (dev->hw_learning_and_tx_capable)
164 dev->hw_fan_input = !!(fw_reg2 & ENE_FW2_FAN_INPUT);
166 ene_notice("Hardware features:");
168 if (dev->hw_learning_and_tx_capable) {
169 ene_notice("* Supports transmitting & learning mode");
170 ene_notice(" This feature is rare and therefore,");
171 ene_notice(" you are welcome to test it,");
172 ene_notice(" and/or contact the author via:");
173 ene_notice(" lirc-list@lists.sourceforge.net");
174 ene_notice(" or maximlevitsky@gmail.com");
176 ene_notice("* Uses GPIO %s for IR raw input",
177 dev->hw_use_gpio_0a ? "40" : "0A");
179 if (dev->hw_fan_input)
180 ene_notice("* Uses unused fan feedback input as source"
181 " of demodulated IR data");
184 if (!dev->hw_fan_input)
185 ene_notice("* Uses GPIO %s for IR demodulated input",
186 dev->hw_use_gpio_0a ? "0A" : "40");
188 if (dev->hw_extra_buffer)
189 ene_notice("* Uses new style input buffer");
193 /* Sense current received carrier */
194 void ene_rx_sense_carrier(struct ene_device *dev)
196 int period = ene_read_reg(dev, ENE_CIRCAR_PRD);
197 int hperiod = ene_read_reg(dev, ENE_CIRCAR_HPRD);
198 int carrier, duty_cycle;
201 if (!(period & ENE_CIRCAR_PRD_VALID))
204 period &= ~ENE_CIRCAR_PRD_VALID;
209 dbg("RX: hardware carrier period = %02x", period);
210 dbg("RX: hardware carrier pulse period = %02x", hperiod);
213 carrier = 2000000 / period;
214 duty_cycle = (hperiod * 100) / period;
215 dbg("RX: sensed carrier = %d Hz, duty cycle %d%%",
216 carrier, duty_cycle);
218 /* TODO: Send carrier & duty cycle to IR layer */
221 /* this enables/disables the CIR RX engine */
222 static void ene_enable_cir_engine(struct ene_device *dev, bool enable)
224 ene_set_clear_reg_mask(dev, ENE_CIRCFG,
225 ENE_CIRCFG_RX_EN | ENE_CIRCFG_RX_IRQ, enable);
228 /* this selects input for CIR engine. Ether GPIO 0A or GPIO40*/
229 static void ene_select_rx_input(struct ene_device *dev, bool gpio_0a)
231 ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_GPIO0A, gpio_0a);
235 * this enables alternative input via fan tachometer sensor and bypasses
238 static void ene_enable_fan_input(struct ene_device *dev, bool enable)
240 if (!dev->hw_fan_input)
244 ene_write_reg(dev, ENE_FAN_AS_IN1, 0);
246 ene_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN);
247 ene_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN);
249 dev->rx_fan_input_inuse = enable;
252 /* setup the receiver for RX*/
253 static void ene_rx_setup(struct ene_device *dev)
255 bool learning_mode = dev->learning_enabled ||
256 dev->carrier_detect_enabled;
257 int sample_period_adjust = 0;
259 /* This selects RLC input and clears CFG2 settings */
260 ene_write_reg(dev, ENE_CIRCFG2, 0x00);
262 /* set sample period*/
263 if (sample_period == ENE_DEFAULT_SAMPLE_PERIOD)
264 sample_period_adjust =
265 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 1 : 2;
267 ene_write_reg(dev, ENE_CIRRLC_CFG,
268 (sample_period + sample_period_adjust) |
269 ENE_CIRRLC_CFG_OVERFLOW);
270 /* revB doesn't support inputs */
271 if (dev->hw_revision < ENE_HW_C)
276 WARN_ON(!dev->hw_learning_and_tx_capable);
278 /* Enable the opposite of the normal input
279 That means that if GPIO40 is normally used, use GPIO0A
281 This input will carry non demodulated
282 signal, and we will tell the hw to demodulate it itself */
283 ene_select_rx_input(dev, !dev->hw_use_gpio_0a);
284 dev->rx_fan_input_inuse = false;
286 /* Enable carrier demodulation */
287 ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
289 /* Enable carrier detection */
290 ene_write_reg(dev, ENE_CIRCAR_PULS, 0x63);
291 ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT,
292 dev->carrier_detect_enabled || debug);
294 if (dev->hw_fan_input)
295 dev->rx_fan_input_inuse = true;
297 ene_select_rx_input(dev, dev->hw_use_gpio_0a);
299 /* Disable carrier detection & demodulation */
300 ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
301 ene_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT);
305 if (dev->rx_fan_input_inuse) {
306 dev->props->rx_resolution = MS_TO_NS(ENE_FW_SAMPLE_PERIOD_FAN);
308 /* Fan input doesn't support timeouts, it just ends the
309 input with a maximum sample */
310 dev->props->min_timeout = dev->props->max_timeout =
311 MS_TO_NS(ENE_FW_SMPL_BUF_FAN_MSK *
312 ENE_FW_SAMPLE_PERIOD_FAN);
314 dev->props->rx_resolution = MS_TO_NS(sample_period);
316 /* Theoreticly timeout is unlimited, but we cap it
317 * because it was seen that on one device, it
318 * would stop sending spaces after around 250 msec.
319 * Besides, this is close to 2^32 anyway and timeout is u32.
321 dev->props->min_timeout = MS_TO_NS(127 * sample_period);
322 dev->props->max_timeout = MS_TO_NS(200000);
325 if (dev->hw_learning_and_tx_capable)
326 dev->props->tx_resolution = MS_TO_NS(sample_period);
328 if (dev->props->timeout > dev->props->max_timeout)
329 dev->props->timeout = dev->props->max_timeout;
330 if (dev->props->timeout < dev->props->min_timeout)
331 dev->props->timeout = dev->props->min_timeout;
334 /* Enable the device for receive */
335 static void ene_rx_enable(struct ene_device *dev)
338 dbg("RX: setup receiver, learning mode = %d", learning_mode);
340 /* Enable system interrupt */
341 if (dev->hw_revision < ENE_HW_C) {
342 ene_write_reg(dev, ENEB_IRQ, dev->irq << 1);
343 ene_write_reg(dev, ENEB_IRQ_UNK1, 0x01);
345 reg_value = ene_read_reg(dev, ENE_IRQ) & 0xF0;
346 reg_value |= ENE_IRQ_UNK_EN;
347 reg_value &= ~ENE_IRQ_STATUS;
348 reg_value |= (dev->irq & ENE_IRQ_MASK);
349 ene_write_reg(dev, ENE_IRQ, reg_value);
353 ene_enable_fan_input(dev, dev->rx_fan_input_inuse);
354 ene_enable_cir_engine(dev, !dev->rx_fan_input_inuse);
356 /* ack any pending irqs - just in case */
359 /* enable firmware bits */
360 ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
362 /* enter idle mode */
363 ir_raw_event_set_idle(dev->idev, true);
364 dev->rx_enabled = true;
367 /* Disable the device receiver */
368 static void ene_rx_disable(struct ene_device *dev)
371 ene_enable_cir_engine(dev, false);
372 ene_enable_fan_input(dev, false);
374 /* disable hardware IRQ and firmware flag */
375 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
377 ir_raw_event_set_idle(dev->idev, true);
378 dev->rx_enabled = false;
381 /* prepare transmission */
382 static void ene_tx_prepare(struct ene_device *dev)
384 u8 conf1 = ene_read_reg(dev, ENE_CIRCFG);
385 u8 fwreg2 = ene_read_reg(dev, ENE_FW2);
387 dev->saved_conf1 = conf1;
389 /* Show information about currently connected transmitter jacks */
390 if (fwreg2 & ENE_FW2_EMMITER1_CONN)
391 dbg("TX: Transmitter #1 is connected");
393 if (fwreg2 & ENE_FW2_EMMITER2_CONN)
394 dbg("TX: Transmitter #2 is connected");
396 if (!(fwreg2 & (ENE_FW2_EMMITER1_CONN | ENE_FW2_EMMITER2_CONN)))
397 ene_warn("TX: transmitter cable isn't connected!");
399 /* Set transmitter mask */
400 ene_set_clear_reg_mask(dev, ENE_GPIOFS8, ENE_GPIOFS8_GPIO41,
401 !!(dev->transmitter_mask & 0x01));
402 ene_set_clear_reg_mask(dev, ENE_GPIOFS1, ENE_GPIOFS1_GPIO0D,
403 !!(dev->transmitter_mask & 0x02));
405 /* Set the carrier period && duty cycle */
406 if (dev->tx_period) {
408 int tx_puls_width = dev->tx_period / (100 / dev->tx_duty_cycle);
413 dbg("TX: pulse distance = %d * 500 ns", dev->tx_period);
414 dbg("TX: pulse width = %d * 500 ns", tx_puls_width);
416 ene_write_reg(dev, ENE_CIRMOD_PRD, ENE_CIRMOD_PRD_POL |
419 ene_write_reg(dev, ENE_CIRMOD_HPRD, tx_puls_width);
421 conf1 |= ENE_CIRCFG_TX_CARR;
423 conf1 &= ~ENE_CIRCFG_TX_CARR;
425 /* disable receive on revc */
426 if (dev->hw_revision == ENE_HW_C)
427 conf1 &= ~ENE_CIRCFG_RX_EN;
429 /* Enable TX engine */
430 conf1 |= ENE_CIRCFG_TX_EN | ENE_CIRCFG_TX_IRQ;
431 ene_write_reg(dev, ENE_CIRCFG, conf1);
434 /* end transmission */
435 static void ene_tx_complete(struct ene_device *dev)
437 ene_write_reg(dev, ENE_CIRCFG, dev->saved_conf1);
438 dev->tx_buffer = NULL;
442 /* TX one sample - must be called with dev->hw_lock*/
443 static void ene_tx_sample(struct ene_device *dev)
447 bool pulse = dev->tx_sample_pulse;
449 if (!dev->tx_buffer) {
450 ene_warn("TX: BUG: attempt to transmit NULL buffer");
454 /* Grab next TX sample */
455 if (!dev->tx_sample) {
457 if (dev->tx_pos == dev->tx_len) {
459 dbg("TX: no more data to send");
463 dbg("TX: last sample sent by hardware");
464 ene_tx_complete(dev);
465 complete(&dev->tx_complete);
470 sample = dev->tx_buffer[dev->tx_pos++];
471 dev->tx_sample_pulse = !dev->tx_sample_pulse;
473 dev->tx_sample = DIV_ROUND_CLOSEST(sample, sample_period);
479 raw_tx = min(dev->tx_sample , (unsigned int)ENE_CIRRLC_OUT_MASK);
480 dev->tx_sample -= raw_tx;
482 dbg("TX: sample %8d (%s)", raw_tx * sample_period,
483 pulse ? "pulse" : "space");
485 raw_tx |= ENE_CIRRLC_OUT_PULSE;
488 dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx);
490 dev->tx_reg = !dev->tx_reg;
492 /* simulate TX done interrupt */
494 mod_timer(&dev->tx_sim_timer, jiffies + HZ / 500);
497 /* timer to simulate tx done interrupt */
498 static void ene_tx_irqsim(unsigned long data)
500 struct ene_device *dev = (struct ene_device *)data;
503 spin_lock_irqsave(&dev->hw_lock, flags);
505 spin_unlock_irqrestore(&dev->hw_lock, flags);
508 /* Read properities of hw sample buffer */
509 static void ene_setup_hw_buffer(struct ene_device *dev)
513 ene_read_hw_pointer(dev);
514 dev->r_pointer = dev->w_pointer;
516 if (!dev->hw_extra_buffer) {
517 dev->buffer_len = ENE_FW_PACKET_SIZE * 2;
521 tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER);
522 tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER+1) << 8;
523 dev->extra_buf1_address = tmp;
525 dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2);
527 tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 3);
528 tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 4) << 8;
529 dev->extra_buf2_address = tmp;
531 dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5);
533 dev->buffer_len = dev->extra_buf1_len + dev->extra_buf2_len + 8;
535 ene_notice("Hardware uses 2 extended buffers:");
536 ene_notice(" 0x%04x - len : %d", dev->extra_buf1_address,
537 dev->extra_buf1_len);
538 ene_notice(" 0x%04x - len : %d", dev->extra_buf2_address,
539 dev->extra_buf2_len);
541 ene_notice("Total buffer len = %d", dev->buffer_len);
543 if (dev->buffer_len > 64 || dev->buffer_len < 16)
546 if (dev->extra_buf1_address > 0xFBFC ||
547 dev->extra_buf1_address < 0xEC00)
550 if (dev->extra_buf2_address > 0xFBFC ||
551 dev->extra_buf2_address < 0xEC00)
554 if (dev->r_pointer > dev->buffer_len)
557 ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
560 ene_warn("Error validating extra buffers, device probably won't work");
561 dev->hw_extra_buffer = false;
562 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
566 /* Restore the pointers to extra buffers - to make module reload work*/
567 static void ene_restore_extra_buffer(struct ene_device *dev)
569 if (!dev->hw_extra_buffer)
572 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 0,
573 dev->extra_buf1_address & 0xFF);
574 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 1,
575 dev->extra_buf1_address >> 8);
576 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 2, dev->extra_buf1_len);
578 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 3,
579 dev->extra_buf2_address & 0xFF);
580 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 4,
581 dev->extra_buf2_address >> 8);
582 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 5,
583 dev->extra_buf2_len);
584 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
588 /* read irq status and ack it */
589 static int ene_irq_status(struct ene_device *dev)
592 u8 fw_flags1, fw_flags2;
595 fw_flags2 = ene_read_reg(dev, ENE_FW2);
597 if (dev->hw_revision < ENE_HW_C) {
598 irq_status = ene_read_reg(dev, ENEB_IRQ_STATUS);
600 if (!(irq_status & ENEB_IRQ_STATUS_IR))
603 ene_clear_reg_mask(dev, ENEB_IRQ_STATUS, ENEB_IRQ_STATUS_IR);
607 irq_status = ene_read_reg(dev, ENE_IRQ);
608 if (!(irq_status & ENE_IRQ_STATUS))
611 /* original driver does that twice - a workaround ? */
612 ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
613 ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
615 /* check RX interrupt */
616 if (fw_flags2 & ENE_FW2_RXIRQ) {
617 retval |= ENE_IRQ_RX;
618 ene_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_RXIRQ);
621 /* check TX interrupt */
622 fw_flags1 = ene_read_reg(dev, ENE_FW1);
623 if (fw_flags1 & ENE_FW1_TXIRQ) {
624 ene_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ);
625 retval |= ENE_IRQ_TX;
631 /* Read hardware write pointer */
632 static void ene_read_hw_pointer(struct ene_device *dev)
634 if (dev->hw_extra_buffer)
635 dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER);
637 dev->w_pointer = ene_read_reg(dev, ENE_FW2)
638 & ENE_FW2_BUF_WPTR ? 0 : ENE_FW_PACKET_SIZE;
640 dbg_verbose("RB: HW write pointer: %02x, driver read pointer: %02x",
641 dev->w_pointer, dev->r_pointer);
644 /* Gets address of next sample from HW ring buffer */
645 static int ene_get_sample_reg(struct ene_device *dev)
649 if (dev->r_pointer == dev->w_pointer) {
650 dbg_verbose("RB: hit end, try update w_pointer");
651 ene_read_hw_pointer(dev);
654 if (dev->r_pointer == dev->w_pointer) {
655 dbg_verbose("RB: end of data at %d", dev->r_pointer);
659 dbg_verbose("RB: reading at offset %d", dev->r_pointer);
660 r_pointer = dev->r_pointer;
663 if (dev->r_pointer == dev->buffer_len)
666 dbg_verbose("RB: next read will be from offset %d", dev->r_pointer);
669 dbg_verbose("RB: read at main buffer at %d", r_pointer);
670 return ENE_FW_SAMPLE_BUFFER + r_pointer;
675 if (r_pointer < dev->extra_buf1_len) {
676 dbg_verbose("RB: read at 1st extra buffer at %d", r_pointer);
677 return dev->extra_buf1_address + r_pointer;
680 r_pointer -= dev->extra_buf1_len;
682 if (r_pointer < dev->extra_buf2_len) {
683 dbg_verbose("RB: read at 2nd extra buffer at %d", r_pointer);
684 return dev->extra_buf2_address + r_pointer;
687 dbg("attempt to read beyong ring bufer end");
691 /* interrupt handler */
692 static irqreturn_t ene_isr(int irq, void *data)
695 int hw_sample, irq_status;
698 irqreturn_t retval = IRQ_NONE;
699 struct ene_device *dev = (struct ene_device *)data;
700 DEFINE_IR_RAW_EVENT(ev);
702 spin_lock_irqsave(&dev->hw_lock, flags);
704 dbg_verbose("ISR called");
705 ene_read_hw_pointer(dev);
706 irq_status = ene_irq_status(dev);
711 retval = IRQ_HANDLED;
713 if (irq_status & ENE_IRQ_TX) {
714 dbg_verbose("TX interrupt");
715 if (!dev->hw_learning_and_tx_capable) {
716 dbg("TX interrupt on unsupported device!");
722 if (!(irq_status & ENE_IRQ_RX))
725 dbg_verbose("RX interrupt");
727 if (dev->carrier_detect_enabled || debug)
728 ene_rx_sense_carrier(dev);
730 /* On hardware that don't support extra buffer we need to trust
731 the interrupt and not track the read pointer */
732 if (!dev->hw_extra_buffer)
733 dev->r_pointer = dev->w_pointer == 0 ? ENE_FW_PACKET_SIZE : 0;
737 reg = ene_get_sample_reg(dev);
739 dbg_verbose("next sample to read at: %04x", reg);
743 hw_value = ene_read_reg(dev, reg);
745 if (dev->rx_fan_input_inuse) {
747 int offset = ENE_FW_SMPL_BUF_FAN - ENE_FW_SAMPLE_BUFFER;
749 /* read high part of the sample */
750 hw_value |= ene_read_reg(dev, reg + offset) << 8;
751 pulse = hw_value & ENE_FW_SMPL_BUF_FAN_PLS;
753 /* clear space bit, and other unused bits */
754 hw_value &= ENE_FW_SMPL_BUF_FAN_MSK;
755 hw_sample = hw_value * ENE_FW_SAMPLE_PERIOD_FAN;
758 pulse = !(hw_value & ENE_FW_SAMPLE_SPACE);
759 hw_value &= ~ENE_FW_SAMPLE_SPACE;
760 hw_sample = hw_value * sample_period;
762 if (dev->rx_period_adjust) {
764 hw_sample /= (100 + dev->rx_period_adjust);
768 if (!dev->hw_extra_buffer && !hw_sample) {
769 dev->r_pointer = dev->w_pointer;
773 dbg("RX: %d (%s)", hw_sample, pulse ? "pulse" : "space");
775 ev.duration = MS_TO_NS(hw_sample);
777 ir_raw_event_store_with_filter(dev->idev, &ev);
780 ir_raw_event_handle(dev->idev);
782 spin_unlock_irqrestore(&dev->hw_lock, flags);
786 /* Initialize default settings */
787 static void ene_setup_settings(struct ene_device *dev)
790 dev->tx_duty_cycle = 50; /*%*/
791 dev->transmitter_mask = 0x03;
792 dev->learning_enabled = learning_mode;
794 /* Set reasonable default timeout */
795 dev->props->timeout = MS_TO_NS(150000);
798 /* outside interface: called on first open*/
799 static int ene_open(void *data)
801 struct ene_device *dev = (struct ene_device *)data;
804 spin_lock_irqsave(&dev->hw_lock, flags);
806 spin_unlock_irqrestore(&dev->hw_lock, flags);
810 /* outside interface: called on device close*/
811 static void ene_close(void *data)
813 struct ene_device *dev = (struct ene_device *)data;
815 spin_lock_irqsave(&dev->hw_lock, flags);
818 spin_unlock_irqrestore(&dev->hw_lock, flags);
821 /* outside interface: set transmitter mask */
822 static int ene_set_tx_mask(void *data, u32 tx_mask)
824 struct ene_device *dev = (struct ene_device *)data;
826 dbg("TX: attempt to set transmitter mask %02x", tx_mask);
829 if (!tx_mask || tx_mask & ~0x03) {
830 dbg("TX: invalid mask");
831 /* return count of transmitters */
835 spin_lock_irqsave(&dev->hw_lock, flags);
836 dev->transmitter_mask = tx_mask;
837 spin_unlock_irqrestore(&dev->hw_lock, flags);
841 /* outside interface : set tx carrier */
842 static int ene_set_tx_carrier(void *data, u32 carrier)
844 struct ene_device *dev = (struct ene_device *)data;
846 u32 period = 2000000 / carrier;
848 dbg("TX: attempt to set tx carrier to %d kHz", carrier);
850 if (period && (period > ENE_CIRMOD_PRD_MAX ||
851 period < ENE_CIRMOD_PRD_MIN)) {
853 dbg("TX: out of range %d-%d kHz carrier",
854 2000 / ENE_CIRMOD_PRD_MIN,
855 2000 / ENE_CIRMOD_PRD_MAX);
860 dbg("TX: set carrier to %d kHz", carrier);
861 spin_lock_irqsave(&dev->hw_lock, flags);
862 dev->tx_period = period;
863 spin_unlock_irqrestore(&dev->hw_lock, flags);
867 /*outside interface : set tx duty cycle */
868 static int ene_set_tx_duty_cycle(void *data, u32 duty_cycle)
870 struct ene_device *dev = (struct ene_device *)data;
873 dbg("TX: setting duty cycle to %d%%", duty_cycle);
875 BUG_ON(!duty_cycle || duty_cycle >= 100);
877 spin_lock_irqsave(&dev->hw_lock, flags);
878 dev->tx_duty_cycle = duty_cycle;
879 spin_unlock_irqrestore(&dev->hw_lock, flags);
883 /* outside interface: enable learning mode */
884 static int ene_set_learning_mode(void *data, int enable)
886 struct ene_device *dev = (struct ene_device *)data;
888 if (enable == dev->learning_enabled)
891 spin_lock_irqsave(&dev->hw_lock, flags);
892 dev->learning_enabled = enable;
896 spin_unlock_irqrestore(&dev->hw_lock, flags);
900 /* outside interface: enable or disable idle mode */
901 static void ene_rx_set_idle(void *data, bool idle)
903 struct ene_device *dev = (struct ene_device *)data;
908 dbg("RX: stopping the receiver");
909 ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
910 ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
913 /* outside interface: transmit */
914 static int ene_transmit(void *data, int *buf, u32 n)
916 struct ene_device *dev = (struct ene_device *)data;
919 dev->tx_buffer = buf;
920 dev->tx_len = n / sizeof(int);
925 dev->tx_sample_pulse = 0;
927 dbg("TX: %d samples", dev->tx_len);
929 spin_lock_irqsave(&dev->hw_lock, flags);
933 /* Transmit first two samples */
937 spin_unlock_irqrestore(&dev->hw_lock, flags);
939 if (wait_for_completion_timeout(&dev->tx_complete, 2 * HZ) == 0) {
941 spin_lock_irqsave(&dev->hw_lock, flags);
942 ene_tx_complete(dev);
943 spin_unlock_irqrestore(&dev->hw_lock, flags);
950 static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
953 struct ir_dev_props *ir_props;
954 struct input_dev *input_dev;
955 struct ene_device *dev;
957 /* allocate memory */
958 input_dev = input_allocate_device();
959 ir_props = kzalloc(sizeof(struct ir_dev_props), GFP_KERNEL);
960 dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL);
962 if (!input_dev || !ir_props || !dev)
965 /* validate resources */
968 if (!pnp_port_valid(pnp_dev, 0) ||
969 pnp_port_len(pnp_dev, 0) < ENE_IO_SIZE)
972 if (!pnp_irq_valid(pnp_dev, 0))
975 spin_lock_init(&dev->hw_lock);
977 /* claim the resources */
979 dev->hw_io = pnp_port_start(pnp_dev, 0);
980 if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) {
986 dev->irq = pnp_irq(pnp_dev, 0);
987 if (request_irq(dev->irq, ene_isr,
988 IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) {
993 pnp_set_drvdata(pnp_dev, dev);
994 dev->pnp_dev = pnp_dev;
996 /* don't allow too short/long sample periods */
997 if (sample_period < 5 || sample_period > 0x7F)
998 sample_period = ENE_DEFAULT_SAMPLE_PERIOD;
1000 /* detect hardware version and features */
1001 error = ene_hw_detect(dev);
1005 if (!dev->hw_learning_and_tx_capable && txsim) {
1006 dev->hw_learning_and_tx_capable = true;
1007 setup_timer(&dev->tx_sim_timer, ene_tx_irqsim,
1008 (long unsigned int)dev);
1009 ene_warn("Simulation of TX activated");
1012 if (!dev->hw_learning_and_tx_capable)
1013 learning_mode = false;
1015 ir_props->driver_type = RC_DRIVER_IR_RAW;
1016 ir_props->allowed_protos = IR_TYPE_ALL;
1017 ir_props->priv = dev;
1018 ir_props->open = ene_open;
1019 ir_props->close = ene_close;
1020 ir_props->s_idle = ene_rx_set_idle;
1022 dev->props = ir_props;
1023 dev->idev = input_dev;
1025 if (dev->hw_learning_and_tx_capable) {
1026 ir_props->s_learning_mode = ene_set_learning_mode;
1027 init_completion(&dev->tx_complete);
1028 ir_props->tx_ir = ene_transmit;
1029 ir_props->s_tx_mask = ene_set_tx_mask;
1030 ir_props->s_tx_carrier = ene_set_tx_carrier;
1031 ir_props->s_tx_duty_cycle = ene_set_tx_duty_cycle;
1032 /* ir_props->s_carrier_report = ene_set_carrier_report; */
1035 ene_setup_hw_buffer(dev);
1036 ene_setup_settings(dev);
1039 device_set_wakeup_capable(&pnp_dev->dev, true);
1040 device_set_wakeup_enable(&pnp_dev->dev, true);
1042 if (dev->hw_learning_and_tx_capable)
1043 input_dev->name = "ENE eHome Infrared Remote Transceiver";
1045 input_dev->name = "ENE eHome Infrared Remote Receiver";
1048 if (ir_input_register(input_dev, RC_MAP_RC6_MCE, ir_props,
1052 ene_notice("driver has been succesfully loaded");
1055 if (dev && dev->irq >= 0)
1056 free_irq(dev->irq, dev);
1057 if (dev && dev->hw_io >= 0)
1058 release_region(dev->hw_io, ENE_IO_SIZE);
1060 input_free_device(input_dev);
1066 /* main unload function */
1067 static void ene_remove(struct pnp_dev *pnp_dev)
1069 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1070 unsigned long flags;
1072 spin_lock_irqsave(&dev->hw_lock, flags);
1073 ene_rx_disable(dev);
1074 ene_restore_extra_buffer(dev);
1075 spin_unlock_irqrestore(&dev->hw_lock, flags);
1077 free_irq(dev->irq, dev);
1078 release_region(dev->hw_io, ENE_IO_SIZE);
1079 ir_input_unregister(dev->idev);
1084 /* enable wake on IR (wakes on specific button on original remote) */
1085 static void ene_enable_wake(struct ene_device *dev, int enable)
1087 enable = enable && device_may_wakeup(&dev->pnp_dev->dev);
1088 dbg("wake on IR %s", enable ? "enabled" : "disabled");
1089 ene_set_clear_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, enable);
1093 static int ene_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1095 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1096 ene_enable_wake(dev, true);
1098 /* TODO: add support for wake pattern */
1102 static int ene_resume(struct pnp_dev *pnp_dev)
1104 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1105 if (dev->rx_enabled) {
1109 ene_enable_wake(dev, false);
1114 static void ene_shutdown(struct pnp_dev *pnp_dev)
1116 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1117 ene_enable_wake(dev, true);
1120 static const struct pnp_device_id ene_ids[] = {
1128 static struct pnp_driver ene_driver = {
1129 .name = ENE_DRIVER_NAME,
1130 .id_table = ene_ids,
1131 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1134 .remove = __devexit_p(ene_remove),
1136 .suspend = ene_suspend,
1137 .resume = ene_resume,
1139 .shutdown = ene_shutdown,
1142 static int __init ene_init(void)
1144 return pnp_register_driver(&ene_driver);
1147 static void ene_exit(void)
1149 pnp_unregister_driver(&ene_driver);
1152 module_param(sample_period, int, S_IRUGO);
1153 MODULE_PARM_DESC(sample_period, "Hardware sample period (50 us default)");
1155 module_param(learning_mode, bool, S_IRUGO);
1156 MODULE_PARM_DESC(learning_mode, "Enable learning mode by default");
1158 module_param(debug, int, S_IRUGO | S_IWUSR);
1159 MODULE_PARM_DESC(debug, "Debug level");
1161 module_param(txsim, bool, S_IRUGO);
1162 MODULE_PARM_DESC(txsim,
1163 "Simulate TX features on unsupported hardware (dangerous)");
1165 MODULE_DEVICE_TABLE(pnp, ene_ids);
1167 ("Infrared input driver for KB3926B/C/D/E/F "
1168 "(aka ENE0100/ENE0200/ENE0201/ENE0202) CIR port");
1170 MODULE_AUTHOR("Maxim Levitsky");
1171 MODULE_LICENSE("GPL");
1173 module_init(ene_init);
1174 module_exit(ene_exit);